need a cheap student edition FPGA

Hi Rudi
you have not considered many cases while using a decoder. From the given
problem, your decoder will not respond correctly when the input byte is
"10010001". I understand that your suggession is to use a 256 bytes Look
Up Table.

Regards
 
Hi Rudi
you have not considered many cases while using a decoder. From the given
problem, your decoder will not respond correctly when the input byte is
"10010001". I understand that your suggession is to use a 256 bytes Look
Up Table.

Regards
 
vizziee@yahoo.com wrote:

Hi all,

I need some good primer books on Handel-C. Plz. send-in the titles.
Thanx in advance.
A typical post originating from Google groups:-

Hi
Solve my problem.
Thanx

Searching google reveals the poster has about a dozen posts, none of which
are outside threads he started and all bar one of which were started
asking 'usenet' to solve his problem.

Why should I (or anyone) be inclined to solve the problem of someone who
almost certainly will not even read let alone solve my problems?

Google provides a great usenet archive and search engine, their web based
posting facility is providing a bunch of information leeches which will
turn usenet into a wasteland of unanswered questions.

I wish I could killfile anyone posting from google, I suggest everyone else
ignores them.
 
On 28 Dec 2004 04:07:01 -0800, vizziee@yahoo.com wrote in comp.lang.c:

Hi all,

I need some good primer books on Handel-C. Plz. send-in the titles.
Thanx in advance.
You already know where Google is on the web. Try the search engine.
By the way, leave comp.lang.c out of this. "Handel-C" is completely
off-topic here.

--
Jack Klein
Home: http://JK-Technology.Com
FAQs for
comp.lang.c http://www.eskimo.com/~scs/C-faq/top.html
comp.lang.c++ http://www.parashift.com/c++-faq-lite/
alt.comp.lang.learn.c-c++
http://www.contrib.andrew.cmu.edu/~ajo/docs/FAQ-acllc.html
 
"Peter Alfke" <peter@xilinx.com> wrote:

My advice: Don't just jump into a newsgroup with a barrage of
questions. Get a feel for the prevailing style, and be more humble. You
still have a lot to learn, but try to learn by observing, not by
bombarding us with endless questions...
Good advice which I suspect will be read by almost no one accessing usenet
via google groups. When I look at posts coming from google groups it is
rare to find one in a thread which was not started by the poster.
 
Can anyone report their experiences on how efficient Handel-C's FPGA designs
are, compared to direct VHDL designs? I prefer to use a programming
language to specify my state machine, because I can think more efficiently
about the problem that way. However, I'm concerned about how clean the
ultimate design will be. I'm assuming that Handel-C when processed produces
VHDL. I have the impression that if you don't constrain your self correctly
in your use of Handel-C, you can end up with bulky hardware.

Shaping
 
Yes, it is possible. However, since this sounds suspiciously like a
homework problem, I'll be a little vague about how to solve it.

When you push the dip switch, it toggles between two states, counter
running/counter paused. How do you implement that?

Next, you need to take the paused/running signal and use it to control
whether the counter is running or not. How do you do that?

When you have solved those two problems, you will have your circuit.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
Yes, post your code if you want help.

Maybe the switch is not debounced.
See:
http://groups-beta.google.com/groups?q=fpga+debounce+switch

-- Mike Treseler
 
Peter Alfke wrote:
The original posting asked for a design where the first depression of
the DIP stops the counter, the second depression starts it again, like
an old-fashioned lamp next to your bed.

"where it counts, you press the DIP switch it stops
counting holding the current value until you press the DIP switch again
in which it counts again starting from its stopped value"

That toggle action is the problem, and it needs switch debouncing.
Peter Alfke, on a rainy California Sunday afternoon...

OOPS...

Well, Jack Ganssle has some good ideas about debouncing as well.

Al, on a cold, freezing rain, New England Sunday evening...
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
I apologize for suggesting it might be a homework problem. It's
actually not school time and so the suggestion was unwarranted. (I
might have missed your first post also (or atleast not connected it).)

If it is a mismatch between simulation and physical implementation,
perhaps there is something in the physical implementation your model
doesn't account for. For example, perhaps the dip switch "Bounces".
What you are trying to build, where the switch acts as a toggle would
be susceptible to that. Using the dip as a reset wouldn't have the
same tempermentalness, as if one sees two (or more) rests in a row,
one isn't going to "notice", since in the end the signal still gets
reset. Tow toggles in a row are a different story.

If you could tie an indicator (e.g. an led) to the "state" part of the
design, so that the led would indicate which state the toggle is in,
you might see that it doesn't actually toggle (or toggles more than
once per push). Of course, if the problem is too quick, it might go
by to quick for you to see it.

Assuming that bounce is the problem, you could then ask how to
de-bounce your circuit (i.e. make it less sensitive to bounce). I
don't know what solutions are available there, but one possibility is
to make the circuit insensitive to a 2nd button push until a specific
amount of time (say a specific number of clock cycles) after the
first. Iamgine how you would change your circuit model so that the
dip button could only cause one change of the toggle per cycle.
Implement that and see if it effects your problem. If bounce is the
problem, whether that change will help depends on how fast your cycle
is relatively to how fast bounces settle.

If bounce isn't the problem, you need to keep looking until you can
find out what is. You're right about the differences between
unrealistic "academic" models and the real-world implementation.
Verilog models are a simplification of the real world and do not model
it completely faithfully. There are things which can happen in the
real world that your model is likely to miss and vice-versa: sometimes
the model can have artifacts that can never heppen in the real world.

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
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