EDK : FSL macros defined by Xilinx are wrong

[Nico Coesel]

Jochen <JFrensch@harmanbecker.com> wrote:

On 4 Sep., 18:06, n...@puntnl.niks (Nico Coesel) wrote:
Jochen <JFren...@harmanbecker.com> wrote:
We had an issue with a "ground bounce" (Spartan3 design) in the bank
containing the PCI-interface, which 'triggered' the asynchonous reset
of the PCI-core...

Do you use async resets ?

Yes. The design uses async resets. But it doesn't seem to affect the
PCI core. The problem is always in the part with the statemachines.


well - let's have a look at
http://forums.xilinx.com/xlnx/blog/article?message.uid=12856

esp. chapter "Unreliable Sporadic Behaviour!"

Interesting reading material. Thanks. Meanwhile I removed all async
resets from the design. I'm still waiting for the test results though.
The silly thing is that the Xilinx PCI core examples the design is
based upon are full of async resets.

P.S.
Ken really knows, what he is talking about !!!

No doubt about that!

--
Programmeren in Almere?
E-mail naar nico@nctdevpuntnl (punt=.)

 

[Olaf Kaluza]

Alessandro <apoppi@email.it> wrote:

16K rom image from spi flash address $10000 (1MB offset). If a spectrum 16K
rom was programmed there, then you had a VGA-PS/2 keyboard 16K spectrum

No connector for microdrive and the ZX printer?

Did you not think it is more nice to have a ZX in a box like this:

http://www.rose-bopla.com/Prod_Pgs/BAB/Prod_02_Alubos.htm

PS2 Connector and sdcard slot on front, and VGA on back?

Olaf

 

[Symon]

"woko" <wkopp@gmx.net> wrote in message
news:4d1085f3-8c9d-4f56-8966-976446092be8@x41g2000hsb.googlegroups.com...

Hi FPGA specialist,

we are would like to know if it is currently possible to implement
high speed LVDS receiver or transmitter in FPGAs.

Our next gerneration PCB board would have about 12 LVDS receiver
(SN65LV1224B) , 6 LVDS transmitter (SN65LV1023A) and an FPGA
onboard.
Please note that the LV1224 and LV1023 transmit thair LVDS in a single
differential line, there is no LVDS clock pair necessary. The clock
speed would be 48Mhz which would lead to a LVDS bandwidth of 576Mbs
(12bit transmitting).
It would save us money and FPGA IOs if we could get the serialization
and deserialization in the FPGA.

I could find application notes about LVDS in a cyclone3, but I don't
think that reception works without a clock pair.

Is anybody out there which as experience with this kind of LVDS in a
FPGA?
We would be obliged for some practical hits...


Curious about your answers,
Wolfgang Kopp

Hi Wolfgang,

Data recovery without a clock is easy at 48Mbps. STW for XAPP224.
HTH., Syms.

 

[Nico Coesel]

Jochen <JFrensch@harmanbecker.com> wrote:

On 4 Sep., 18:06, n...@puntnl.niks (Nico Coesel) wrote:
Jochen <JFren...@harmanbecker.com> wrote:
We had an issue with a "ground bounce" (Spartan3 design) in the bank
containing the PCI-interface, which 'triggered' the asynchonous reset
of the PCI-core...

Do you use async resets ?

Yes. The design uses async resets. But it doesn't seem to affect the
PCI core. The problem is always in the part with the statemachines.


well - let's have a look at
http://forums.xilinx.com/xlnx/blog/article?message.uid=12856

esp. chapter "Unreliable Sporadic Behaviour!"

Interesting reading material. Thanks. Meanwhile I removed all async
resets from the design. I'm still waiting for the test results though.
The silly thing is that the Xilinx PCI core examples the design is
based upon are full of async resets.

P.S.
Ken really knows, what he is talking about !!!

No doubt about that!

--
Programmeren in Almere?
E-mail naar nico@nctdevpuntnl (punt=.)

 

[Olaf Kaluza]

Alessandro <apoppi@email.it> wrote:

16K rom image from spi flash address $10000 (1MB offset). If a spectrum 16K
rom was programmed there, then you had a VGA-PS/2 keyboard 16K spectrum

No connector for microdrive and the ZX printer?

Did you not think it is more nice to have a ZX in a box like this:

http://www.rose-bopla.com/Prod_Pgs/BAB/Prod_02_Alubos.htm

PS2 Connector and sdcard slot on front, and VGA on back?

Olaf

 

[Symon]

"woko" <wkopp@gmx.net> wrote in message
news:4d1085f3-8c9d-4f56-8966-976446092be8@x41g2000hsb.googlegroups.com...

Hi FPGA specialist,

we are would like to know if it is currently possible to implement
high speed LVDS receiver or transmitter in FPGAs.

Our next gerneration PCB board would have about 12 LVDS receiver
(SN65LV1224B) , 6 LVDS transmitter (SN65LV1023A) and an FPGA
onboard.
Please note that the LV1224 and LV1023 transmit thair LVDS in a single
differential line, there is no LVDS clock pair necessary. The clock
speed would be 48Mhz which would lead to a LVDS bandwidth of 576Mbs
(12bit transmitting).
It would save us money and FPGA IOs if we could get the serialization
and deserialization in the FPGA.

I could find application notes about LVDS in a cyclone3, but I don't
think that reception works without a clock pair.

Is anybody out there which as experience with this kind of LVDS in a
FPGA?
We would be obliged for some practical hits...


Curious about your answers,
Wolfgang Kopp

Hi Wolfgang,

Data recovery without a clock is easy at 48Mbps. STW for XAPP224.
HTH., Syms.

 

[MM]

1394 is a sophisticated bus and as far as I know there are no ICs available
that would bridge it to any other serial bus. You need a physical layer and
a link layer chips to build a 1394 interface. There are combined chips, but
they are probably not what you want. All of the combined chips I know of are
so called host controllers designed to go into a PC or similar and for that
reason they exploit a PCI or PCIe bus. They conform to OHCI spec, which
hides from the software most of the 1394 complexities and allows for
software interface standartization. For embedded applications there are a
few 1394 LLCs (Link Layer Controllers), which connect through a bus such as
e.g. ColdFire. So, it would be easy to connect it to a FPGA. However,
remember that you will need to implement a CPU of some sort in the FPGA to
support the LLC functionality and most importantly that you will need to
write/port/debug quite a bit of non-trivial low level software. LLC can be
also implemented in a FPGA, but there are no free cores available AFAIK.



/Mikhail







<weg22@drexel.edu> wrote in message
news:05d731b4-14b0-490d-bc16-51cdedf13c5a@k36g2000pri.googlegroups.com...

Hi all,

I'm developing a video processing application using a digitial video
camera and a FPGA. In an ideal world, I would interface the camera
directly to the FPGA via an IEEE 1394 interface. I'd still like to
extract the video from the camera using 1394 but I'm trying to avoid
spending the time to develop the IEEE 1394 software interface for the
FPGA.

I know TI makes a chipset that converts 1394 to PCI-Express, but I
don't think that will work for an embedded system. I was wondering if
there was some IC out there that converted the IEEE 1394 protocol into
something I already have software for (e.g. USB, EIA 485, etc.)? I
know I'm losing speed, but I can live with that.

Thanks in advance,
weg22

 

[jtw]

I believe you need ISE 10.x

JTW
"KJ" <lkjrsy@gmail.com> wrote in message
news:f73e6e31-f0fe-4136-9651-fa2af6e1b75d@b2g2000prf.googlegroups.com...

Hello everyone.

I try to implement an image processing in Virtex5. But What I have now
is ISE7.1i.
I think that it's not working for Virtex5. So is there anyone who can
tell me what version of ISE is ok with Virtex5

Thank you for reading.

 

[Symon]

Your Lordship,

"lordsathish" <lordsathish@gmail.com> wrote in message
news:e83b20be-1aaf-41c7-9117-2444c9f686da@b38g2000prf.googlegroups.com...

Hi all....
Can Soft microprocessor like microblaze, nios replace DSP
processors...?

Not in your case, sunshine. Anyone who apparently uses a very poorly defined
usenet post as their first port of call in their research, is clearly
destined to FAIL, so there's no point in helping.

Or is there any soft DSP processor...?

STW

Read this, it might help you.
http://catb.org/~esr/faqs/smart-questions.html

Syms.

 

[RCIngham]

Hi all....
Can Soft microprocessor like microblaze, nios replace DSP
processors...?

Not for computationally-intensive DSP tasks.

Or is there any soft DSP processor...?

No free one that I can recommend. Others may know better.

Thanks

 

[MM]

Pablo,

I would first try to remove the location constraint, although it sounds from
the answer record that it won't be enough and this IDELAYCTRL has to be
removed. In that case you will need to comment out the IDELAYCTRL
instantiation. The fact that IDELAY blocks are instantiated only means that
IDELAYCTRL(s) is/are required, but it/they have to be located in the right
place on the die. The tools are probably smart enough to instantiate the
required IDELACTRL blocks but not smart enough to ignore user's
instantiations or something like that.

You will probably need to search through the coregen generated source files
to find the troubling instantiation and the location constraint unless it is
in the ucf file, but I guess it is in the source... Hopefully there is a
source... If all you have is a netlist, then try using the script mentioned
in the answer record.


/Mikhail



"rao" <raonpc@gmail.com> wrote in message
news:bc66df26-c640-47c4-8092-3c1f617ec29f@25g2000prz.googlegroups.com...

Hi

I am using a pci core(generated from coregen, with version v4.3) in
my design. Till now i was succesfully implementing in ISE9.1i. I
started to migrate my design to ISE10.1i and I am receiving IDELAYCTRL
locking problems (Xilinx changed locking approach in ISE10.1i).

Here's one solution they are pointing to..
http://www.xilinx.com/support/answers/30966.htm

The error is as below..
----------------------------------
ERRORlace:1064 - The delay controller "PCI_CORE/XPCI_IDC0" has
been locked
with the following location constraint:COMP "PCI_CORE/XPCI_IDC0"
LOCATE = SITE "IDELAYCTRL_X0Y2"
LEVEL 1
However, none of the delay elements calibrated by this controller
are being used. The delay controller should be removed from the
design. Please correct your design and rerun. For more details, please
search the Xilinx Answers Database at
http://www.xilinx.com/support/answers/index.htm.
-----------------------------------

As the errors says "none of the delay elements calibrated by this
controller are being used" -- I don't
understand this. I use synplify and checked the synthesized
netlist(rtl view and technology view) and I see IODELAY blocks
instantiated.

Any help is appreciated.

Thanks
Pablo

 

[Symon]

"TehPron" <spamgoeshere9@yahoo.com> wrote in message
news:cfac168f-89cb-4be5-9c52-83381983e32d@f63g2000hsf.googlegroups.com...

Moron...

Is that directed at me? If so, many thanks for your expert opinion. It's
especially ironic to receive a rebuke from the guy who's apparently taken it
upon himself to splatter usenet with replies to messages that he considers
spam. I find it interesting that despite your enthusiastic, if somewhat
irritating, personal crusade against spammers, you don't seem overly worried
about folks posting questions about subjects on which they seem to have done
absolutely no research whatsoever.

I also notice you chose to not sign your post with your name. However,
unless I'm mistaken, you appear to be posting from the same IP address as
'Rickman'. You know, the guy who has trouble multiplying negative numbers
together (see 2nd link below). Is this a coincidence?

http://groups.google.com/group/comp.arch.fpga/msg/87da3b0b4ada5e95?dmode=source
http://groups.google.com/group/comp.lang.vhdl/msg/4e0566f1a5d75d52?hl=en&dmode=source

Hugs and kisses, Syms. xx

 

[Symon]

"james" <george@washington.edu> wrote in message
news:qtkfc41rp279t350cld5dn0de2ltg1nqak@4ax.com...

|++++++++++++++++++

Oh no the internet question police has struck!!!!!!

Be afraid! Be very afraid!

james

Hi James,

Fair enough. It just that sometimes the sheer selfishness of people's posts
really get to me. The guy clearly never even bothered to enter the terms of
his question into a search engine, yet expects folks who post here to help
him out on a subject which is well covered both on the vendors' websites and
in the archives of this newsgroup.

And...excessive...use...of...bloody...ellipsises...wind...me...up...

Anyway, believe it or not, I was trying to help the guy ask better questions
to get better answers. That link I posted has helped me many times.

Cheers, Syms.

 

[MM]

Thanks HTH and Mikhail.

HTH = Hope This Helps ))

 

[Symon]

"TehPron" <spamgoeshere9@yahoo.com> wrote in message
news:cfac168f-89cb-4be5-9c52-83381983e32d@f63g2000hsf.googlegroups.com...

Moron...

Is that directed at me? If so, many thanks for your expert opinion. It's
especially ironic to receive a rebuke from the guy who's apparently taken it
upon himself to splatter usenet with replies to messages that he considers
spam. I find it interesting that despite your enthusiastic, if somewhat
irritating, personal crusade against spammers, you don't seem overly worried
about folks posting questions about subjects on which they seem to have done
absolutely no research whatsoever.

I also notice you chose to not sign your post with your name. However,
unless I'm mistaken, you appear to be posting from the same IP address as
'Rickman'. You know, the guy who has trouble multiplying negative numbers
together (see 2nd link below). Is this a coincidence?

http://groups.google.com/group/comp.arch.fpga/msg/87da3b0b4ada5e95?dmode=source
http://groups.google.com/group/comp.lang.vhdl/msg/4e0566f1a5d75d52?hl=en&dmode=source

Hugs and kisses, Syms. xx

 

[Symon]

"james" <george@washington.edu> wrote in message
news:qtkfc41rp279t350cld5dn0de2ltg1nqak@4ax.com...

|++++++++++++++++++

Oh no the internet question police has struck!!!!!!

Be afraid! Be very afraid!

james

Hi James,

Fair enough. It just that sometimes the sheer selfishness of people's posts
really get to me. The guy clearly never even bothered to enter the terms of
his question into a search engine, yet expects folks who post here to help
him out on a subject which is well covered both on the vendors' websites and
in the archives of this newsgroup.

And...excessive...use...of...bloody...ellipsises...wind...me...up...

Anyway, believe it or not, I was trying to help the guy ask better questions
to get better answers. That link I posted has helped me many times.

Cheers, Syms.

 

[MM]

Thanks HTH and Mikhail.

HTH = Hope This Helps ))

 

[Symon]

"TehPron" <spamgoeshere9@yahoo.com> wrote in message
news:cfac168f-89cb-4be5-9c52-83381983e32d@f63g2000hsf.googlegroups.com...

Moron...

Is that directed at me? If so, many thanks for your expert opinion. It's
especially ironic to receive a rebuke from the guy who's apparently taken it
upon himself to splatter usenet with replies to messages that he considers
spam. I find it interesting that despite your enthusiastic, if somewhat
irritating, personal crusade against spammers, you don't seem overly worried
about folks posting questions about subjects on which they seem to have done
absolutely no research whatsoever.

I also notice you chose to not sign your post with your name. However,
unless I'm mistaken, you appear to be posting from the same IP address as
'Rickman'. You know, the guy who has trouble multiplying negative numbers
together (see 2nd link below). Is this a coincidence?

http://groups.google.com/group/comp.arch.fpga/msg/87da3b0b4ada5e95?dmode=source
http://groups.google.com/group/comp.lang.vhdl/msg/4e0566f1a5d75d52?hl=en&dmode=source

Hugs and kisses, Syms. xx

 

[Symon]

"james" <george@washington.edu> wrote in message
news:qtkfc41rp279t350cld5dn0de2ltg1nqak@4ax.com...

|++++++++++++++++++

Oh no the internet question police has struck!!!!!!

Be afraid! Be very afraid!

james

Hi James,

Fair enough. It just that sometimes the sheer selfishness of people's posts
really get to me. The guy clearly never even bothered to enter the terms of
his question into a search engine, yet expects folks who post here to help
him out on a subject which is well covered both on the vendors' websites and
in the archives of this newsgroup.

And...excessive...use...of...bloody...ellipsises...wind...me...up...

Anyway, believe it or not, I was trying to help the guy ask better questions
to get better answers. That link I posted has helped me many times.

Cheers, Syms.

 

[MM]

Thanks HTH and Mikhail.

HTH = Hope This Helps ))