EDK : FSL macros defined by Xilinx are wrong

Scott Willis wrote:
Was the Xilinx powerpc core ever produced for the Vertex II device?
Yes, this family was called Virtex-II Pro and has been in volume
production for quite some time now.

Ed
 
"Scott Willis" <scot.willis@gmail.com> wrote in message
news:1144869827.134075.105090@i40g2000cwc.googlegroups.com...
II device?
See Virtex-IIPro
 
"Antti" <Antti.Lukats@xilant.com> wrote in message
news:1144871856.409373.98500@e56g2000cwe.googlegroups.com...
noway! you cant cheat!

there is software programming involved!
-----
I realize what I'll be implementing in the FPGA to interface between the
existing FPGA programming drivers in our operating system and the SPI will
be "software" in a sense. I don't maintain and expand the OS and those
folks are sometimes too burdened to take on extra "nice to have" tasks,
hence my desire to find a reprogramming interface that supports both
bit-bang Slave Serial and reprogramming of the SPI flash for development
(dozens of platforms).
-----
xilinx is maybe adding indirect spi flash programming in ISE 9 or 10,
so if you wait...

Antti
PS both Altera and Lattice support direct SPI flash programming from
Quartus/ispLEVER
-----
Direct programming from the parallel cable or direct programming through
some FPGA interface? I'm looking for a solution on everyones' desks, not
just the FPGA developer's. I can use the XSPI utility separate from Project
Navigator without concern.
 
"John_H" <johnhandwork@mail.com> schrieb im Newsbeitrag
news:q8d%f.5598$kg.1095@news02.roc.ny...
"Antti" <Antti.Lukats@xilant.com> wrote in message
news:1144871856.409373.98500@e56g2000cwe.googlegroups.com...
noway! you cant cheat!

there is software programming involved!
-----
I realize what I'll be implementing in the FPGA to interface between the
existing FPGA programming drivers in our operating system and the SPI will
be "software" in a sense. I don't maintain and expand the OS and those
folks are sometimes too burdened to take on extra "nice to have" tasks,
hence my desire to find a reprogramming interface that supports both
bit-bang Slave Serial and reprogramming of the SPI flash for development
(dozens of platforms).
-----
xilinx is maybe adding indirect spi flash programming in ISE 9 or 10,
so if you wait...

Antti
PS both Altera and Lattice support direct SPI flash programming from
Quartus/ispLEVER
-----
Direct programming from the parallel cable or direct programming through
some FPGA interface? I'm looking for a solution on everyones' desks, not
just the FPGA developer's. I can use the XSPI utility separate from
Project Navigator without concern.

direct means from vendors tools using standard jtaga no that X_SPI s***
-
whatever you are looking for you have out-smarted me! what is that magic
thing that is one everones desks and what could allow SPI programming ??

anyway nomatter what it is, as I have said its its very likely NO NO NORWAY.


Antti
 
"Antti Lukats" <antti@openchip.org> wrote in message
news:e1jrgd$59j$1@online.de...
<snip>
whatever you are looking for you have out-smarted me! what is that magic
thing that is one everones desks and what could allow SPI programming ??

anyway nomatter what it is, as I have said its its very likely NO NO
NORWAY.


Antti

The magic thing I have is the target FPGA in a system that has a processor
with our own OS drivers with ethernet and USB connectivity that are live
before the FPGA is ever programmed. I couldn't reconfigure the FPGA's SPI
configuration memory on everybody's desk without external tools (JTAG,
ByteBlaster, Parallel Cabe IV) if the FPGA were the only smarts on the
board.
 
John_H wrote:
Greetings,

I'd like to program my Spartan3E with an SPI memory normally. For
development at my desk, I understand I can add a header to allow IMPACT to
configure the SPI flash memory.

We have many legacy designs that bit-bang the FPGA to program it in slave
serial mode allowing (re)configuration by software, typically with no
configuration RAM in the first place.

Rather than getting the software folks to write the SPI driver to reprogram
the SPI memory through an equivalent bit-bang, I'd be interested in a
readback of a slave-serial programmed FPGA by the FPGA while the FPGA is
active to directly program the SPI memory with my own internal routines.

--> Any ideas on whether I can accomplish this or how best to approach it?

While writing this post I came to realize the external readback would be on
the passive slave port, not the SPI side so the SPI persistence setting
isn't an issue. But will I need to double-up the passive serial port to do
the readback through other I/O pins?
I'm sorry, I don't follow what you're trying to do here. However, if
it helps, I can point to a couple of potential "helper" designs.

For the Spartan-3E Starter Kit board, there is a reference design that
allows you to program the SPI serial Flash via the 9-pin RS-232 port on
the board. The FPGA contains an embedded PicoBlaze controller that
performs the actual programming.

The reference design and a short overview presentation are available at
the following link.

PicoBlaze SPI Flash Programmer for the Spartan-3E Starter Kit Board
http://www.xilinx.com/products/boards/s3estarter/reference_designs.htm#picoblaze_spi_flash_programmer

The board documentation, if it helps, is available at the following
link. The chapter on SPI Flash also talks about the XSPI option, which
uses an external header and a parallel-to-JTAG cable. The document is
rather large because it also contains the board schematics.

UG230: Spartan-3E Starter Kit Board User Guide [11 MB]
http://www.xilinx.com/bvdocs/userguides/ug230.pdf

This is also a reference deisgn using MicroBlaze, linked below.

Using SPI Serial Flash on the Xilinx Spartan-3E Starter Kit Board
http://www.xilinx.com/products/boards/s3estarter/reference_designs.htm#serial_flash

Does any of this help your cause?

---------------------------------
Steven K. Knapp
Applications Manager, Xilinx Inc.
General Products Division
Spartan-3/-3E FPGAs
http://www.xilinx.com/spartan3e
---------------------------------
The Spartan(tm)-3 Generation: The World's Lowest-Cost FPGAs.
 
"John_H" <johnhandwork@mail.com> schrieb im Newsbeitrag
news:zWf%f.5617$kg.104@news02.roc.ny...
"Antti Lukats" <antti@openchip.org> wrote in message
news:e1jrgd$59j$1@online.de...
snip
whatever you are looking for you have out-smarted me! what is that magic
thing that is one everones desks and what could allow SPI programming ??

anyway nomatter what it is, as I have said its its very likely NO NO
NORWAY.


Antti


The magic thing I have is the target FPGA in a system that has a processor
with our own OS drivers with ethernet and USB connectivity that are live
before the FPGA is ever programmed. I couldn't reconfigure the FPGA's SPI
configuration memory on everybody's desk without external tools (JTAG,
ByteBlaster, Parallel Cabe IV) if the FPGA were the only smarts on the
board.

gosh, writing SPI flash is 26 lines of C-source code, are you really SOO
lazy that you are looking into possibilities to do it without doing any
programming ??

antti
 
Thanks to all for the response.

I have a Vertex II device and prototype board and not the Vertex II
Pro.
I suspected that it was not available on the Vertex II device (nonPro
versiont) but thought I'd ask anyway.

Scott
 
Antti Lukats wrote:
gosh, writing SPI flash is 26 lines of C-source code, are you really SOO
lazy that you are looking into possibilities to do it without doing any
programming ??

antti
I'm a hardware guy, not software. I can write disposable software but
not code for our product. In our company, the software responsibility
for drivers resides with software professionals responsible for
maintaining and troubleshooting the production code.

Similar provisions were made by hardware for direct programming of a
different configuration memory configuration but the software folks
never had the time or inclination to write 26 lines of code because of
schedule and priorities rather than laziness.

By taking on the task myself in hardware (Steve Knapp's pointer to a
PicoBlaze solution might take care of me) I don't have to rely on those
who don't understand the convenience of having a clean system to update
the configuration memory.
 
Antti wrote:
the picoblaze solution DOES INCLUDE software so dont get rid of the
software anyway!

using no software but plain FPGA hardware (no softcore processor!) for
SPI flash programming is really not reasonable. So whatever you do you
end up wíth some piece of software be it in the host computer or
inside the FPGA
What John meant was not as much 'no software' as
'no external(other person's) software' - it's a
demarkation issue, more than a technical one.

-jg
 
lecroy7200,

While it is true that we don't specify a LVDS clock that high in
frequency, the IO is perfectly capable of going way past 1.2GHz, so it
becomes a question of duty cycle distortion on the clock resources inside.

It won't be 45/55% like the spec sheet says, but it will still have a
perfectly good pulse there. Obviously National is using this. Since
they are using it, that makes Xilinx kind of responsible for some
support of this application. What that means is that if you use it the
way they did, we will support it (wiring, t-lines, terminations, paths
used, speed grade, etc.).

Similar to the PCI interface, the basic PCI operates outside of our
specifications, but we support it, as we have tested our PCI core in our
parts, and found it to work just fine.

This is known as support of "application outside of specification." If
you are curious, there are very few of these. PCI is the largest.
After that, I would guess you fall into something like the National
application (very small compared with the overall usage).

Austin

lecroy7200@chek.com wrote:

I was watching Avnets' sponcered video with Robert Pease and Howard
Johnson where National had a board with a ADC08D1500 dual ADC tied
directly into a Virtex 4. The videos, datasheets, etc may be found at:

http://www.national.com/xilinx/

The LVDS clock coming from the ADC is 750MHz. They route this clock
directly to the Virtex 4. When I look at the specs. for the Virtex 4,
this would seem to be way outside of what it is rated for.

My question is this, did National do some neat trick to make this work,
or did they just exceed the specs of the device knowing it was not a
production unit and did not really worry about it? Or did I miss
something?

Also, if anyone purchased the eval. board, I would be interested in
hearing if U5 was populated with the LMH6550 or some other part.

Thanks
 
The LVDS clock coming from the ADC is 750MHz. They route this clock
directly to the Virtex 4. When I look at the specs. for the Virtex 4,
this would seem to be way outside of what it is rated for.

My question is this, did National do some neat trick to make this work,
or did they just exceed the specs of the device knowing it was not a
production unit and did not really worry about it? Or did I miss
something?

IIRC:
8 bits @ 1.5 Ghz sample clock => 16 bits @ 375 MHz DDR clk to FPGA

The National A/D's have an on-board 1:2 demux, so at a clock rate
of 1.5 Ghz, the 8 bit samples come out 16 bits wide with the DCLK
output clock selectable as either SDR (750 Mhz) or DDR (375 MHz).

No out of spec handwaving dispensations are required from San Jose.

Brian

p.s.
Re your other post, the new high-end LatticeSC parts are
claiming 2Gbps parallel LVDS I/O, with some interesting
split-to-VTT and center-tap-cap on-chip termination modes.
 
"Marco" <marco@marylon.com> schrieb im Newsbeitrag
news:1144999372.724233.229220@u72g2000cwu.googlegroups.com...
Hi,
I'll not use PROG_B with my Spartan3, should I just pull-it up with
10k?
Is it true that I can alway access the FPGA through the JTAG port even
if the M0-M2 are hardware-set for slave/master serial?
Thanks, Marco

yes m0,m1,m2 are dont cared for JTAG but PROG_B *must* be high or jtag
config will fail, there I think it supposed to be internal pullup on prog_b
but at least with xilinx virtex I have seen that external pullup is also
required, so better have it in place

antti
 
Karl wrote:
If anyone knows of any 2C70 boards, do let us know.

You're lucky !

The Lead-Free / RoHS compliant version of the Cyclone II based DSP
board will be with the EP2C70 !
Thanks Karl, that sounds very promising. I couldn't find any info on it
alas. Do you have any idea of when and how much?

Cheers,
Tommy
 
<jaxato@gmail.com> schrieb im Newsbeitrag
news:1145130612.059195.298690@i40g2000cwc.googlegroups.com...
Hi everyone,

As I was buying some components from the Xilinx online store this
morning, I noticed that they no longer support silicon device anymore.
It seems that it is now AVNET that is taking care of distributing
Xilinx FPGA online. The worse thing is that the price is more
expensive, and they do not have all the parts that Xilinx use to offer
(the part I am looking for specially).
Now i've got a few questions for the Xilinx people out there. Is it
really true or if it not, then what is the updated link for your online
section.

Many thanks
Jacques

avnet possible did not like that xilinx sold directly so xilinx had to
remove the silicon devices from their online shop :(
really very bad move !

Antti
 
Jim Granville wrote:

* I tried MAX7000, and get this bemusing response

emp7
"Manufacturer Part Number: 132 phrase not found"

What, nothing at all ?

Funny, phrase not found reported, plus a _specific_ number ?! -
so I click on the 'phrase not found', as that seems to be
a web link, and voila, finally, EPM7xx listings at Digikey!

Strange that, MAX 3000 works fine - so, some wrinkles to iron out here...
A little more on this :
Seems strange indeed, as the 'phrase not found' seems to be trying to
indicate not in stock. Only devices with MOQs and high ASPs show up.
Their search button is also called "phrase not found" - oops

However, if I go straigt to Digikey, there are actually plenty of
EPM7xx in stock, with no MOQs ?!

Altera will be eager to fix that :)

-jg
 
Hello everyone,

Well I have checked on Digikey and they do not have the FPGA we need,
which is the XC3S200-4VQ100C. We have dealt in the past with
Nuhorizons, but we've got some issues with them and we would prefer to
deal directly with god. The Xilinx online shop was next to perfect and
the fact that they were shipping our parts in different shipments was
actually beneficial for us. It saved us on custom and duties that we
had to pay, if we were to receive the parts as a whole. We are a small
startup company and we have long term plans for Xilinx FPGA products.
We had reached the point where we had everything running smoothly, like
after fine tuning your radio receiver to the correct station, but now,
we have to rework everything and adjust everything again. Tonite I am
disappointed with Xilinx. :~(

Jacques
 
Well, I'll try another attack on our demonstrated stupidity.
I have screamed and hollered for almost a year, and sent e-mails up the
ladder, up to one step below the very top.
Maybe I have to go one stop higher.
Steve Knapp and I are very frustrated about this situation.
Obviously, our company could do much better...
Peter Alfke, from home
 
"Jim Granville" <no.spam@designtools.co.nz> wrote in message
news:44418deb@clear.net.nz...
Antti Lukats wrote:

jaxato@gmail.com> schrieb im Newsbeitrag
news:1145130612.059195.298690@i40g2000cwc.googlegroups.com...

Hi everyone,

As I was buying some components from the Xilinx online store this
morning, I noticed that they no longer support silicon device anymore.
It seems that it is now AVNET that is taking care of distributing
Xilinx FPGA online. The worse thing is that the price is more
expensive, and they do not have all the parts that Xilinx use to offer
(the part I am looking for specially).
Now i've got a few questions for the Xilinx people out there. Is it
really true or if it not, then what is the updated link for your online
section.

Many thanks
Jacques


avnet possible did not like that xilinx sold directly so xilinx had to
remove the silicon devices from their online shop :(
really very bad move !
But avnet won't give samples unless your a large
company otherwise you have to purchase them.


Yes, it does smack more of political reflex, than rational thinking.

Note that Microchip is moving in the _opposite_ direction - they offer
quotes up to 10K, and recently added factory programming flows to their
on-line order flows.
In other words, they look keen for your business (all volumes), and seem
less under the influence of their distributors.
If only they had some chips with a bit more grunt
like an arm7 .

A lot of manufacturers need to learn from microchip.

Philips is quite good, but depends on your local distributor.

I had a quick look at the Avnet link, and "not in stock, XX Weeks" was
common.

Thus Xilinx sample procurement seems to have fallen thru the cracks, in
this decision.

-jg
Simple , avoid using xilinx parts.
Use the companies that want your business.

If the management is to stupid to realise if people
can't get small quantities for prototyping and designs
especially for those doing contract work, we won't use their products,
bad luck ,that is their problem.

Might take a few years to have a budget impact.

Alex
 
hi everybody,

maybe we can do a petition about this xilinx store ?...
i'm French user and i can affirm that Avnet France, preferer (to not says
want ) only big customers ..
they are slow and expensive.. totaly incompatible with prototype phase.

Maybe Xilinx prefer that we try Lattice or others parts ?...

i'm realy not happy against that problem. they can be take example from
Microchip & sample service ...

( sorry for my bad english ! )


Regard's
Philippe




<jaxato@gmail.com> a écrit dans le message de
news:1145130612.059195.298690@i40g2000cwc.googlegroups.com...
Hi everyone,

As I was buying some components from the Xilinx online store this
morning, I noticed that they no longer support silicon device anymore.
It seems that it is now AVNET that is taking care of distributing
Xilinx FPGA online. The worse thing is that the price is more
expensive, and they do not have all the parts that Xilinx use to offer
(the part I am looking for specially).
Now i've got a few questions for the Xilinx people out there. Is it
really true or if it not, then what is the updated link for your online
section.

Many thanks
Jacques
 

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