EDK : FSL macros defined by Xilinx are wrong

[Tier Logic]

The extra processing steps for the TFT do cost more. However, the die
size reduction swamps that out to create a low cost FPGA. The ASIC
gets rid of that extra cost and benefits from the yield improvement
for an even lower cost solution.

All I can tell you is come get a quote and we can save you money.
Xilinx and Altera love all the skepticism here and want you to
conitnue paying too much for your solutions.

Regards,

Jeff

 

[whygee]

Hello,

Tier Logic wrote:

All I can tell you is come get a quote and we can save you money.
it is a curious statement !

I assume that you have been too long in "stealth mode".

Now I tell you this :
"show me your public price list, your products,
demo boards, detailed datasheet and distributors.
Then maybe I'll choose you for a project".

I'll take the example of a competitor.
SiliconBlue has maybe "slow" chips
(according to only one test I did) but they got
it almost right for the rest, at least for me :
- decent development tool (not bloated)
that installs easily on Linux AND Windows !
- datasheet and other informations, enough to understand
how it is ticking inside so it can be used
- at least one distributor that talks to anyone
(even though the distributor is not large,
at least it does its job and doesn't scare potential customers)
- unit price that is decent is small quantities.
- ultra-low power is a plus but not critical for me.

And still it's not functional enough for me.
Antti has developped for it and I'm curious.
Now before you can save me money, try to beat SBt,
and then... beat the others
The Actel ProAsic3 family is working very fine
for me and wonder how it can be displaced.

good luck,

Regards,
Jeff
yg

--
http://ygdes.com / http://yasep.org

 

[whygee]

-jg wrote:

On Mar 12, 10:31 am, whygee <y...@yg.yg> wrote:
We have ProASIC3 and SiliconBlue on a short list.
[maybe SmartFusion too, depends on $/package choices]
wait a bit before things stabilize

and the distributors sing to the same tune.

I met Future and Actel France
today at the annual parisian Actel seminar,
I was not interested by their new offering,
I'm waiting for an eventual next generation with
a better SRAM/logic ratio.

I'm interested in how much slower
were the SiliconBlue devices ?
What tests did you do to compare them ?
disclaimer : I'm not as good as Antti ;-)

HE has the boards and can tell more acurate
stories than mine.

I "only" installed their SW, and tried to
compile a simple adder design, probably
http://yasep.org/VHDL/asu_rop2/testdiff.vhd (test nr 1)
http://yasep.org/VHDL/asu_rop2/ASU_ROP2_16.vhd
and got such a low MHz rating that I thought
that I hit the wrong button or something like that.
I tweaked many stuff and could not influence
the result much, tried different architectures...
and I gave up.
It just means that it did not meet my expectations.
I know that SBt's chips are created for ultraultralow power
and low speed. I'm not expecting Virtex performance
but i'm demanding anyway ;-)

If you want acurate figures, I prefer that you
try yourself, because i'm not sure why it is slow.
i've read "80MHz performance" or something like that
in the datasheets at the time
but like other FPGA claims, i'm not able to reach them.
I've seen people able to do about 300MHz designs
with ProASIC, I can only do 100MHz and Actel's
soft ARM maxes at around 60MHz... for a chip that
is meant to be "able of 350MHz".

so test yourself

-jg
yg

--
http://ygdes.com / http://yasep.org

 

[Raymund Hofmann]

On 11 Mrz., 21:19, Tier Logic <jeff.ka...@gmail.com> wrote:

The extra processing steps for the TFT do cost more. However, the die
size reduction swamps that out to create a low cost FPGA. The ASIC
gets rid of that extra cost and benefits from the yield improvement
for an even lower cost solution.

All I can tell you is come get a quote and we can save you money.
Xilinx and Altera love all the skepticism here and want you to
conitnue paying too much for your solutions.

Isnt the biggest area in FPGAs covered by routing (lines & switches)
which are still present in Tier Logic?

Anyway it looks interesting to me and i have registered to evaluate
further...

But one thing i am concerned with is design security of the
programmable devices.

 

[Peter Alfke]

On Mar 11, 12:19 pm, Tier Logic <jeff.ka...@gmail.com> wrote:

Xilinx and Altera love all the skepticism here and want you to
conitnue paying too much for your solutions.

Regards,

Jeff

Jeff, you should be ashamed of that cheap shot, especially when Austin
earlier today invited the audience to check out your alleged lower
prices.
I can understand when a newcomer is aggressive in his claims, and
nebulous in his explanations. But do not get sarcastic and nasty.
You still have a lot to prove before you can climb on a high horse.
Peter Alfke

 

[-jg]

On Mar 12, 9:19 am, Tier Logic <jeff.ka...@gmail.com> wrote:

All I can tell you is come get a quote and we can save you money.
Xilinx and Altera love all the skepticism here and want you to
conitnue paying too much for your solutions.

So you have real, shipping silicon ? Great!

You claim 'we can save you money', Great too!!
- I love a clairvoyant supplier, who knows already
what packages and prices points I have!!.

- now tell me what packages, speeds and logic counts
you offer, as before I can _actually_ 'save money' here in the real
world, first the product actually has to be functional in a circuit
board that I can sell !!

-jg

 

[-jg]

On Mar 12, 10:31 am, whygee <y...@yg.yg> wrote:

I'll take the example of a competitor.
SiliconBlue has maybe "slow" chips
(according to only one test I did)....
The Actel ProAsic3 family is working very fine
for me and wonder how it can be displaced.

We have ProASIC3 and SiliconBlue on a short list.
[maybe SmartFusion too, depends on $/package choices]

I'm interested in how much slower were the SiliconBlue devices ?
What tests did you do to compare them ?

-jg

 

[rickman]

On Mar 11, 4:31 pm, whygee <y...@yg.yg> wrote:

Hello,

Tier Logic wrote:
All I can tell you is come get a quote and we can save you money.

it is a curious statement !
I assume that you have been too long in "stealth mode".

Now I tell you this :
"show me your public price list, your products,
demo boards, detailed datasheet and distributors.
Then maybe I'll choose you for a project".

I'll take the example of a competitor.
SiliconBlue has maybe "slow" chips
(according to only one test I did) but they got
it almost right for the rest, at least for me :
  - decent development tool (not bloated)
     that installs easily on Linux AND Windows !
  - datasheet and other informations, enough to understand
     how it is ticking inside so it can be used
  - at least one distributor that talks to anyone
     (even though the distributor is not large,
      at least it does its job and doesn't scare potential customers)
  - unit price that is decent is small quantities.
  - ultra-low power is a plus but not critical for me.

And still it's not functional enough for me.
Antti has developped for it and I'm curious.
Now before you can save me money, try to beat SBt,
and then... beat the others
The Actel ProAsic3 family is working very fine
for me and wonder how it can be displaced.

good luck,

I'm curious, how many devices do you use in a year. I will bet if you
use less than 100k and possibly, 1 million, you won't get their
attention or even a quote.

Any takers?

Rick

 

[whygee]

hi rick !

rickman wrote:

On Mar 11, 4:31 pm, whygee <y...@yg.yg> wrote:
Now before you can save me money, try to beat SBt,
and then... beat the others
The Actel ProAsic3 family is working very fine
for me and wonder how it can be displaced.

good luck,

I'm curious, how many devices do you use in a year.
less than you

I have been qualified as a "creative" kind of guy by
the Actel France manager. I have a very small, specialised
niche market around Paris and I love it this way.

I will bet if you use less than 100k and possibly,
1 million, you won't get their attention or even a quote.
I can get quotes from others, so why not from TierLogic ?

Any takers?
I'm curious

Rick
yg

--
http://ygdes.com / http://yasep.org

 

[whygee]

John_H wrote:

They quoted "free NRE" for a purchase commitment of $100k, I believe.
So if you want $100k worth of parts, I think they're already on board.
It just mean that their scheme accepts cheques > $100K ;-)

I just don't have a clue as to whether these are low cost and
performance devices, high performance and high density chips, or just
what they're shooting for.
I don't even see a simple mention of the characteristics

of the actual devices proposed. How many LUTs ?
what goodies ? (PLL ? ROM ? SRAM ? DDR ?...)

Whatever.
yups.

--
http://ygdes.com / http://yasep.org

 

[John_H]

On Mar 12, 10:22 pm, rickman <gnu...@gmail.com> wrote:

I'm curious, how many devices do you use in a year.  I will bet if you
use less than 100k and possibly, 1 million, you won't get their
attention or even a quote.

Any takers?

Rick

They quoted "free NRE" for a purchase commitment of $100k, I believe.
So if you want $100k worth of parts, I think they're already on board.

I just don't have a clue as to whether these are low cost and
performance devices, high performance and high density chips, or just
what they're shooting for. If they don't hit the aggressive
production nodes for the base layers (with a coarser layer 9 metal
mask process for a cheaper customization) then how can they truly
compete on the piece costs given the overhead for routing resources?

Whatever.

 

[rickman]

On Mar 13, 8:04 am, John_H <newsgr...@johnhandwork.com> wrote:

On Mar 12, 10:22 pm, rickman <gnu...@gmail.com> wrote:



I'm curious, how many devices do you use in a year.  I will bet if you
use less than 100k and possibly, 1 million, you won't get their
attention or even a quote.

Any takers?

Rick

They quoted "free NRE" for a purchase commitment of $100k, I believe.
So if you want $100k worth of parts, I think they're already on board.

I just don't have a clue as to whether these are low cost and
performance devices, high performance and high density chips, or just
what they're shooting for.  If they don't hit the aggressive
production nodes for the base layers (with a coarser layer 9 metal
mask process for a cheaper customization) then how can they truly
compete on the piece costs given the overhead for routing resources?

Whatever.

Costs are a complex issue. Lattice does not use the same process
feature size as X or A and yet is very price competitive. X and A are
going for the highest technology to gain the optimum advantage in the
high end markets they focus on. But you can save a lot of NRE by
hanging back a generation or two and using less expensive and more
fully depreciated equipment. It all depends on what you are trying to
build. If you don't want to put a billion transistors on a die, or
don't want to pay for that, then less aggressive technology can be
very cost competitive.

As an example, show me a part from Xilinx or Altera that sells for
under $10 in qty 100. I don't care what size, but an FPGA, not a
CPLD. I am using the smallest part I can get (although I would like
bigger, it just doesn't come in the 100 TQFP) and am paying under $10
making batches of 100-200 boards at a time. I couldn't find that
price anywhere else but Lattice.

Rick

 

[rickman]

On Mar 13, 8:54 am, whygee <y...@yg.yg> wrote:

hi rick !

rickman wrote:
On Mar 11, 4:31 pm, whygee <y...@yg.yg> wrote:
Now before you can save me money, try to beat SBt,
and then... beat the others
The Actel ProAsic3 family is working very fine
for me and wonder how it can be displaced.

good luck,

I'm curious, how many devices do you use in a year.

less than you

I have been qualified as a "creative" kind of guy by
the Actel France manager. I have a very small, specialised
niche market around Paris and I love it this way.

I will bet if you use less than 100k and possibly,

 > 1 million, you won't get their attention or even a quote.
I can get quotes from others, so why not from TierLogic ?

I don't understand the question. The point is they can't make enough
money from a small user to make it worth their while. So they exclude
the engineers that won't make them much money and deal with the flak
from that rather than get a bad rep from not being able to support
every engineer with a wild hair.

What part of this is hard to understand?

Heck, I get my share of contacts from people who just want free
advice. I have to cut them off at some point and continue to look for
paying customers.

Rick

 

[whygee]

hi,

rickman wrote:

What part of this is hard to understand?
none.

Heck, I get my share of contacts from people who just want free
advice. I have to cut them off at some point and continue to look for
paying customers.
I understand.

I can't count the neighbours who asked me to repair their stuff...
I keep repeating "I design, I don't repair others' stuff".

good luck,

Rick
yg

--
http://ygdes.com / http://yasep.org

 

[Uwe Bonnes]

rickman <gnuarm@gmail.com> wrote:
....

As an example, show me a part from Xilinx or Altera that sells for
under $10 in qty 100. I don't care what size, but an FPGA, not a
CPLD. I am using the smallest part I can get (although I would like
bigger, it just doesn't come in the 100 TQFP) and am paying under $10
making batches of 100-200 boards at a time. I couldn't find that
price anywhere else but Lattice.

The XC3S50A-4VQG100C sells for 5.52$ at Digikey
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

 

[rickman]

On Mar 14, 8:26 am, Uwe Bonnes <b...@elektron.ikp.physik.tu-
darmstadt.de> wrote:

rickman <gnu...@gmail.com> wrote:

...

As an example, show me a part from Xilinx or Altera that sells for
under $10 in qty 100. I don't care what size, but an FPGA, not a
CPLD. I am using the smallest part I can get (although I would like
bigger, it just doesn't come in the 100 TQFP) and am paying under $10
making batches of 100-200 boards at a time. I couldn't find that
price anywhere else but Lattice.

The XC3S50A-4VQG100C sells for 5.52$ at Digikey

Ok, the way I made the statement I stand corrected. Someone else
emailed me about Actel parts in this price range. But these parts
have half the logic of the Lattice part. The Actel part in the same
size range is half again as pricey and the Xilinx part in the same
size range is about the same price, but lacking the config memory.

The point is that using an older process (130 nm) Lattice is competing
with products built on newer processes (90 nm Spartan 3A, et al).

Rick

 

[rickman]

On Mar 14, 9:04 am, whygee <y...@yg.yg> wrote:

hi,

rickman wrote:
What part of this is hard to understand?

none.

Heck, I get my share of contacts from people who just want free
advice.  I have to cut them off at some point and continue to look for
paying customers.

I understand.
I can't count the neighbours who asked me to repair their stuff...
I keep repeating "I design, I don't repair others' stuff".

good luck,

Yeah, I also get people asking me about their house wiring!

:^)

 

[whygee]

-jg wrote:

On Mar 15, 4:25 am, rickman <gnu...@gmail.com> wrote:
The point is that using an older process (130 nm) Lattice is competing
with products built on newer processes (90 nm Spartan 3A, et al).

Yes, and your example shows a gap : As the FPGAs push higher in pin-
counts and packages, they leave a widening tail-end, where you need a
low-mfg-cost package, but a CPLD does not cut it.

I believe there is another market opening, for a device that has more
ram, but not massive I/O counts.

I see Actel and SiliconBlue trying to fill this market.
It's interesting, I did not understand their effort in
the beginning... And now that I have needs for exactly that
(i'm trying to displace/replace my classic ľC), they are welcome

-jg
yg

--
http://ygdes.com / http://yasep.org

 

[-jg]

On Mar 15, 4:25 am, rickman <gnu...@gmail.com> wrote:

On Mar 14, 8:26 am, Uwe Bonnes <b...@elektron.ikp.physik.tu-

darmstadt.de> wrote:
rickman <gnu...@gmail.com> wrote:

...

As an example, show me a part from Xilinx or Altera that sells for
under $10 in qty 100.  I don't care what size, but an FPGA, not a
CPLD.  I am using the smallest part I can get (although I would like
bigger, it just doesn't come in the 100 TQFP) and am paying under $10
making batches of 100-200 boards at a time.  I couldn't find that
price anywhere else but Lattice.

The XC3S50A-4VQG100C sells for 5.52$ at Digikey

Ok, the way I made the statement I stand corrected.  Someone else
emailed me about Actel parts in this price range.  But these parts
have half the logic of the Lattice part.  The Actel part in the same
size range is half again as pricey and the Xilinx part in the same
size range is about the same price, but lacking the config memory.

That depends on where you set the threshold.
We have an app, that needs PLL+BlockRam, and not a huge
amount of logic. - same package dictates as yours.

On this yardstick, Actel are now in front with the ProASCI3 at
$5.26/100+, but the smallest Lattice LFXP3C is $10.93/100+, the
Lattice LCMXO1200C is $11.50, whilst the XP2-5 is higher in price and
package.
Xilinx need Loader memory added to their OK price,
and the -3AN fails the package test.

Actel also have to other choices, in the same package, at $7.23 and
$8.94, so have some upgrade elasticity. [Lattice show just the one
choice]

The point is that using an older process (130 nm) Lattice is competing
with products built on newer processes (90 nm Spartan 3A, et al).

Yes, and your example shows a gap : As the FPGAs push higher in pin-
counts and packages, they leave a widening tail-end, where you need a
low-mfg-cost package, but a CPLD does not cut it.

I believe there is another market opening, for a device that has more
ram, but not massive I/O counts.

-jg

 

[Brian Drummond]

On Sun, 14 Mar 2010 08:27:06 -0700 (PDT), rickman <gnuarm@gmail.com> wrote:

On Mar 14, 9:04 am, whygee <y...@yg.yg> wrote:
hi,

I understand.
I can't count the neighbours who asked me to repair their stuff...
I keep repeating "I design, I don't repair others' stuff".

good luck,

Yeah, I also get people asking me about their house wiring!

:^)

A friend of mine, now retired, formerly involved in digital audio design at the
BBC, was getting fed up of this at a party. So, on discovering the questioner
was a marine biologist, he asked her about the best brand of fish fingers...
(US: fish sticks)



- Brian