EAGLE Netlist conversion

[Gish]

Ok,

I actually figured everything out except for one line...

E1 out ref in+ in- MAX=5V MIN=-5V opamp_gain

I'm trying to code a VCVS with maximum and minimum output values, but
PSPICE rejects the MAX and MIN parts. Any ideas?

Thanks

Gish wrote:

Hi Guys

I have some SPICE code that runs perfectly in HSPICE but will not run
in PSPICE due to issues with "subcircuit expansion." If there's any
experts out there who could take a quick look at this and let me know
what the issue might be I'd appreciate it.

Thanks


******************************************************
**** circuit description
******************************************************
rs in inp 50
r1 inp vss 1K
x1 inp inm out vss my_opamp
rf out inm 100K
r2 inm vss 1K
******************************************************
**** parameters section
******************************************************
******************************************************
**** sources section
******************************************************
v1 in vss sin(0V 60mV 10x 100ps 0)
v2 vss 0 dc 0V
******************************************************
**** specify nominal temperature of circuit in degrees C
******************************************************
.TEMP= 60
******************************************************
**** analysis section
******************************************************
.tran 1ns 200ns
.END

 

[GMM50]

GMM50 wrote:

Hello:

I'm about to release for manufacturing a 4 layer PCB
1. Top Signal
2. Ground
3. Power
4. Signal

The design rules are 8 mil lines and 8 mil spacing. And it's mostly
SMT devices.
THe board size is 16 x 10 inches.

It's been a while since I specified such a complicated (expensive)
PCB
and my notes are old.
My question is where should I look for a set of notes to add to the
detail drawing for the board.

Specifying itmes such as silk screen, soldermask, solder mask over
bare
copper, dimensions and warp and twist.
And all the other things I forgot.
THanks
George

Here's what I've come up with.
-------
Notes:
1.) PCB material: (put your material here I'm using FR4)
2.) Fabricate board in accordance with IPC-6012 (latest Revision)
Performance class 2. Board acceptability per IPC-A-600 (latest
revisi0n)
3.) Unless other wise specified tolerance - +/- 0.005"
4.) HASL finished pads.
5.) (Specify the solder mask here)
6.) (specify the silkscreen here)
7.) Boards will be 100% electrically tested.

---------
I ordered a copy of IPC-A-600 and all the requirements I'm interest in
are contained in that documents.


Thanks to all who add their 2 cents on this one.

George

 

[Leon Heller]

<rrr@ieee.org> wrote in message
news:1109601184.534929.52960@l41g2000cwc.googlegroups.com...

Hi,

I'm setting up some electronics capability at my new job, and wouldn't
mind avoiding the hefty price tags associated with OrCad and PADS, esp
as we don't look to be doing much board development. The work will be
mostly low-frequency analog, and I don't anticipate ever needing an
auto-router.

I've read favorable comments about both Easy-PC and Pulsonix here, and
am looking forward to using one of them. It would appear that Easy-PC
is a bargain, and that Pulsonix is priced in between Easy-PC and
OrCad+PADS.

Q.1. Any recommendations about the strengths of one over the other ?

They are out of the same stable, but are intended for different markets.
EasyPC is more for low-end users and Pulsonix competes with PADS, ORCAD and
Protel. It's arguably better than them and cheaper. I use it all the time.


Leon

 

[R.Lewis]

<rrr@ieee.org> wrote in message
news:1109601184.534929.52960@l41g2000cwc.googlegroups.com...

Hi,

I'm setting up some electronics capability at my new job, and wouldn't
mind avoiding the hefty price tags associated with OrCad and PADS, esp
as we don't look to be doing much board development. The work will be
mostly low-frequency analog, and I don't anticipate ever needing an
auto-router.

I've read favorable comments about both Easy-PC and Pulsonix here, and
am looking forward to using one of them. It would appear that Easy-PC
is a bargain, and that Pulsonix is priced in between Easy-PC and
OrCad+PADS.

Q.1. Any recommendations about the strengths of one over the other ?

One concern I have is that sometime in the future I may want to ship a
schematic out for someone else to lay out, and that would probably be
in PADS. Pulsonix explicitly supports a variety of netlist formats
incl PADS, so that's no problem. Easy-PC has native and generic
netlist formats. The generic looks easy to read, but that doesn't mean
PADS will read it ! I'm not too keen on writing my own translation
program, simple though it may be.

Q.2. Has anyone been down this road reading Easy-PC netlist into PADS
PowerPCB ?

Thanks for your help,
-rajeev-

There seems to be some confusion over what you are trying to achieve here.

If you want to layout pcb's use a pcb layout package. You suggest easy-pc so
why not try that?
If you want a package to draw schematics (you do not mention simulation)
then look for a schematics package that suits you.
Why do they have to be the same?

see terry pinell's excellent web page for suitable cad

http://www.terrypin.dial.pipex.com/ECADList.html

for schematics only you can probably get a freeware/shareware that will
suffice. see 'SCORE' in the above list. - there are probably others.
Any schematic that produces an EDIF netlist can probably be transported to
just about any layout CAD.
If you are not going to do much pcb layout work stick to something like
easy-pc else every time you come to do something you will spend *hours and
hours* re-learning how to use your package.

 

Right now, I want to do schematic + pcb layout. In the future I can
see
wanting to use the same schematic package, but giving the netlist to a
design house
for them to do the layout, presumably with PADS. I don't want to have
to change schematic packages at that future date. Sorry if it was
confusing. (And even sorrier if it still is ;-)

-rajeev-

 

[R.Lewis]

<rrr@ieee.org> wrote in message
news:1109620758.163283.18940@z14g2000cwz.googlegroups.com...

Right now, I want to do schematic + pcb layout. In the future I can
see
wanting to use the same schematic package, but giving the netlist to a
design house
for them to do the layout, presumably with PADS. I don't want to have
to change schematic packages at that future date. Sorry if it was
confusing. (And even sorrier if it still is ;-)

-rajeev-

In which case, as I stated before, why not pick out a schematic tool that
produces EDIF netlists then you can either import them into your own layout
CAD or send them to someone else to import into theirs.
You do not have to pay much for such tools.
You can pay a lot for E-CAD tools such as PADS, Cadstar, Protel,and the
like, and usefull they certainly are: but they contain huge piles of
bloatware aimed at the semi technical manager who sees an impressive list of
functions for the price but which are of very dubious use in practice.

 

[Sander Kool]

Hello Jamie,

The Gerber file format can be used freely. Everybody does, and
without any objection of anybody.
The same goes for the Excellon drill format.

It is brave of you to write your onw CAD software. I'm curious to see it.
I too am not so happy with the software available.

I used to work for ULTImate Technology (now merged with Electronics
Workbench
www.electronicsworkbench.com) and designed a schematic and PCB CAD
package (1985 - 1991).
Later I designed the core of their ULTIboard 2000 / V7 series.

I would be nice to help implement my new ideas somewhere.
I keep getting them.....

Sander Kool

"Jamie" <jamie_5_not_valid_after_5_Please@charter.net> wrote in message
news:fCnVd.3381$UF6.3197@fe04.lga...

i have used my own software for doing board work and
circuit drawing etc.., its a nice IDE drag & Drap system.
i did this after looking at various programs already out
there before. none of them gave me what i was looking for.
i also needed a custom interface to drive my XYZ sprayer
i made to image the copper clad instead of using photo methods.
it's slow but it works.
anyways, i been thinking of first passing around some shareware
and then later on marketing.
for mass production items i have simply been sending out images
of the boards, holes, labels to a place when i need a lot of boards
made.
---
anyways, i think that i must be able to support some common file
generated streams of known macro and script languages.
one of them comes to mind is the Gerber 274D and X i think it is.

i have the DOC's on the format, what i can't find is do i need some
kind of agreament to publish my app that will gerenate files in this
format? license maybe?

can some one elaborate on other commonly used generated formats that
board makers like to use ?

P.S.
the app also helps me in designing the cabinet, hardware anchores,
templates, panel prints ect.
they all fit into a single project, so i can create a board for example,
locate some achore studs, desinate the location in a cabinet for the screw
whole locations, any changes are made to either, ther other will respond
to a recalilation or warning indicating that it can not be performed and
must go to the other part of the project to alter its lay out if the use
wants to do the actual chance.
this means, when i use pots, sockets, connectors etc, their sizez are
put into the equations. most of the most common one's i have in libs now
so its easy to pop them in .

ok, hope to hear some input on this.

 

[ldg]

On Mon, 21 Mar 2005 15:08:39 -0700, Jim Thompson
<thegreatone@example.com> wrote:

I really am tiring of trying to help what appears to be a student,
only to have them turn on me, implying I know nothing.

You're definitely a fookin' amateur ;-)

Of course I didn't ask others recently how to search my hard drive

Regards,
Larry

 

[Paul Burke]

eeh wrote:

In Pads Logic, how to define a component with BGA pins?

For BGA package, the pin numbers are defined as

A1, A2,... A9;
B1, B2,... B9;
:
:
I1, I2,... I9;

Don't know about PADS, but can you change the letters to numbers e.g.
01,02,03...11,12,13... 21,22,23? (you can't with EasyPC, the numbers
have to be an unbroken sequence).

Otherwise you'll have to just number them and map manually.

Paul Burke

 

[Brian Aase]

Paul Burke <paul@scazon.com> wrote:

eeh wrote:
In Pads Logic, how to define a component with BGA pins?

For BGA package, the pin numbers are defined as

A1, A2,... A9;
B1, B2,... B9;
:
:
I1, I2,... I9;


Don't know about PADS, but can you change the letters to numbers e.g.
01,02,03...11,12,13... 21,22,23? (you can't with EasyPC, the numbers
have to be an unbroken sequence).

Otherwise you'll have to just number them and map manually.

Paul Burke

Tools --> Part Editor -->Edit Electrical -->General. Check the
"alphanumeric pins for part" box. This enables the Alphanumeric Pins
tab, where you will need to enter each pin number individually.
There's no auto-mapping capability that I'm aware of.

Brian Aase


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[Robert Baer]

orangeKDS@mail.ru wrote:

What is the easiest way to set initial node values with .NODESET
command in SuperSpice? As I understand default initial guess is 0 Volts
for all nodes; can that be changed to, say, 60V for all nodes?

Can it be done within .subckt so that all +pins of all subcircuit of
same model have the same initial voltage guess?


The problem is that sometimes I get 'wrong' results so I need to be
sure to get the right ones and its hard to type in .nodeset for all
nodes (probably only few are needed? but I'd like to be sure).

As i understand the .NODESET syntax, *each* node that one wishes to

set is described eXplicitly.

 

[Robert Baer]

Mike Rocket J. Squirrel Elliott wrote:

I'm an analog guy and I need for a bit of logic/adc design work done,
will pay. The design is essentially to sample the voltage on the wiper
of a potentiometer, and use it to drive one of 48 relays, depending on
the wiper voltage. The relays need to be driven in a make-before-break
style. I don't want to run any clocks in the product if at all possible.
Low-speed stuff. I reckon this is digital design 101 as taught in 1980.

Please private mail me for more information if this sounds like
no-brainer stuff to you and you have the time and are interested.

I'm located in Carlsbad, CA.
How about the wiper drive one of the inputs to N comparitors, the

other input of each of those N comparitors goes to a desired point on a
voltage divider:

<--/\/-+-/\/\-+-/\/\-+-...-+-/\/\-->
| | | |
v v v v
C1 C2 C3 ... Cn

If the taps are equally spaced, then set the hysteresis for all of
the comparitors the same, and wide for "overlap"; each output controls a
relay.

 

[Mike Rocket J. Squirrel E]

On 3/29/2005 3:08 AM Robert Baer wrote:

Mike Rocket J. Squirrel Elliott wrote:

I'm an analog guy and I need for a bit of logic/adc design work done,
will pay. The design is essentially to sample the voltage on the wiper
of a potentiometer, and use it to drive one of 48 relays, depending on
the wiper voltage. The relays need to be driven in a make-before-break
style. I don't want to run any clocks in the product if at all
possible. Low-speed stuff. I reckon this is digital design 101 as
taught in 1980.

Please private mail me for more information if this sounds like
no-brainer stuff to you and you have the time and are interested.

I'm located in Carlsbad, CA.

How about the wiper drive one of the inputs to N comparitors, the
other input of each of those N comparitors goes to a desired point on a
voltage divider:

--/\/-+-/\/\-+-/\/\-+-...-+-/\/\--
| | | |
v v v v
C1 C2 C3 ... Cn

If the taps are equally spaced, then set the hysteresis for all of the
comparitors the same, and wide for "overlap"; each output controls a relay.

Hmmm. I like the way you think! Does anyone make IC's with multiple
window comparators with something like one-pin control of hysteresis . . . ?

--
--
Mike "Rocket J Squirrel" Elliott
71 Type 2: the Wonderbus
84 Westfalia: "Mellow Yellow (The Electrical Banana)"
KG6RCR

 

[Mike Rocket J. Squirrel E]

On 3/29/2005 10:43 AM Mike Rocket J. Squirrel Elliott wrote:

On 3/29/2005 3:08 AM Robert Baer wrote:

Mike Rocket J. Squirrel Elliott wrote:

I'm an analog guy and I need for a bit of logic/adc design work done,
will pay. The design is essentially to sample the voltage on the
wiper of a potentiometer, and use it to drive one of 48 relays,
depending on the wiper voltage. The relays need to be driven in a
make-before-break style. I don't want to run any clocks in the
product if at all possible. Low-speed stuff. I reckon this is digital
design 101 as taught in 1980.

Please private mail me for more information if this sounds like
no-brainer stuff to you and you have the time and are interested.

I'm located in Carlsbad, CA.


How about the wiper drive one of the inputs to N comparitors, the
other input of each of those N comparitors goes to a desired point on
a voltage divider:

--/\/-+-/\/\-+-/\/\-+-...-+-/\/\--
| | | |
v v v v
C1 C2 C3 ... Cn
If the taps are equally spaced, then set the hysteresis for all of
the comparitors the same, and wide for "overlap"; each output controls
a relay.


Hmmm. I like the way you think! Does anyone make IC's with multiple
window comparators with something like one-pin control of hysteresis . .
. ?

The LM3916 bar/dot LED driver looks like it might just fill the bill.
Daisy-chain a few, add some relay driver ICs (what's a good 10-channel
relay/lamp driver IC?) and I might just be up and running.

--
--
Mike "Rocket J Squirrel" Elliott
71 Type 2: the Wonderbus
84 Westfalia: "Mellow Yellow (The Electrical Banana)"
KG6RCR

 

[Helmut Sennewald]

"Mike Rocket J. Squirrel Elliott"
<j.michael.elliottAT@REMOVETHEOBVIOUSgmailDOT.com> schrieb im Newsbeitrag
newsPmdnd2iT_QmKdTfRVn-pw@adelphia.com...

On 3/29/2005 10:43 AM Mike Rocket J. Squirrel Elliott wrote:

On 3/29/2005 3:08 AM Robert Baer wrote:

Mike Rocket J. Squirrel Elliott wrote:

I'm an analog guy and I need for a bit of logic/adc design work done,
will pay. The design is essentially to sample the voltage on the wiper
of a potentiometer, and use it to drive one of 48 relays, depending on
the wiper voltage. The relays need to be driven in a make-before-break
style. I don't want to run any clocks in the product if at all
possible. Low-speed stuff. I reckon this is digital design 101 as
taught in 1980.

Please private mail me for more information if this sounds like
no-brainer stuff to you and you have the time and are interested.

I'm located in Carlsbad, CA.


How about the wiper drive one of the inputs to N comparitors, the
other input of each of those N comparitors goes to a desired point on a
voltage divider:

--/\/-+-/\/\-+-/\/\-+-...-+-/\/\--
| | | |
v v v v
C1 C2 C3 ... Cn If the taps are equally spaced, then set
the hysteresis for all of the comparitors the same, and wide for
"overlap"; each output controls a relay.


Hmmm. I like the way you think! Does anyone make IC's with multiple
window comparators with something like one-pin control of hysteresis . .
. ?

The LM3916 bar/dot LED driver looks like it might just fill the bill.
Daisy-chain a few, add some relay driver ICs (what's a good 10-channel
relay/lamp driver IC?) and I might just be up and running.

Hello Mike,
this chip has a logarithm scale. I don't think it can fit
your application. I recommend a controller which only
wakes up when the potentiometer will be turned.
This would be a one chip plus relay driver solution.

I can't understand why you fear a micro-controller like
"the devil fears the holy water".

Best Regards,
Helmut

 

[Mike Rocket J. Squirrel E]

On 3/29/2005 2:50 PM Helmut Sennewald wrote:

"Mike Rocket J. Squirrel Elliott"
j.michael.elliottAT@REMOVETHEOBVIOUSgmailDOT.com> schrieb im Newsbeitrag
newsPmdnd2iT_QmKdTfRVn-pw@adelphia.com...

On 3/29/2005 10:43 AM Mike Rocket J. Squirrel Elliott wrote:


On 3/29/2005 3:08 AM Robert Baer wrote:


Mike Rocket J. Squirrel Elliott wrote:


I'm an analog guy and I need for a bit of logic/adc design work done,
will pay. The design is essentially to sample the voltage on the wiper
of a potentiometer, and use it to drive one of 48 relays, depending on
the wiper voltage. The relays need to be driven in a make-before-break
style. I don't want to run any clocks in the product if at all
possible. Low-speed stuff. I reckon this is digital design 101 as
taught in 1980.

Please private mail me for more information if this sounds like
no-brainer stuff to you and you have the time and are interested.

I'm located in Carlsbad, CA.


How about the wiper drive one of the inputs to N comparitors, the
other input of each of those N comparitors goes to a desired point on a
voltage divider:

--/\/-+-/\/\-+-/\/\-+-...-+-/\/\--
| | | |
v v v v
C1 C2 C3 ... Cn If the taps are equally spaced, then set
the hysteresis for all of the comparitors the same, and wide for
"overlap"; each output controls a relay.


Hmmm. I like the way you think! Does anyone make IC's with multiple
window comparators with something like one-pin control of hysteresis . .
. ?

The LM3916 bar/dot LED driver looks like it might just fill the bill.
Daisy-chain a few, add some relay driver ICs (what's a good 10-channel
relay/lamp driver IC?) and I might just be up and running.



Hello Mike,
this chip has a logarithm scale. I don't think it can fit
your application. I recommend a controller which only
wakes up when the potentiometer will be turned.
This would be a one chip plus relay driver solution.

I can't understand why you fear a micro-controller like
"the devil fears the holy water".

Oops -- Thanks! (Wrong chip, right family. The LM3914 is the linear one.)

I don't know how to write code, so programming a uC would require paying
someone for that. And buying hardware to program the uC. I can't debug
code, either, so I would need to keep bothering the programmer. I've had
difficulty in the past with code that needed debugging a couple years
later, only to find that the programmer guy was no longer available. A
hardware implementation, like this simple IC approach, is something I
can understand and debug myself. I guess I prefer to do things myself if
possible using technology even I can understand.

Clocks and potential interference. The product will be a vacuum-tube
high end audio phono preamplifier. I personally don't think that having
an oscillator in this product will be a problem with halfway decent
shielding. But the marketplace will have more trust in the product if it
is dead quiet (EMI-wise) inside. High-end audio is odd that way. Far
easier to not build in a perceived problem then try to defend challenges
later.

--
Mike "Rocket J Squirrel" Elliott
71 Type 2: the Wonderbus
84 Westfalia: "Mellow Yellow (The Electrical Banana)"
KG6RCR

 

[nospam]

"Mike Rocket J. Squirrel Elliott"
<j.michael.elliottAT@REMOVETHEOBVIOUSgmailDOT.com> wrote:

Oops -- Thanks! (Wrong chip, right family. The LM3914 is the linear one.)

The LM3914 has overlapping comparators and no hysteresis so for some of the
pot you will have one relay on, some of the pot you will have two relays
on, and the rest of the pot you will have one on and one buzzing with the
slightest noise in the system.

Clocks and potential interference. The product will be a vacuum-tube
high end audio phono preamplifier.

And I thought is was going to be something sensible like a tapped inductor
for an antenna tuner ;|

 

[polleke]

that is very easy one.
Use a multiswitch with a lot of contacts that is the trick. You
will not have to use any electronics only some 1 % resistors.
You also can use a coarse and fine switch as 48 pos switches are
rare.

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[Robert Baer]

Mike Rocket J. Squirrel Elliott wrote:

On 3/29/2005 3:08 AM Robert Baer wrote:

Mike Rocket J. Squirrel Elliott wrote:

I'm an analog guy and I need for a bit of logic/adc design work done,
will pay. The design is essentially to sample the voltage on the
wiper of a potentiometer, and use it to drive one of 48 relays,
depending on the wiper voltage. The relays need to be driven in a
make-before-break style. I don't want to run any clocks in the
product if at all possible. Low-speed stuff. I reckon this is digital
design 101 as taught in 1980.

Please private mail me for more information if this sounds like
no-brainer stuff to you and you have the time and are interested.

I'm located in Carlsbad, CA.


How about the wiper drive one of the inputs to N comparitors, the
other input of each of those N comparitors goes to a desired point on
a voltage divider:

--/\/-+-/\/\-+-/\/\-+-...-+-/\/\--
| | | |
v v v v
C1 C2 C3 ... Cn
If the taps are equally spaced, then set the hysteresis for all of
the comparitors the same, and wide for "overlap"; each output controls
a relay.


Hmmm. I like the way you think! Does anyone make IC's with multiple
window comparators with something like one-pin control of hysteresis . .
. ?

If i remember correctly, TI had a dual comparitor with on-pin control.

Get nasty, log to DigiKey and try key-words like "comparitor".

 

[Paul Burke]

Robert Baer wrote:

If i remember correctly, TI had a dual comparitor with on-pin control.
Get nasty, log to DigiKey and try key-words like "comparitor".

Might do better with 'comparator'

Paul Burke