EAGLE Netlist conversion

Brad Velander · Apr 26, 2005

Franklin,
Maybe you could define your questions a little bit better. I
don't even know where to start with what you have asked at the
moment. Inductance, Resistance?

Component placement, yes it places components just fine but
it is most likely not real similar to Eagle.

Overall, go through their tutorials and examples. Don't take
the manuals precisely at their word, there were too many service
pack changes for the manuals to be real accurate. let alone like
everything these days, the manuals are more of a where is it type
help rather than a how does it actually work help. If you can
find their training course (learning guide and related tutorial
files) somewhere online, it would give you a good basis on which
to start, much better than the manual.

Join the PEDA listserver and you can get answers quickly,
nearly 24/7.

http://www.techservinc.com/protelusers/index.html

Some tips I can give right off the bat, don't use special
characters in library parts names, stick to underscores, spaces,
letters and numbers, keep them under 14 characters in length. It
is hard for me to even think of where you might find difficulties
or problems since I have used the package for so long I just do
my work in the manner I have become used to and I don't have
many problems. Oh, Stay away from Win98 with it (resource
problems, design rule set-up uses a lot of resources and will
crash in Win98) and ATI video cards from a few (3 - 5) years back
resulted in numerous stability issues. I believe that the more
current ATI cards work just fine.

Work at learning the hotkeys and keystrokes for commands, it
is miles more efficient than mousing it through the menus.

--
Sincerely,
Brad Velander

"Franklin" <reply@newsgroup.plz> wrote in message
news:1pwt0s9wzlgp9$.13fl0fp3kyr3a.dlg@40tude.net...

I'm going to give Protel 99SE SP6 a try. Will be using it for
design of
audio pcb's. A couple of years ago I have worked with Eagle
which was very
basic and easy to work with.

What should I keep in mind when working with Protel regarding
component
placement, inductance, resistance, etc.?

Thanks for any info.

Franklin

Franklin · Apr 26, 2005

Op Tue, 26 Apr 2005 05:15:09 GMT schreef Brad Velander:

Franklin,
Maybe you could define your questions a little bit better. I
don't even know where to start with what you have asked at the
moment. Inductance, Resistance?

Component placement, yes it places components just fine but
it is most likely not real similar to Eagle.

Overall, go through their tutorials and examples. Don't take
the manuals precisely at their word, there were too many service
pack changes for the manuals to be real accurate. let alone like
everything these days, the manuals are more of a where is it type
help rather than a how does it actually work help. If you can
find their training course (learning guide and related tutorial
files) somewhere online, it would give you a good basis on which
to start, much better than the manual.

Join the PEDA listserver and you can get answers quickly,
nearly 24/7.

http://www.techservinc.com/protelusers/index.html

Some tips I can give right off the bat, don't use special
characters in library parts names, stick to underscores, spaces,
letters and numbers, keep them under 14 characters in length. It
is hard for me to even think of where you might find difficulties
or problems since I have used the package for so long I just do
my work in the manner I have become used to and I don't have
many problems. Oh, Stay away from Win98 with it (resource
problems, design rule set-up uses a lot of resources and will
crash in Win98) and ATI video cards from a few (3 - 5) years back
resulted in numerous stability issues. I believe that the more
current ATI cards work just fine.

Work at learning the hotkeys and keystrokes for commands, it
is miles more efficient than mousing it through the menus.

Brad,

Thanks for your answer. Reading back my posting it is not that clear
indeed. Sorry for the misunderstanding this caused, but your answer
provides enough for me to start exploring and getting to know Protel
better. I have been able to fetch the training course and it looks good.
The manuals are indeed outdated and do not synchronise with Service Pack
changes which can be quite confusing. Also thanks for the provided tips and
additional link.

Franklin

Jim Thompson · Apr 26, 2005

On 26 Apr 2005 09:04:34 -0700, Vitolog@gmail.com (Sampei) wrote:

Hi,
i have a problem about hierarchical block design in orcad. In a
circuit i should introduce a black box:in this moment i don't know
what is inside this black box but i know which pins are used, so i
decided to use the hierarchical design.I want to work in layout
leaving a free space for the black box so i can add the circuit
later.I tried to create netlist,but a message error appears:
ERROR [MNL0022] Unable to Open MNL Output File -
C:\WINDOWS\DESKTOP\VITO\CIRCUITO\TESINA.MNL
ERROR [NET0011] Netlist failed or may be unusable.
What can i do?
thanks

Your problem is simply floating nodes...

Assign pins to block, as I presume you've already done.

"Descend" or "Push" into block. OrCAD will ask for a schematic name.
Provide it... maybe dummyblock.sch ;-)

In the block create ports that match the block pin names.

From each of these ports connect a resistor, say 1G-ohm to GROUND.

"Ascend" or "Pop" out of this block into the TOP level. Confirm SAVE
when asked.

Later replace schematic of block with one with actual contents.

Of course you're probably using Capture (gag me with a spoon), so you
still may have difficulties :-(

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice

480)460-2350 | |
| E-mail Address at Website Fax

Brad Velander · Apr 27, 2005

Franklin,
One big overall tip, make sure that you are using Service
Pack 6 for P99SE. It is quite stable and sorted out a lot of
earlier issues.
Yeah, the manuals were written before the first release of
P99SE and then they were never updated through the whole product
life as far as I know. The first release failed to include a lot
of the features that were in the manual and by the time they were
released they no longer resembled the instructions in the manual.
Oh, for help files it is recommended that you use the help
query in the lower right of the main window, rather than the main
menu help.
--
Sincerely,
Brad Velander

"Franklin" <reply@newsgroup.plz> wrote in message
news:rsviin6f40kz.amnq7kvhnshj.dlg@40tude.net...

Op Tue, 26 Apr 2005 05:15:09 GMT schreef Brad Velander:

Brad,

Thanks for your answer. Reading back my posting it is not that
clear
indeed. Sorry for the misunderstanding this caused, but your
answer
provides enough for me to start exploring and getting to know
Protel
better. I have been able to fetch the training course and it
looks good.
The manuals are indeed outdated and do not synchronise with
Service Pack
changes which can be quite confusing. Also thanks for the
provided tips and
additional link.

Franklin

Franklin · Apr 27, 2005

Op Wed, 27 Apr 2005 03:39:08 +0000, schreef Brad Velander:

Franklin,
One big overall tip, make sure that you are using Service
Pack 6 for P99SE. It is quite stable and sorted out a lot of
earlier issues.
Yeah, the manuals were written before the first release of
P99SE and then they were never updated through the whole product
life as far as I know. The first release failed to include a lot
of the features that were in the manual and by the time they were
released they no longer resembled the instructions in the manual.
Oh, for help files it is recommended that you use the help
query in the lower right of the main window, rather than the main
menu help.

I'm using SP6. Hope the manual update problem is not present
in their current product, although I suspect it is. Thanks again for
the help query info.

Regards,

Franklin

Alan · Apr 28, 2005

On 27 Apr 2005 16:31:17 -0700, david.chadderton@utas.edu.au (Dave)
wrote:

Hi All
Has anyone ever seen any software that allows autotrax to make use of
windows print drivers? or is that sort of thing even possible?
Dave

Have a look at:
http://www.zeta.org.au/~stevenm/layout/printdrv.html

Alan

--
++++++++++++++++++++++++++++++++++++++++++
Jenal Communications
Manufacturers and Suppliers of HF Selcall
P O Box 1108, Morley, WA, 6943
Tel: +61 8 9370 5533 Fax +61 8 9467 6146
Web Site: http://www.jenal.com
Contact: http://www.jenal.com/?p=1
++++++++++++++++++++++++++++++++++++++++++

Jim Thompson · Apr 28, 2005

On 28 Apr 2005 04:55:11 -0700, klauskvik@hotmail.com (Klaus Kragelund)
wrote:

Hi

I´m using PSpice Capture 10.3

One of my simulations on a SMPS I´m using a BJT as a switch transistor

I would like to do a parametric sweep on the circuit with two
different BJTs models (lets say the transistors are BC547 and 2N2222)
to determine the optimum choice of transistor

My method sofar is to use two global values in the parametric sweep (1
and 2). Then in the position of the BJT there is a subcircuit with the
two BJTs with both transistors in parallel with resistors on all
connections

The value of the resistors is determined by an IF command, that when
the parametric value is 1 one set of resistors is 1mOhm and the other
set 1Meg and vice versa.

But this is a cumbersome method. The optimal would be that Pspice
would allow the implementation name to change according to the needed
model but that feature is not available

So the question, do any of you guys have a better method for this
problem?

Thanks

Klaus

Klaus,

There is no provision for a library change in PSpice. HSpice does it
with their .ALTER command.

HSpice actually reruns the simulation with changes as stated in the
..ALTER.

I've done it by concatenating .CIR files using an ordinary text
editor. I've been known to concatenate as many as 32 different
library corners into one simulation.

Maybe I can convince the oldest son, the programmer, to write me
another utility

480)460-2350 | |
| E-mail Address at Website Fax

Kevin Aylward · Apr 28, 2005

Jim Thompson wrote:

On 28 Apr 2005 04:55:11 -0700, klauskvik@hotmail.com (Klaus Kragelund)
wrote:

Hi

I´m using PSpice Capture 10.3

One of my simulations on a SMPS I´m using a BJT as a switch
transistor

I would like to do a parametric sweep on the circuit with two
different BJTs models (lets say the transistors are BC547 and 2N2222)
to determine the optimum choice of transistor

My method sofar is to use two global values in the parametric sweep
(1 and 2). Then in the position of the BJT there is a subcircuit
with the two BJTs with both transistors in parallel with resistors
on all connections

The value of the resistors is determined by an IF command, that when
the parametric value is 1 one set of resistors is 1mOhm and the other
set 1Meg and vice versa.

But this is a cumbersome method. The optimal would be that Pspice
would allow the implementation name to change according to the needed
model but that feature is not available

So the question, do any of you guys have a better method for this
problem?

Thanks

Klaus

Klaus,

There is no provision for a library change in PSpice. HSpice does it
with their .ALTER command.

HSpice actually reruns the simulation with changes as stated in the
.ALTER.

This is interesting. I would have though PSpice would implement
something similar to what is in In TISpice, it uses rerun cards

..Reruns
statments
..Rend

You just make a file with as many reruns as you like, with each rerun
specifying various parameters and libraries. SS does this for
parameters, but not lib, so to change a model in this way, one would
have to set each parameter of the model in a rerun. SS can generate this
automatically.

I've done it by concatenating .CIR files using an ordinary text
editor. I've been known to concatenate as many as 32 different
library corners into one simulation.

Oh dear..SuperSpice does this all within the GUI...
http://www.anasoft.co.uk/WCSETUP.GIF

All plots of all runs are all automatic.

Maybe I can convince the oldest son, the programmer, to write me
another utility

Or have a look at another simuater

Kevin Aylward
informationEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

Jim Thompson · Apr 29, 2005

On Fri, 29 Apr 2005 08:28:15 -0700, John Larkin
<jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:

On Fri, 29 Apr 2005 06:42:45 -0700, Jim Thompson
thegreatone@example.com> wrote:

However, since there's already a switch in the logic to pick low or
high sideband, I'll just add Chris' D-flop and then some logic to the
switch path.

I thought it was my flipflop.

John

480)460-2350 | |
| E-mail Address at Website Fax

John Larkin · Apr 29, 2005

On Fri, 29 Apr 2005 08:35:13 -0700, Jim Thompson
<thegreatone@example.com> wrote:

On Fri, 29 Apr 2005 08:28:15 -0700, John Larkin
jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:

On Fri, 29 Apr 2005 06:42:45 -0700, Jim Thompson
thegreatone@example.com> wrote:

However, since there's already a switch in the logic to pick low or
high sideband, I'll just add Chris' D-flop and then some logic to the
switch path.

I thought it was my flipflop.

John

You were too vague for El Denso to understand... us analog guys need
pictures ;-)

...Jim Thompson

Well, I just sort of figured that there aren't a whole lot of
different ways to connect two signals to the inputs of a d-type
flipflop.

John

Leon Heller · Apr 30, 2005

"eeh" <eehobbyist@yahoo.com.hk> wrote in message
news:1114870009.841685.92240@f14g2000cwb.googlegroups.com...

Hi,

I have 2 PADS PCB files of differrent design and want to combine them
into one so that I can save money in prototype design stage. Could I do
that?

I think GC-Prevue will combine Gerber files, if you can't do it with PADS. I
can combine PCBs with the Pulsonix software I use.

Leon

Rob Gaddi · May 6, 2005

beagle197@hotmail.com wrote:

how do you look up the datasheets associated with the placeable parts?
thanks
bea

Google.

Joerg · May 7, 2005

Hello Bea,

Maybe this one?

http://www.alldatasheet.com/

Regards, Joerg

http://www.analogconsultants.com

Rob Gaddi · May 9, 2005

beagle197@hotmail.com wrote:

Well I suppose I ought to read the fine manual ;-), but I have been
tinkering around with Capture CIS, and it seems to have a datasheet
function there.
Thanks,
bea

Yes, it does have that functionality. Occasionally, it even works

correctly. More often, however, you'll wind up needing to Google it
anyhow. Make sure to strip off everything after the /, like you did the
second time, since the package marking from Orcad is not part of the
part number.

Likewise, if you know whose part it is, you can start over at their
website. On Phillips's site, if you look through the Schottky diodes,
the one you were looking for hasn't even been sold recently enough that
they have the data sheet online. Therefore, unless you're stuck with a
bin of them that you're trying to use, might I suggest that you only
build your schematic around parts you can actually get your hands on?
They tend to be much easier to get sheets for as well.

Charlie Edmondson · May 10, 2005

deepakraghu@gmail.com wrote:

I am newbie to pcb design and currently working on a design/layout of a
board. I have an external clock to my board coming through a SMA
connector and this one I am kinda doing a Y to split into two clocks to
go into separate buffers before routing to the corresponding chips. The
frequency I am dealing here is max of 20 MHz and rise times of 2-5ns.
And I am routing the signal on the board for a length of appx 1-2in. So
I guess I shouldnt have any transmission line effects. Now my question
is if I routing the main clock signal with a trace width of 10 mils,
what should be those individual traces with after Y ing (clk1 and clk2
traces width) ?

--------------- clk1
|
MCLK(10mils)--------------|
|
---------------- clk2

And I am just curious to know this, if I was dealing with high enough
frequency/rise times that my system here is considered as transmission
line. then assuming 50 ohms traces, is it right if i do a AC
termination close to the receiever with 100ohm and say 100 pF cap on
each clk(1 and 2) line? what happens to the width of the traces after Y
ing in this case. just curious to learn these things. thanks much

Assuming that this is over a good ground plane, and there are not any

parallel traces that couple too easily, what you described should be
fine. This short a trace shouldn't have any tline effects, so, as long
as everything is terminated, everyone should be happy.

Charlie

Matt Flyer · May 13, 2005

deepakraghu@gmail.com wrote:

thanks ! yeah I am using a single solid ground plane under the signal
layer ... so I maintain all the traces at 10 mils even after the Y ?

Charlie Edmondson wrote:

deepakraghu@gmail.com wrote:

I am newbie to pcb design and currently working on a design/layout

of a

board. I have an external clock to my board coming through a SMA
connector and this one I am kinda doing a Y to split into two

clocks to

go into separate buffers before routing to the corresponding chips.

The

frequency I am dealing here is max of 20 MHz and rise times of

2-5ns.

And I am routing the signal on the board for a length of appx

1-2in. So

I guess I shouldnt have any transmission line effects. Now my

question

is if I routing the main clock signal with a trace width of 10

mils,

what should be those individual traces with after Y ing (clk1 and

clk2

traces width) ?

--------------- clk1
|
MCLK(10mils)--------------|
|
---------------- clk2

And I am just curious to know this, if I was dealing with high

enough

frequency/rise times that my system here is considered as

transmission

line. then assuming 50 ohms traces, is it right if i do a AC
termination close to the receiever with 100ohm and say 100 pF cap

on

each clk(1 and 2) line? what happens to the width of the traces

after Y

ing in this case. just curious to learn these things. thanks much

Assuming that this is over a good ground plane, and there are not any

parallel traces that couple too easily, what you described should be
fine. This short a trace shouldn't have any tline effects, so, as

long

as everything is terminated, everyone should be happy.

Charlie

It occured to me that you might like the book High Speed Digital Design,

A Handbook of Black Magic by Howard Johnson.

Jim Thompson · May 16, 2005

On 16 May 2005 13:48:55 -0700, ntyangiri@gmail.com wrote:

I have designed a new simple CMOS differential comparator.
Now, I'm required to provide its Analysis but I don't know
where to start.
What are standard methods for Analysis of a Comparator?
Any help/advice will be appreciated.
Thanks in advance,
Chris

Pay attention in class ?

480)460-2350 | |
| E-mail Address at Website Fax

Terry Pinnell · May 17, 2005

"surena" <surena_abari@yahoo.com> wrote:

How I can find the current curve of a circuit?
I make circuits like simple RC with a Vsin source and put V and I
marker. The V marker gives the expected sin curve of V, but I marker
needs a pin and after that the curve is a flat (0) line and not a sin
wave. Maybe the problem is how I put the pin. I do not know. Any help?

Surena

You don't give much information - such as the component and voltage
values, and the software you are using! But, guessing, one possibility
is that current is dominated by voltage at the particular scale your
program is using, like this:
http://www.terrypin.dial.pipex.com/Images/RC-Measuring1.gif

--
Terry Pinnell
Hobbyist, West Sussex, UK

Jim Thompson · May 18, 2005

On 17 May 2005 18:53:47 -0700, "surena" <surena_abari@yahoo.com>
wrote:

Yes, You are right. Using separate window shows the current wave. But I
use Orcad capture 9.2 and I want to know how I can see voltage and
current as two separate scales as you did in your gif picture? Also how
I can show that current for example lags voltage by 90 degrees (phase
difference)?

Surena.

480)460-2350 | |
| E-mail Address at Website Fax

Charlie Edmondson · May 18, 2005

bill_hale@agilent.com wrote:

I was using IVEX. It was OK.

I'm looking for something to draw schematics, not
necessarily PC related.

The ideal program would handle wiring harnesses and connectors
& switches really well--from a library. It would be easy to label
stuff.

I don't need PCB layout. I might want to draw an occasional electronic
schematic, tho. I don't even need connectivity lists.

Should run on a PC

I would need several hundred nodes.

Price is not as important as ease of use and no screwy
behavior.

What do the intelligentsia think? Bill Hale

One word - Visio

Charlie

EAGLE Netlist conversion

Brad Velander

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Franklin

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Jim Thompson

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Brad Velander

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Franklin

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Alan

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Jim Thompson

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Kevin Aylward

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Jim Thompson

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John Larkin

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Leon Heller

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Rob Gaddi

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Joerg

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Rob Gaddi

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Charlie Edmondson

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