EAGLE Netlist conversion

[Joel Kolstad]

Beagle,

Have you used other schematic capture programs in the past? SPICE programs?
Etc.?

If so, you can get along fine with OrCAD's own documentation. It is pretty
piss poor, IMO, but it does get the job done... most of the time.

If SPICE is what you're after, using Linear's LTSpice (aka SwitcherCAD III) is
probably a better place to go -- you'll get far more support from the Yahoo!
users group about it than you ever will get from Cadence about the basics of
how to get started.

 

[Kevin Aylward]

Jim Thompson wrote:

On 31 May 2005 12:05:48 -0700, "Mikal" <accclass101@hotmail.com
wrote:

It appears as thought the low pass filters in PSpice have a rather
long phase delay. Is this characteristic exagerated in PSpice or is
that what I could typically see in the real world?
I'm trying to implement a Costas loop, and I just cant get my vco
to catch up with my RF. It appears as though the delays through the
filters are too long.

Anyone every do anything like a costas loop in PSice before?

What low pass filters are you speaking of?

Are you aware that PLL's need a lead-lag filter? A pure low pass will
be slo-o-o-ow to lock, or may not lock at all.

A PLL will lock without a filter at all.

If a filter is used it needs to be a lag-lead otherwise the loop will be
unstable, not because it might be slow without a lead.


Kevin Aylward
informationEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

 

[Jim Thompson]

On 1 Jun 2005 08:52:33 -0700, "Mikal" <accclass101@hotmail.com> wrote:

Is it possible to simulate microstrip components in pspice? i.e.
quarter wavelenght stubs as bandpass filters... Open ended stub would
be a series resonant short, grounded end would be a parallel resonant
open.

Yes, but RTFM. I have a stripline part placed in my personal library
by a Garmin engineer, back when I was doing GPS chip designs, but I
don't know how it works.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Robert]

"Jim Thompson" <thegreatone@example.com> wrote in message
news:vptu91t5j42l9oqb1ammj56uvsvfc1kktv@4ax.com...

On 1 Jun 2005 08:52:33 -0700, "Mikal" <accclass101@hotmail.com> wrote:

Is it possible to simulate microstrip components in pspice? i.e.
quarter wavelenght stubs as bandpass filters... Open ended stub would
be a series resonant short, grounded end would be a parallel resonant
open.

Yes, but RTFM. I have a stripline part placed in my personal library
by a Garmin engineer, back when I was doing GPS chip designs, but I
don't know how it works.

...Jim Thompson

I have a vague memory of them being a problem in TRAN simulations. Something
about the required (small) step size causing very slow simulations. But that
might have been just for Pulse waveforms.

Robert

 

[Joel Kolstad]

<beagle197@hotmail.com> wrote in message
news:1117591029.770884.216240@f14g2000cwb.googlegroups.com...

Well, I took a quick look at Linear's LTSpice (aka SwitcherCAD III),
and it appears to be free, which is interesting. Thanks BTW.

Sure. For the price, it's a wonderful tool.

I'm not big on Yahoo groups because I
think USENET holds the trump in that regard.

Yeah, I agree, but unfortunately a lot of newer Internet users have never
heard of Usenet and hence Yahoo! has some groups that really don't have a
parallel on Usenet. (Google of course has their own "discussion groups" that
ARE Usenet-based, which is nice. Too bad Yahoo! had to go and "roll their
own...")

AFAIK this is par for documentation esp for products that
represent mgmts decision to push it through the door.

My impression (and this is for the 9.2 documentation, BTW) is that they
employed a bunch of writers who have very little or no experience actually
using schematic or PCB layout software to write the manuals. From afar,
everything is reasonably well organized and professional looking, but there
just isn't much "meat" in what's presented: There's a lot of repetition, and a
lot of somewhat circular explanations, e.g., "Cancel button: Pressing this
button cancels the dialog." Well, no duh... It really does come off as
someone doing their best to describe what happens when you invoke a particular
command, but really having no understanding of exactly why one might be
motivated to do so in the first place.

Years ago I used Protel for awhile and while the manuals from the company
themselves was quite good, someone had taken it upon himself to write his own
manual, which we purchased and which was even better. OrCAD could benefit
from similar treatment -- it would come out to about 1/4 the pages as well,
IMO.

Good luck!

---Joel Kolstad

 

[Joel Kolstad]

"Mikal" <accclass101@hotmail.com> wrote in message
news:1117641153.713597.190590@z14g2000cwz.googlegroups.com...

Is it possible to simulate microstrip components in pspice? i.e.
quarter wavelenght stubs as bandpass filters... Open ended stub would
be a series resonant short, grounded end would be a parallel resonant
open.

If you're using it as a "one port" device (i.e., the other end is terminated
in a known impedance, including an open or a short), sure -- just compute the
input impedance of the line as a function of s (that is, j*omega). The
closed-form expression for a terminated transmission line is slightly messy
(it's in any book covering transmission lines -- download
http://oregonstate.edu/~kolstadj/Transmission Lines (Chipman).pdf if you don't
already have such a book), but most simulators today will accept generic
"Laplace blocks" where you stick in the function you're after. For the
special case of short- and open-circuited lines, the general expression just
turns into a tangent or cotagent function -- simple enough.

If you won't be having to sweep over a wide range of frequency, figure out the
input impedance at a nominal figure and equate that to an equivalent R, L
and/or C -- it'll be an OK narrowband approximation. In the case of 1/4 wave
stubs for bandpass filters, synthesis sizes the lines such that they're
equivalent to a given inductor or capacitor anyway; the results end up being
slightly (but not significantly) difference than keeping the L and C's fixed
components.

Simulating lossless transmission lines in SPICE is easy, because for transient
analysis they're just a time delay whereas for AC analysis they're just a
phase delay (proportional to frequency). Simulating lossy transmission lines
is not at all easy, and you can find many papers that advocate different
approaches. Most of the fancier simulators have lossy transmission line
models built in, and it's best to use those unless you have a LOT of time on
your hands.

There are several free programs out there such as Elsie and the AADE Filter
Designer that will simulate ladder networks consisting of lumped elements and
transmission lines for you, if you goal here is just to perform simulations
and you're not sold on SPICE. I believe they use ABCD networks to perform the
analysis -- programmatically, this is about the simplest way to implement it
(something like designing and analyzing a bandpass filter built from
microstrip lines using your own Matlab, MathCAD, etc. routines is a very
common homework problem in university classes).

---Joel Kolstad

 

[Malcolm Reeves]

On Thu, 2 Jun 2005 16:44:04 -0700, "Joel Kolstad"
<JKolstad71HatesSpam@yahoo.com> wrote:

"Mikal" <accclass101@hotmail.com> wrote in message
news:1117641153.713597.190590@z14g2000cwz.googlegroups.com...
Is it possible to simulate microstrip components in pspice? i.e.

Simulating lossless transmission lines in SPICE is easy, because for transient
analysis they're just a time delay whereas for AC analysis they're just a
phase delay (proportional to frequency). Simulating lossy transmission lines
is not at all easy, and you can find many papers that advocate different
approaches. Most of the fancier simulators have lossy transmission line
models built in, and it's best to use those unless you have a LOT of time on
your hands.

Pspice has lossy and lossless transmission lines.

BTW, a one time there was a bug, not sure if it has been fixed.
Basically if you set up a lossy transmission line circuit, ac
analysis, sweep length and plot signal at some F vs length, then you
see a discontinuity, a sudden change in slope. Reltol needs to be set
much smaller (/100?) which then fixes this. Plot is then smooth as
would be expected. Reltol doesn't affect ac compute time AFAIR.

--

Malcolm

Malcolm Reeves BSc CEng MIEE MIRSE, Full Circuit Ltd, Chippenham, UK
(mreeves@fullcircuit.com, mreeves@fullcircuit.co.uk or mreeves@iee.org).
Design Service for Analogue/Digital H/W & S/W Railway Signalling and Power
electronics. More details plus freeware, Win95/98 DUN and Pspice tips, see:

http://www.fullcircuit.com or http://www.fullcircuit.co.uk

NEW - www.CharteredConsultant.co.uk - The Consultant A-List

 

[Terry Pinnell]

david.chadderton@utas.edu.au wrote:

Hi All
In circuitmaker once you have created a new macro for a circuit symbol
and given it a major class name etc and it stored in the library how
can the major class names or the stored symbol name be
edited/renamed/deleted in the library??
Regards
Dave

A worked example might be the best way to describe this:

I have a symbol I made called ThickArrow, filed under User
Defined>Symbols. I want to change that.

1. Place it in a new schematic
2. R-click it and choose Expand Macro
3. D-click it to get the Edit Macro window
4. Change name to ArrowThick
5. Macros>Save Macro
6. Change minor and/or major class when invited (instructed!) to.
7. Use Macros>Macro Utilities to do general moving, deleting, etc.

See also the Help, particularly the sections I've arrowed:

Macros menu.Convert ASCII Library
Macro circuits:creating
Macro Copier
Macro devices
creating
expanding <---
Macro libraries:updating 16-bit
updating 32-bit
Macro Lock
Macro symbols:adding existing models to
adding existing subcircuits to
Macro Utilities
Class Selected Device <---
Delete Macro
Expand Macro
Model Data
Macros menu:Convert ASCII Library
Expand Macro
Macro Copier
Macro Lock
Macro Utilities <---
Save ASCII Library
Save macro
Update Search List
Macros:creating new
editing <---
expanding
saving


--
Terry Pinnell
Hobbyist, West Sussex, UK

 

[Charlie Edmondson]

Robert wrote:

"Jim Thompson" <thegreatone@example.com> wrote in message
news:vptu91t5j42l9oqb1ammj56uvsvfc1kktv@4ax.com...

On 1 Jun 2005 08:52:33 -0700, "Mikal" <accclass101@hotmail.com> wrote:


Is it possible to simulate microstrip components in pspice? i.e.
quarter wavelenght stubs as bandpass filters... Open ended stub would
be a series resonant short, grounded end would be a parallel resonant
open.

Yes, but RTFM. I have a stripline part placed in my personal library
by a Garmin engineer, back when I was doing GPS chip designs, but I
don't know how it works.

...Jim Thompson


I have a vague memory of them being a problem in TRAN simulations. Something
about the required (small) step size causing very slow simulations. But that
might have been just for Pulse waveforms.

Robert


The basic problem was how to not miss transitions when you have

transmission lines, one of the solutions was to reduce the max step size
to one half of the shortest tline delay. If you had really small
tlines, then this could really increase the simulation time...

Charlie

 

[Joel Kolstad]

"Malcolm Reeves" <mreeves@fullcircuit.com> wrote in message
news:1o30a114upqr1hjb2s2mu7r6sn11vl1kll@4ax.com...

Pspice has lossy and lossless transmission lines.

The reason there are numerous lossy transmission line models out there is that
some of the early ones had problems in that they were non-passive. In such
cases, if you choose the right terminations (just R's, L's, and C's) you can
create a non-stable system and get oscillations out of "nowhere." Later ones
would include passivity at the expense of accuracy and presumably these days
there are very good models available that are both stable and passive... but
I'm not at all up to date on the models used in any particular simulator.

I would be wary of anyone's simulator that doesn't tell you whose lossy
transmission line model they're using!

---Joel

 

[Malcolm Reeves]

On Fri, 3 Jun 2005 13:13:11 -0700, "Joel Kolstad"
<JKolstad71HatesSpam@yahoo.com> wrote:

"Malcolm Reeves" <mreeves@fullcircuit.com> wrote in message
news:1o30a114upqr1hjb2s2mu7r6sn11vl1kll@4ax.com...
Pspice has lossy and lossless transmission lines.

I would be wary of anyone's simulator that doesn't tell you whose lossy
transmission line model they're using!

AFAIR it is in one of the manuals - all greek to me though . AFAIR
each end of the lossy transmission line is a volt and current source
pair. These model the line impedance, voltage, current, black box
style. Maths links the two ends. This does mean that the two ends
are floating so you need to 0V reference each end which of course is
different to a real circuit.

P.S. Sorry for emailing you Joel - I clicked the wrong button - DOH!

--

Malcolm

Malcolm Reeves BSc CEng MIEE MIRSE, Full Circuit Ltd, Chippenham, UK
(mreeves@fullcircuit.com, mreeves@fullcircuit.co.uk or mreeves@iee.org).
Design Service for Analogue/Digital H/W & S/W Railway Signalling and Power
electronics. More details plus freeware, Win95/98 DUN and Pspice tips, see:

http://www.fullcircuit.com or http://www.fullcircuit.co.uk

NEW - www.CharteredConsultant.co.uk - The Consultant A-List

 

[James Morrison]

Andy,

If you just want to learn about PCB layout then there are much cheaper
options than PADS or Orcad. I use Cadsoft Eagle and I like it. It
takes a bit of getting used to but its not bad. Its really no different
than any other system I've used: Once you know how to do things its
pretty good. It has some limitations but for the price you can't beat
it. There are also various license arrangements from free to the full
blown professional. There is a not-for-profit license that you would
qualify for if you're just tinkering around.

I'm not sure that you will be able to avoid learning PCB design if you
want to do layout. That's sort of like saying you want to drive but you
don't want to study to get a license. Sure in the end you may be able
to point the car somewhere at you'll probably move if you know just a
little bit. But the results will be less than desirable. If your PCB
isn't designed correctly you can completely negate a well designed FPGA
or ASIC and cause the whole assembly to not even function.

There are other free packages out there as well that will allow you to
learn. Someone has a list of over 60 packages that are reviewed and
linked. I can't recall off the top of my head but its been posted
either here or in sci.electronics.design. Try google to find it.

Cheers.

On Tue, 2005-06-07 at 03:41 -0700, andy@fritter.net wrote:

Hi All,

I'm a VHDL designer (of sorts) using FPGA's. Short of specifying pin
outs for FPGA's I haven't got involved in board level layout, so far...

I'm thinking of taking the plunge and buying Orcad or PADS, but as
these are both expensive packages, I'd like to know first, just how
difficult is schematic layout at the board level?

What areas of knowledge do I have to learn? Primarily I'm designing PCI
cards.

I don't want to learn PCB design, that certainly seems to be a large
area best left to experts! But I think being able to do my own layouts
will save me some money... providing it's not to difficult and doesn't
take a long time to learn.

Any advice would be great.

Thanks,

Andy

 

[Leon Heller]

<andy@fritter.net> wrote in message
news:1118140913.041000.137400@z14g2000cwz.googlegroups.com...

Hi All,

I'm a VHDL designer (of sorts) using FPGA's. Short of specifying pin
outs for FPGA's I haven't got involved in board level layout, so far...

I'm thinking of taking the plunge and buying Orcad or PADS, but as
these are both expensive packages, I'd like to know first, just how
difficult is schematic layout at the board level?

What areas of knowledge do I have to learn? Primarily I'm designing PCI
cards.

I don't want to learn PCB design, that certainly seems to be a large
area best left to experts! But I think being able to do my own layouts
will save me some money... providing it's not to difficult and doesn't
take a long time to learn.

Have a look at Pulsonix: http://www.pulsonix.com

It's cheaper than Orcad and PADS, and is much easier to use.

Leon

 

[Jim Thompson]

On 6 Jun 2005 21:33:26 -0700, beagle197@hotmail.com wrote:

[snip]

PSpiceTemplate: D^@REFDES %A %C @MODEL\nD^@REFDES %C %J @MODEL


[snip]

You need to show us the complete part description, not just the
Template. However, several gotchas....

(1) You've defined TWO diodes with the SAME REFDES, rewrite as...

Dx^@REFDES %A %C @MODEL \n Dy^@REFDES %2ndAnode %2ndCathode @MODEL

(%2ndAnode %2ndCathode... pick the correct %C or %J, see (3))

(2) "\n" with no spaces fore or aft has been observed to cause trouble
in later versions of PSpice... some village idiot programmer changed
the code that had been around forever. Change "\n" to " \n "

(3) If Model is strictly a diode declaration, the node order matters,
should ALWAYS be "anode cathode" for each device. I'm not familiar
with the BAV99, is it cathode-to-cathode or cathode-to-anode?

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Terry Pinnell]

James Morrison <spam1@stratforddigital.ca> wrote:

Andy,

<snip>

There are other free packages out there as well that will allow you to
learn. Someone has a list of over 60 packages that are reviewed and
linked. I can't recall off the top of my head but its been posted
either here or in sci.electronics.design. Try google to find it.

That would be my notes and links to some 60 ECAD programs at
http://www.terrypin.dial.pipex.com/ECADList.html

Terry Pinnell
Hobbyist, West Sussex, UK

 

[Terry Pinnell]

John Hudak <jhudak@sei.cmu.edu> wrote:

Hi Folks:
I've been away from this area for a while and am looking for opinions &
facts regarding current CAD tools for digital ckt design and analysis.
In the past (1990s) I've used ORCAD, Protel, and Eagle 3.x for circuit
capture, board layout and routing. I also used some tools for logic
design and analysis at the gate level (e.g. ABLE for PALs and Verilog).
So my question is this: Are there any tools that combine techniques
for capturing state and timing information and do the associated
analysis? (EEWorkbench?). For example...I am designing a CPU and
associated memory hierarchy (cache, main, etc). At the functional pin
level for instruction fetch, I want to simulate a memory write sequence
(how the CPU pins would be cycled), simulate the memory address decoding
logic (however implemented), and memory cycles. So, what I want to be
able to do is specify the cpu pin signals for a mem-rd cycle, mem-write,
read-modify-write, etc. simulate the decode logic all the way to the
memory interface for the purpose of verifying the memory access (decode)
is correct over the entire memory space (both physical and virtual
address). I also want to be able to analyze it from a timing
perspective (to include as little or much detail about the paths as I
want to (i.e. setup/hold times, prop delay, etc.).
The last time I attempted this (1997?) I had to use several tools to do
different aspects. So I am wondering if any tool vendor has integrated
this into their systems? Also, any comments on the current packages
(ORCAD, Protel, and Eagle) are welcome.
Thanks
John

See my notes and links to some 60 ECAD programs at
http://www.terrypin.dial.pipex.com/ECADList.html

Some packages like CircuitMaker (which I use myself) have 'hybrid'
simulation facilities, i.e. analog and digital, which might be useful
in the context you describe.


Terry Pinnell
Hobbyist, West Sussex, UK

 

[James Morrison]

On Tue, 2005-06-07 at 19:04 +0100, Terry Pinnell wrote:

James Morrison <spam1@stratforddigital.ca> wrote:

Andy,

snip

There are other free packages out there as well that will allow you to
learn. Someone has a list of over 60 packages that are reviewed and
linked. I can't recall off the top of my head but its been posted
either here or in sci.electronics.design. Try google to find it.

That would be my notes and links to some 60 ECAD programs at
http://www.terrypin.dial.pipex.com/ECADList.html

That's the one. Sorry Terry, I just couldn't remember. I'll bookmark
it this time

 

[Joel Kolstad]

A few quick comments; I've only used Protel, Accel, OrCAD, and PADS.

Protel: If you find a "stable" version, it's actually pretty good and the
price is right. Unfortunately, there are often main unstable,
buggy-as-all-get-out versions inbetween the good ones! Protel runs schematic
capture, PCB layout, SPICE simulation, etc. all within its own window. This
makes it feel "well integrated."

Accel: Bah. Gets the job done, not as "user friendly" as Protel, but has
better database connectivity if you want to extract design details externally.
Accel feels a lot like a "design by committe" -- on paper it looks quite good,
but in practice it's spendy for what you get and doesn't feel particularly
"slick."

OrCAD: OrCAD seems to be in serious need of some _good_ programmers (as well
as some good technical writers!). Things like tree view hierarchies don't
support, say, renaming "in place" (selecting a line item and hitting F2 to
rename it), the hierarchy itself is somewhat "fixed" and not completely "free
form" (i.e., you can add any type of files you feel like) like most newer
development environments are, etc. OrCAD's strength is its database
connectivity -- this seems somewhat better documented and developed than other
tools. Likewise, the strong database backend lets you do some pretty nice
"multi-select editing" in one fell sweoop. Still, for the price I think OrCAD
is not very impressive -- I'd almost bet a nickel that OrCAD is one of the
slowest growing packages out there these days and that OrCAD is more just
banking on the users they've had for years and years -- ten years ago, OrCAD
386 was a sight to behold!

PADS: I don't have that much experience with it yet, but their motto of being
"designed to meet the needs of the power user while keeping the beginner is
mind" strikes me as fitting. It really does seem to have more "power tools"
than Accel or OrCAD (and probably Protel, but Protel made it pretty easy to
write your own extensions if you wanted to). So far I like it... but I'm not
having to pay for the license!

So far Protel is my favorite, but with more experience I might shift towards
PADS. Pulsonix does look very attractive, but I've never had the opportunity
to use it.

Unless you have plenty of money around, I'd suggest starting out with one of
the cheaper schematic capture/PCB layout packages (something preferably under
$1K?) to see what you like and don't like. Or even use some of the free
packages for some "trial" project, and then get a few 30 day free evals from
the commercial vendors to see what you like. I've been quite impressed with
how sophisticated some projects on the really cheap and even free packages
are.

---Joel Kolstad

 

[Boris Mohar]

On Tue, 7 Jun 2005 17:36:42 -0700, "Joel Kolstad"
<JKolstad71HatesSpam@yahoo.com> wrote:

OrCAD: OrCAD seems to be in serious need of some _good_ programmers (as well
as some good technical writers!). Things like tree view hierarchies don't
support, say, renaming "in place" (selecting a line item and hitting F2 to
rename it), the hierarchy itself is somewhat "fixed" and not completely "free
form" (i.e., you can add any type of files you feel like) like most newer
development environments are, etc. OrCAD's strength is its database
connectivity -- this seems somewhat better documented and developed than other
tools. Likewise, the strong database backend lets you do some pretty nice
"multi-select editing" in one fell sweoop. Still, for the price I think OrCAD
is not very impressive -- I'd almost bet a nickel that OrCAD is one of the
slowest growing packages out there these days and that OrCAD is more just
banking on the users they've had for years and years --

I couldn't agree more. You wouldn't believe how many expensive invitations I
get for Orcad tutorials and seminars.

ten years ago, OrCAD
386 was a sight to behold!

It still is. See http://groups.yahoo.com/group/OldDosOrcad/

I use PCB386+ to make some rather complex boards.

Capture will make correct EDIF netlist for PCB386.




Regards,

Boris Mohar

Got Knock? - see:
Viatrack Printed Circuit Designs (among other things) http://www.viatrack.ca

 

[Jim Thompson]

On Tue, 07 Jun 2005 21:09:56 -0400, Boris Mohar
<borism_-void-_@sympatico.ca> wrote:

On Tue, 7 Jun 2005 17:36:42 -0700, "Joel Kolstad"
JKolstad71HatesSpam@yahoo.com> wrote:

OrCAD: OrCAD seems to be in serious need of some _good_ programmers (as well
as some good technical writers!). Things like tree view hierarchies don't
support, say, renaming "in place" (selecting a line item and hitting F2 to
rename it), the hierarchy itself is somewhat "fixed" and not completely "free
form" (i.e., you can add any type of files you feel like) like most newer
development environments are, etc. OrCAD's strength is its database
connectivity -- this seems somewhat better documented and developed than other
tools. Likewise, the strong database backend lets you do some pretty nice
"multi-select editing" in one fell sweoop. Still, for the price I think OrCAD
is not very impressive -- I'd almost bet a nickel that OrCAD is one of the
slowest growing packages out there these days and that OrCAD is more just
banking on the users they've had for years and years --

I couldn't agree more. You wouldn't believe how many expensive invitations I
get for Orcad tutorials and seminars.

ten years ago, OrCAD
386 was a sight to behold!

It still is. See http://groups.yahoo.com/group/OldDosOrcad/

I use PCB386+ to make some rather complex boards.

Capture will make correct EDIF netlist for PCB386.




Regards,

Boris Mohar

Got Knock? - see:
Viatrack Printed Circuit Designs (among other things) http://www.viatrack.ca

Maybe the crap is going to fall. In the past two days, two different
sales-types at EMA-EDA called trying to get me to sign up for a
tutorial.

I said...

(1) Capture is crap.

(2) And I could teach the course ;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.