1ns max jitter oscillator, cheap - for fast 4 diode sampler

[Steve Wilson]

klaus.kragelund@gmail.com wrote:

On Wednesday, 8 May 2019 23:42:05 UTC+2, Steve Wilson wrote:
klaus.kragelund@gmail.com wrote:

On Wednesday, 8 May 2019 22:37:36 UTC+2, Steve Wilson wrote:
klaus.kragelund@gmail.com wrote:

In this case I need a fast comparator, sub ns response time. They
cost over 2 USD which is a lot more expensive than a picosecond
timing PWM microcontroller

Where do you get one? any model numbers?

https://www.st.com/resource/en/datasheet/stm32f334k6.pdf


Thanks. And this thing sells for how much?

Significantly below 2 USD (I cannot disclose the RFQ I have)

Do you have any information on the ultra fast comparators, such as
risetime, offset, delay time? There is nothing in the datasheet.

Comparator specs is on pgae 99

30ns, 5mV

Risetime is just an digital IO (5ns)

Thanks. I was searching for "ultra fast comparator" which is the term in
the title. I had no idea they would change the term.

Cheers

Klaus

 

On Wednesday, 8 May 2019 23:42:05 UTC+2, Steve Wilson wrote:

klaus.kragelund@gmail.com wrote:

On Wednesday, 8 May 2019 22:37:36 UTC+2, Steve Wilson wrote:
klaus.kragelund@gmail.com wrote:

In this case I need a fast comparator, sub ns response time. They cost
over 2 USD which is a lot more expensive than a picosecond timing PWM
microcontroller

Where do you get one? any model numbers?

https://www.st.com/resource/en/datasheet/stm32f334k6.pdf


Thanks. And this thing sells for how much?

Significantly below 2 USD (I cannot disclose the RFQ I have)

Do you have any information on the ultra fast comparators, such as risetime,
offset, delay time? There is nothing in the datasheet.

Comparator specs is on pgae 99

30ns, 5mV

Risetime is just an digital IO (5ns)

Cheers

Klaus

 

[Clifford Heath]

On 8/5/19 11:08 pm, George Herold wrote:

On Tuesday, May 7, 2019 at 7:30:53 PM UTC-4, Gerhard Hoffmann wrote:
Am 07.05.19 um 21:37 schrieb bitrex:
On 5/7/19 1:20 PM, Cursitor Doom wrote:
On Tue, 07 May 2019 07:14:33 -0700, klaus.kragelund wrote:

Hi

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)

I know I'll appear a dinosaur by saying this, but you really can't beat a
good old fashioned Wien Bridge oscillator when it comes to spectral
purity and low phase noise. They certainly beat the crap out of any
digital synthesis technique IMV.





In a rare moment of partial agreement with my arch-nemesis "Cursitor
Doom" an injecton-locked Wien bridge oscillator can provide a
near-perfect combination of very low phase noise and very low wideband
noise floor and distortion. And certainly meets the low-price requirement.

Alone the fact that you can easily injection lock a Wien bridge
oscillator is a sure sign that its frequency stability is not
of prime quality. And the absence of harmonics has nothing to do
with phase noise, as long as their amplitude is not that large
that it causes high order sideband mixdown to baseband. (noise present
around harmonics). You can have a square wave with excellent phase
noise.

Injection locking also does not solve any problem. If your injection
source is so good, why not use it directly, without all of this ado?

And if you look at the Leeson equation that defines the phase noise
of an oscillator, there is a division term of (2 * Q**2), so Q is one
of the most important parameters. In practical oscillators that can be
even stronger than **2, depending on offset. The Leeson formula is
somewhat simplified. Rohde, Rubiola and others have improved on that.

Remember that the phase slope of the loop gain is effective Q.
dphase/dfreq of a Wien bridge is, oh, ask LTspice. The wet sand bag.
Good is different. Oscillation frequency is where phase goes through 0,
so Q = dphase / dfreq at this frequency is that what counts.

Jitter is phase noise integrated over all frequencies of interest.
That works in the other direction, too, but there are more degrees
of freedom, i.e the noise distribution close to / far from the carrier.

And for telecom applications, the frequencies of interest do not
include anything below 12 KHz. That's how most stuff is specc'ed
because it gives better numbers. 1/f noise is ugly.

You probably cannot afford that luxury of neglecting 1/f because you
need absolute flight time, but if your laser link has GHz subcarriers,
then that's OK.

There is a German web site with a calculator: phase noise -- jitter
but here it's well after midnight, so I won't search it now.
Maybe tomorrow.

As I wrote more than once here: timenuts group at febo.com,
and www.rubiola.org

The HP 54750A scope contains a time stretcher (dual slope: charge fast,
discharge slowly). It has been described in HP Journal.
It is even 2-stage to get more traces per second.
I must admit that I love that scope. And everybody should have the
HP journals in their vault.

This dual slope procedure is not uncommon. I have done something similar
to compare a hydrogen maser and a cesium. 5 ps resolution with
somewhat worse accuracy have been reached at many places. That's
about what a Stanford 620 time interval counter delivers. Good instrument.

cheers, Gerhard


...and its a Wien bridge, not Wein. Also, it's not Seimens.
The creator of the bridge was Wien by name; he has his name
probably from the the town called Vienna abroad. Also the sausages are
not Weiners but Wieners, even if from Oscar Mayer; but methinks in
Vienna they call them Frankfurter.

I wished I was an Oscar Meyer Weiner, because if I was an Oscar Meyer
weiner, everybody would love me.

Thanks for that Gerhard... we love you anyway. :^)

George H. (who can never remember how to spell Wien.)

I heard about a couple who drove all the way around Vienna twice on the
ring road looking for the exit to Vienna. They saw "Wien" signs on every
exit but thought that just mean "Exit".

BTW The rule of thumb in German for "ie" vs "ei": pronunciation follows
the *second* letter. "Ei" meaning "egg" is pronounced "I".

Clifford Heath.

 

[Chris Jones]

On 09/05/2019 01:16, bitrex wrote:

On 5/8/19 8:10 AM, Chris Jones wrote:
On 08/05/2019 10:40, bitrex wrote:
On 5/7/19 5:16 PM, whit3rd wrote:
On Tuesday, May 7, 2019 at 10:20:49 AM UTC-7, Cursitor Doom wrote:
On Tue, 07 May 2019 07:14:33 -0700, klaus.kragelund wrote:

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)
[and want a low-jitter oscillator]

I know I'll appear a dinosaur by saying this, but you really can't
beat a
good old fashioned Wien Bridge oscillator when it comes to spectral
purity and low phase noise. They certainly beat the crap out of any
digital synthesis technique IMV.

The best timing performance requires significant stored energy,
if only for Heisenberg uncertainty principles.   That means LC beats RC
circuitry (the resistors don't store energy, they just waste it).
A rock
has the full momentum of the standing wave acoustics, so a crystal
is better
than LC.   Short of maser/resonant cavity  references, the
possibilities are good
for plain old wires as delay lines (distributed L, C) also.

World-class timing uses superconducting cavities, if that matters.


There's nothing intrinsic about the poor, besmirched Wien bridge
oscillator topology that makes it intrinsically low Q,
Um do you know what Q is?
  > intrinsically
high phase noise, or any of these scurrilous accusations against it!
And the topology is already used in ICs to generate accurate sampling
clocks, as a matter-of-fact.
Which ones? I haven't seen it used on a chip.

Do they usually put inductors in ICsThey don't usually put inductors
in chips if it is not necessary,
because they are big, which means the chips use more area on the wafer
and cost more money to make. They do use inductors on chips,
begrudgingly, when they want a low phase-noise oscillator, because LC
oscillators have better phase noise than RC oscillators, and because
people will pay enough more money for this good phase noise
performance that it justifies the increased cost of the silicon that
is occupied by the big inductor. I have designed the local oscillator
of a cellphone radio chip, and yes it used an LC oscillator, like all
of our competitors also did.

It is difficult to convince people about things like phase noise,
because most people lack the equipment to measure it easily, and
because LTSpice won't simulate it. You need something a bit more
spendy, like SpectreRF.

I also find it impossible to convince people that their mixer won't
work better with a low-distortion sine wave LO signal than it would
with a nice sharp square wave LO. Again, hard to simulate the noise
performance properly with anything cheap, and the people who know how
to measure it are not the ones who need convincing.

Keep in mind that OP asked for "low cost" as well so it doesn't sound to
me like he was asking for a low phase noise 2GHz sampling clock - I'm no
expert or nothin' but I don't think anything about a system like that
would fit my own definition of "low cost."

Heh, cellphone chips are very much optimised for low cost. If you make a
billion of something, you will spend a lot of engineering effort and
other NRE, even just to shave 0.1 cents off that thing.

 

[Chris Jones]

On 09/05/2019 02:05, George Herold wrote:

On Wednesday, May 8, 2019 at 8:10:45 AM UTC-4, Chris Jones wrote:
On 08/05/2019 10:40, bitrex wrote:
On 5/7/19 5:16 PM, whit3rd wrote:
On Tuesday, May 7, 2019 at 10:20:49 AM UTC-7, Cursitor Doom wrote:
On Tue, 07 May 2019 07:14:33 -0700, klaus.kragelund wrote:

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)
[and want a low-jitter oscillator]

I know I'll appear a dinosaur by saying this, but you really can't
beat a
good old fashioned Wien Bridge oscillator when it comes to spectral
purity and low phase noise. They certainly beat the crap out of any
digital synthesis technique IMV.

The best timing performance requires significant stored energy,
if only for Heisenberg uncertainty principles.   That means LC beats RC
circuitry (the resistors don't store energy, they just waste it).   A
rock
has the full momentum of the standing wave acoustics, so a crystal is
better
than LC.   Short of maser/resonant cavity  references, the
possibilities are good
for plain old wires as delay lines (distributed L, C) also.

World-class timing uses superconducting cavities, if that matters.


There's nothing intrinsic about the poor, besmirched Wien bridge
oscillator topology that makes it intrinsically low Q,
Um do you know what Q is?
intrinsically
high phase noise, or any of these scurrilous accusations against it! And
the topology is already used in ICs to generate accurate sampling
clocks, as a matter-of-fact.
Which ones? I haven't seen it used on a chip.

Do they usually put inductors in ICsThey don't usually put inductors in chips if it is not necessary,
because they are big, which means the chips use more area on the wafer
and cost more money to make. They do use inductors on chips,
begrudgingly, when they want a low phase-noise oscillator, because LC
oscillators have better phase noise than RC oscillators, and because
people will pay enough more money for this good phase noise performance
that it justifies the increased cost of the silicon that is occupied by
the big inductor. I have designed the local oscillator of a cellphone
radio chip, and yes it used an LC oscillator, like all of our
competitors also did.

It is difficult to convince people about things like phase noise,
because most people lack the equipment to measure it easily, and because
LTSpice won't simulate it. You need something a bit more spendy, like
SpectreRF.

Can you see phase noise with a DSO by triggering on the oscillator and then
looking at the signal a long time later. And seeing how stable it is
wrt time.?

You can see it like that, if there is so much of it that it is quite
bad, at offset frequencies related to the "long time later".

You can also see it directly with a spectrum analyser (provided that has
a much cleaner LO than what you are measuring). Sometimes it helps to
notch out the carrier (if you are only interested in noise at high
offsets). Note that with this method you will also see AM noise, which
might be useful or might be a distraction, as for example in a mixer LO
signal, the AM noise may be largely rejected by the mixer. **

You can buy a special instrument calles something like a "signal source
analyzer" from keysight, that does it.

There are a lot of cheaper methods which are tricky to do properly, e.g.
phase lock two oscillators together in quadrature and mix one with the
other, then you know the combined noise of the two oscillators. If one
of the oscillators is known to be very good, that is enough:
http://www.wenzel.com/documents/measuringphasenoise.htm
http://www.wenzel.com/documents/phasenoisemeasurement.htm
Otherwise, if you do that with all possible pairs from a set of 3
oscillators you can still get out the absolute phase noise.

Or you can mix an oscillator with itself, but with a long delay line in
one path. It's a long time since I have done it so I can't remember all
of the ways.

You might as well read all the notes on the Wenzel site, it has far
better information than what I can remember.

** There are a lot of ADI DDS chips that lack a pin to bypass the DAC
reference and these are said to have poor AM noise. Here is a page
showing some methods of investigating this as well as measuring phase noise:
https://martein.home.xs4all.nl/pa3ake/hmode/dds_ad9910_amnoise.html

 

[Clifford Heath]

On 9/5/19 6:10 am, bitrex wrote:

... but
higher-performance Wien bridges are a thing and might be interesting to
experiment with

The thing Wien bridges are good at is low-distortion audio sine waves.
All you need is clean AGC with a good time constant and you get very
nice sines.

 

[bitrex]

On 5/8/19 6:49 PM, Clifford Heath wrote:

On 9/5/19 6:10 am, bitrex wrote:
...  but
higher-performance Wien bridges are a thing and might be interesting
to experiment with

The thing Wien bridges are good at is low-distortion audio sine waves.
All you need is clean AGC with a good time constant and you get very
nice sines.

My impression of the thrust of the papers I posted was that in
certain-use cases where you need tunability so a fixed-frequency crystal
osc is out, and don't want the added complexity of an LC VCO and/or PLL
frequency synthesizer, that the humble Wien actually isn't that bad for
generating a timebase. Not as good as the crystal or VCO, but better
than anything else.

 

[bitrex]

On 5/8/19 5:03 PM, Gerhard Hoffmann wrote:

For clocks in the 100s of kHz to several MHz range the topology seems
to have a lot of nice properties, since unless you want to use
off-chip Ls or crystals your options are rather limited.

What offchip Ls or crystals do you need for that 61.5 ct. thing?

The context of that sentence was for the use-case of IC design a la the
Infineon patent.

regards,
Gerhard

 

[bitrex]

On 5/8/19 7:30 PM, Chris Jones wrote:

On 09/05/2019 01:16, bitrex wrote:
On 5/8/19 8:10 AM, Chris Jones wrote:
On 08/05/2019 10:40, bitrex wrote:
On 5/7/19 5:16 PM, whit3rd wrote:
On Tuesday, May 7, 2019 at 10:20:49 AM UTC-7, Cursitor Doom wrote:
On Tue, 07 May 2019 07:14:33 -0700, klaus.kragelund wrote:

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)
[and want a low-jitter oscillator]

I know I'll appear a dinosaur by saying this, but you really can't
beat a
good old fashioned Wien Bridge oscillator when it comes to spectral
purity and low phase noise. They certainly beat the crap out of any
digital synthesis technique IMV.

The best timing performance requires significant stored energy,
if only for Heisenberg uncertainty principles.   That means LC
beats RC
circuitry (the resistors don't store energy, they just waste it). A
rock
has the full momentum of the standing wave acoustics, so a crystal
is better
than LC.   Short of maser/resonant cavity  references, the
possibilities are good
for plain old wires as delay lines (distributed L, C) also.

World-class timing uses superconducting cavities, if that matters.


There's nothing intrinsic about the poor, besmirched Wien bridge
oscillator topology that makes it intrinsically low Q,
Um do you know what Q is?
  > intrinsically
high phase noise, or any of these scurrilous accusations against it!
And the topology is already used in ICs to generate accurate
sampling clocks, as a matter-of-fact.
Which ones? I haven't seen it used on a chip.

Do they usually put inductors in ICsThey don't usually put inductors
in chips if it is not necessary,
because they are big, which means the chips use more area on the
wafer and cost more money to make. They do use inductors on chips,
begrudgingly, when they want a low phase-noise oscillator, because LC
oscillators have better phase noise than RC oscillators, and because
people will pay enough more money for this good phase noise
performance that it justifies the increased cost of the silicon that
is occupied by the big inductor. I have designed the local oscillator
of a cellphone radio chip, and yes it used an LC oscillator, like all
of our competitors also did.

It is difficult to convince people about things like phase noise,
because most people lack the equipment to measure it easily, and
because LTSpice won't simulate it. You need something a bit more
spendy, like SpectreRF.

I also find it impossible to convince people that their mixer won't
work better with a low-distortion sine wave LO signal than it would
with a nice sharp square wave LO. Again, hard to simulate the noise
performance properly with anything cheap, and the people who know how
to measure it are not the ones who need convincing.

Keep in mind that OP asked for "low cost" as well so it doesn't sound
to me like he was asking for a low phase noise 2GHz sampling clock -
I'm no expert or nothin' but I don't think anything about a system
like that would fit my own definition of "low cost."
Heh, cellphone chips are very much optimised for low cost. If you make a
billion of something, you will spend a lot of engineering effort and
other NRE, even just to shave 0.1 cents off that thing.

Yeah but you can use gajillions (technical term) of transistors all you
have to do is just draw them!

the cost rapidly increases when you not an IC designer and have to
kludge something together from off-the-shelf parts that don't really fit
the bill.

 

[John Miles, KE5FX]

Would that be Prof. Prochatzka from Prague?

73, Gerhard

Sounds familiar. I remember some Polish- or Czech-sounding names from their
poster session a few years back.

-- john, KE5FX

 

[Gerhard Hoffmann]

Am 09.05.19 um 04:50 schrieb John Miles, KE5FX:

There have been various hacks along those lines such as sending the trigger
through a SAW filter and measuring the phase of its ringdown waveform with
an ADC, but the one I'm thinking of was patented fairly recently.

-- john, KE5FX

Would that be Prof. Prochatzka from Prague?

73, Gerhard

 

[John Larkin]

On Wed, 8 May 2019 13:18:51 -0700 (PDT), klaus.kragelund@gmail.com
wrote:

On Tuesday, 7 May 2019 22:50:59 UTC+2, John Larkin wrote:
On Tue, 7 May 2019 12:42:22 -0700 (PDT), klaus.kragelund@gmail.com
wrote:

On Tuesday, 7 May 2019 17:18:48 UTC+2, John Larkin wrote:
On Tue, 7 May 2019 07:14:33 -0700 (PDT), klaus.kragelund@gmail.com
wrote:

Hi

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)

So I need a pretty good oscillator, with low jitter

I have never needed a good oscillator before, so on this topic I am totally at square one

First I was thinking about an RC oscillator, and cleaning up the jitter. RC typically have 1us of jitter (found info on the web), and a crystal oscillator, standard type probably 1ns jitter. But I think that idea was crazy, a PLL clean up, would not work I guess.

In order to not mess up my measurement and keep the averaging low (I could do many samples and average), I would guess I need jitter of 300ps (10%) of my 3ns reolution)

But jitter is not listed as a search parameter. So where to start? (with low price in mind)

Cheers

Klaus

Do you want a continuous running oscillator, namely a crystal
oscillator? That works if the measured event and the sampler timebase
can run off the same clock. Even cheap XOs have picosecond or
sub-picosecond jitter measured over short time spans. Longer spans are
trashed by low frequency phase noise, numbers in the nanoseconds per
second for cheap XOs, picoseconds per second for good OCXOs.

That is a very good point, great catch.

I will be using it in a TDR, so short pulse, and build up waveform for reflected pulse. Since I need up to 200m lenth, the maximum time from the emitted pulse to reflected is 3us. So if the jitter is slowly changing over time, it may be a lot less in only that time span.


The simplest timebase is a linear RC ramp and a comparator and a DAC,
no clock at all. RMS jitter of 1 part in 20,000 isn't difficult,
1:50000 is challenging. So 3 us/20000 would be 150 ps RMS jitter,
which is probably OK. The echo from 200m of coax will be very soft,
and you can average to reduce displayed jitter. Cheat a little.

In this case I need a fast comparator, sub ns response time. They cost over 2 USD which is a lot more expensive than a picosecond timing PWM microcontroller

Cheers

Klaus

LVDS receivers make great fast RRIO comparators. We pay 55 cents for
SN65LVDS2DBVR.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[John Miles, KE5FX]

On Wednesday, May 8, 2019 at 7:38:01 AM UTC-7, John Larkin wrote:

It's a weird digital PLL. A fast ADC is clocked based on the XO and
digitizes the triggered oscillator waveform. A mess of math in an FPGA
figures out the phase difference, does some PID control stuff, and
drives a DAC and a varicap to trim the LC oscillator. Lots of fun
signals-and-systems-Nyquist-sampling-theorem-control-theory stuff.

I wonder what kind of precision you could get by simply hitting the
varactor with the trigger signal (or rather an amplitude-stabilized version
of it, such as the output of a fast comparator) and watching how the phase
difference changes over time. If the oscillators started out phase-locked
to each other before the trigger event came in, then their phase difference
would be an indication of how long ago the trigger happened.

There have been various hacks along those lines such as sending the trigger
through a SAW filter and measuring the phase of its ringdown waveform with
an ADC, but the one I'm thinking of was patented fairly recently.

-- john, KE5FX

 

[John Larkin]

On Wed, 8 May 2019 19:50:55 -0700 (PDT), "John Miles, KE5FX"
<jmiles@gmail.com> wrote:

On Wednesday, May 8, 2019 at 7:38:01 AM UTC-7, John Larkin wrote:
It's a weird digital PLL. A fast ADC is clocked based on the XO and
digitizes the triggered oscillator waveform. A mess of math in an FPGA
figures out the phase difference, does some PID control stuff, and
drives a DAC and a varicap to trim the LC oscillator. Lots of fun
signals-and-systems-Nyquist-sampling-theorem-control-theory stuff.


I wonder what kind of precision you could get by simply hitting the
varactor with the trigger signal (or rather an amplitude-stabilized version
of it, such as the output of a fast comparator) and watching how the phase
difference changes over time. If the oscillators started out phase-locked
to each other before the trigger event came in, then their phase difference
would be an indication of how long ago the trigger happened.

There have been various hacks along those lines such as sending the trigger
through a SAW filter and measuring the phase of its ringdown waveform with
an ADC, but the one I'm thinking of was patented fairly recently.

-- john, KE5FX

You could make a picosecond (or femtosecond) accurate time-interval
counter that way. Bang a resonator at an incoming trigger edge and
digitize the ringing waveform with an ADC, for a bunch of samples.
Curve fit to figure out the exact time that the ring started. ADC
noise and its clock jitter get averaged out.

Acoustic things like SAWs take forever to damp out, ring like a bell,
so can't be used at decently high rep rates. You can kill an LC or a
delay line dead in two cycles.

In my case, I want a fast clock that starts instantly at trigger time
and is trigger synchronous but crystal accurate. That's the goofy PLL.




--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

On Thursday, 9 May 2019 04:54:34 UTC+2, John Larkin wrote:

On Wed, 8 May 2019 13:18:51 -0700 (PDT), klaus.kragelund@gmail.com
wrote:

On Tuesday, 7 May 2019 22:50:59 UTC+2, John Larkin wrote:
On Tue, 7 May 2019 12:42:22 -0700 (PDT), klaus.kragelund@gmail.com
wrote:

On Tuesday, 7 May 2019 17:18:48 UTC+2, John Larkin wrote:
On Tue, 7 May 2019 07:14:33 -0700 (PDT), klaus.kragelund@gmail.com
wrote:

Hi

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)

So I need a pretty good oscillator, with low jitter

I have never needed a good oscillator before, so on this topic I am totally at square one

First I was thinking about an RC oscillator, and cleaning up the jitter. RC typically have 1us of jitter (found info on the web), and a crystal oscillator, standard type probably 1ns jitter. But I think that idea was crazy, a PLL clean up, would not work I guess.

In order to not mess up my measurement and keep the averaging low (I could do many samples and average), I would guess I need jitter of 300ps (10%) of my 3ns reolution)

But jitter is not listed as a search parameter. So where to start? (with low price in mind)

Cheers

Klaus

Do you want a continuous running oscillator, namely a crystal
oscillator? That works if the measured event and the sampler timebase
can run off the same clock. Even cheap XOs have picosecond or
sub-picosecond jitter measured over short time spans. Longer spans are
trashed by low frequency phase noise, numbers in the nanoseconds per
second for cheap XOs, picoseconds per second for good OCXOs.

That is a very good point, great catch.

I will be using it in a TDR, so short pulse, and build up waveform for reflected pulse. Since I need up to 200m lenth, the maximum time from the emitted pulse to reflected is 3us. So if the jitter is slowly changing over time, it may be a lot less in only that time span.


The simplest timebase is a linear RC ramp and a comparator and a DAC,
no clock at all. RMS jitter of 1 part in 20,000 isn't difficult,
1:50000 is challenging. So 3 us/20000 would be 150 ps RMS jitter,
which is probably OK. The echo from 200m of coax will be very soft,
and you can average to reduce displayed jitter. Cheat a little.

In this case I need a fast comparator, sub ns response time. They cost over 2 USD which is a lot more expensive than a picosecond timing PWM microcontroller

Cheers

Klaus

LVDS receivers make great fast RRIO comparators. We pay 55 cents for
SN65LVDS2DBVR.

Yes, that is cheap (a bit slower than my requirements)

But how do you use it as a comparator, since it has large tolerances on the receiver thresholds (100mV)?

Regards

Klaus

 

[amal banerjee]

On Tuesday, May 7, 2019 at 7:44:39 PM UTC+5:30, klaus.k...@gmail.com wrote:

Hi

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)

So I need a pretty good oscillator, with low jitter

I have never needed a good oscillator before, so on this topic I am totally at square one

First I was thinking about an RC oscillator, and cleaning up the jitter. RC typically have 1us of jitter (found info on the web), and a crystal oscillator, standard type probably 1ns jitter. But I think that idea was crazy, a PLL clean up, would not work I guess.

In order to not mess up my measurement and keep the averaging low (I could do many samples and average), I would guess I need jitter of 300ps (10%) of my 3ns reolution)

But jitter is not listed as a search parameter. So where to start? (with low price in mind)

Cheers

Klaus

Have you considered a common emitter negative resistance oscillator using some RF|microwave transistor - HFA3134, BFR92A etc?

 

[Gerhard Hoffmann]

Am 09.05.19 um 05:10 schrieb John Miles, KE5FX:

Would that be Prof. Prochatzka from Prague?

73, Gerhard

Sounds familiar. I remember some Polish- or Czech-sounding names from their
poster session a few years back.

-- john, KE5FX

<
https://www.researchgate.net/publication/231007282_Time_measurement_device_with_four_femtosecond_stability
>

But this was published in Sept. 2010, so that could not
be the background of a fresh patent.

I've met Prof. P. some years ago in his lab in Prague.
Seems like he knows what he's talking about. We had
an interface between his SPAD and my time stretcher
for measuring photon flight time.

cheers, Gerhard

 

[Gerhard Hoffmann]

Am 09.05.19 um 12:16 schrieb klaus.kragelund@gmail.com:

LVDS receivers make great fast RRIO comparators. We pay 55 cents for
SN65LVDS2DBVR.

Yes, that is cheap (a bit slower than my requirements)

But how do you use it as a comparator, since it has large tolerances on the receiver thresholds (100mV)?

I had good results with AD8561 in that dual slope thing.
But beware of the bias current. It took a FET buffer or
it would have interfered with the slow discharge of the dual slope cap.


regards, Gerhard

 

[Phil Hobbs]

On 5/7/19 4:57 PM, John Larkin wrote:

On Tue, 7 May 2019 15:39:04 -0400, bitrex <user@example.net> wrote:

On 5/7/19 3:08 PM, Tom Gardner wrote:
On 07/05/19 18:20, Cursitor Doom wrote:
On Tue, 07 May 2019 07:14:33 -0700, klaus.kragelund wrote:

Hi

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)

I know I'll appear a dinosaur by saying this, but you really can't beat a
good old fashioned Wien Bridge oscillator when it comes to spectral
purity and low phase noise. They certainly beat the crap out of any
digital synthesis technique IMV.

No, but that statement is about as sensible as almost
all your statements.

He's right about the spectral purity and the phase noise can be cleaned
up by injection-locking it.

A sampler time base needs to stay phase coherent to a trigger.
Injection locking whacks randomly the phase. We care about time, not
frequency.

Sinusoidal injection locking of sinusoidal oscillators is a lot gentler
than square wave injection.

It is possible to build an instant-start LC oscillator, and phase-lock
it to a low phase noise XO, and preserve the original trigger timing
with picosecond precision, but I can't tell how.

But Klaus can do a totally synchronous system, for TDR, so doesn't
need a triggered oscillator. Could do a simple all analog ramp for the
timebase.

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[bitrex]

On 5/9/19 9:33 AM, Phil Hobbs wrote:

On 5/7/19 4:57 PM, John Larkin wrote:
On Tue, 7 May 2019 15:39:04 -0400, bitrex <user@example.net> wrote:

On 5/7/19 3:08 PM, Tom Gardner wrote:
On 07/05/19 18:20, Cursitor Doom wrote:
On Tue, 07 May 2019 07:14:33 -0700, klaus.kragelund wrote:

Hi

I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)

I know I'll appear a dinosaur by saying this, but you really can't
beat a
good old fashioned Wien Bridge oscillator when it comes to spectral
purity and low phase noise. They certainly beat the crap out of any
digital synthesis technique IMV.

No, but that statement is about as sensible as almost
all your statements.

He's right about the spectral purity and the phase noise can be cleaned
up by injection-locking it.

A sampler time base needs to stay phase coherent to a trigger.
Injection locking whacks randomly the phase. We care about time, not
frequency.

Sinusoidal injection locking of sinusoidal oscillators is a lot gentler
than square wave injection.

If oscillator 2 is phase-locked to oscillator 1 then ideally the phase
of oscillator 2 shouldn't be getting randomly "whacked" by oscillator 1,
yeah? they're locked - isn't that what "locking" is? if oscillator 2's
phase is getting randomly whacked then they aren't locked!

It takes some time for a lock to occur though, like the two metronomes
on the board that can roll around on top of two tin cans, so it's no
good for instant on-off.

It is possible to build an instant-start LC oscillator, and phase-lock
it to a low phase noise XO, and preserve the original trigger timing
with picosecond precision, but I can't tell how.

But Klaus can do a totally synchronous system, for TDR, so doesn't
need a triggered oscillator. Could do a simple all analog ramp for the
timebase.

Cheers

Phil Hobbs