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On Tuesday, 7 May 2019 22:50:59 UTC+2, John Larkin wrote:
That would then be a little sensitive to the DAC noise, which would cause jitter directly. But that DAC signal can be heavily filtered
I would need a linear ramp then. But in other threads you have shown more or less how that can be done
That is sort of how they are doing the ps timebase. They use a standard timer (16 bit or whatever), max clock of 144MHz (7ns resolution). Then they add a delay line, to generate the 217ps smaller intervals
Cheers
Klaus
On Tue, 7 May 2019 12:42:22 -0700 (PDT), klaus.kragelund@gmail.com
wrote:
On Tuesday, 7 May 2019 17:18:48 UTC+2, John Larkin wrote:
On Tue, 7 May 2019 07:14:33 -0700 (PDT), klaus.kragelund@gmail.com
wrote:
Hi
I'm working on my ~3ns 4 diode sampler (preferable 1ns if possible)
So I need a pretty good oscillator, with low jitter
I have never needed a good oscillator before, so on this topic I am totally at square one
First I was thinking about an RC oscillator, and cleaning up the jitter. RC typically have 1us of jitter (found info on the web), and a crystal oscillator, standard type probably 1ns jitter. But I think that idea was crazy, a PLL clean up, would not work I guess.
In order to not mess up my measurement and keep the averaging low (I could do many samples and average), I would guess I need jitter of 300ps (10%) of my 3ns reolution)
But jitter is not listed as a search parameter. So where to start? (with low price in mind)
Cheers
Klaus
Do you want a continuous running oscillator, namely a crystal
oscillator? That works if the measured event and the sampler timebase
can run off the same clock. Even cheap XOs have picosecond or
sub-picosecond jitter measured over short time spans. Longer spans are
trashed by low frequency phase noise, numbers in the nanoseconds per
second for cheap XOs, picoseconds per second for good OCXOs.
That is a very good point, great catch.
I will be using it in a TDR, so short pulse, and build up waveform for reflected pulse. Since I need up to 200m lenth, the maximum time from the emitted pulse to reflected is 3us. So if the jitter is slowly changing over time, it may be a lot less in only that time span.
The simplest timebase is a linear RC ramp and a comparator and a DAC,
no clock at all. RMS jitter of 1 part in 20,000 isn't difficult,
1:50000 is challenging. So 3 us/20000 would be 150 ps RMS jitter,
which is probably OK. The echo from 200m of coax will be very soft,
and you can average to reduce displayed jitter. Cheat a little.
That would then be a little sensitive to the DAC noise, which would cause jitter directly. But that DAC signal can be heavily filtered
I would need a linear ramp then. But in other threads you have shown more or less how that can be done
You can switch the ramp capacitor or charging current to have a couple
of different delay ranges, and get less jitter on the short range.
A TDR can use the same clock for the launch pulse as for counting
coarse timebase delay, so an XO for coarse counts and a vernier ramp
for fine delays could hugely reduce sampling jitter. Like say, a 50
MHz clock followed by a 20 ns analog ramp.
That is sort of how they are doing the ps timebase. They use a standard timer (16 bit or whatever), max clock of 144MHz (7ns resolution). Then they add a delay line, to generate the 217ps smaller intervals
Cheers
Klaus