VHDL Language

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Convert ADC output format to DAC input
Replies
7
Views
981
Andy
A
A
configurable number of interfaces
Replies
5
Views
779
ananth kamath
A
C
Dual Edged Counter
Replies
6
Views
962
Cory Shol
C
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Hexadecimal value (literal) as function parameter, is it pos
Replies
3
Views
849
Andy
A
?
Architecture name through hierarchy
Replies
6
Views
993
KJ
K
?
Which function takes precedence when multiple are visible?
Replies
2
Views
759
Brian Drummond
B
R
"Non-static aggregate with multiple choices has non-static o
Replies
9
Views
938
rickman
R
E
precedence of a downto clause
Replies
1
Views
725
Alan Fitch
A
K
Hardware Acceleration VGA graphics controller
Replies
7
Views
964
Paul Urbanus
P
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Clock Switching in VHDL/ Actel igloo nano device
Replies
9
Views
1K
Dave Higton
D
V
Mathematical formula implementation
Replies
15
Views
2K
vhdl_newbie
V
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Conditional Assignments in Constants
Replies
4
Views
805
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Feedback loop in VHDL-AMS
Replies
0
Views
284
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L
VHDL code verification
Replies
8
Views
1K
Allan Herriman
A
G
Resolved vs. Unresolved standard logic, and when to get away
Replies
8
Views
1K
Andy
A
K
Memory Mapped Register Help
Replies
4
Views
881
KAY
K
N
to_unsigned as an expression in an aggregate
Replies
7
Views
887
nbayard
N
N
System Verilog
Replies
1
Views
769
HT-Lab
H
S
Data type conversion
Replies
1
Views
720
KJ
K
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SILICON ID ERROR
Replies
0
Views
413
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