P
Phil Hobbs
Guest
On 2020-02-13 06:23, Chris Jones wrote:
Way easier to draw a schematic and mark pin 1 by gouging the package
with dikes. DIP leads are very strong if you don't bend them--you can
really reef on them, which lets you bend Rs and Cs into position with
just your fingers, rather than needing pliers. All the solder joints
are a quarter inch above the ground plane, so shorts are a non-issue.
Dead bug is super fast with DIPs. You can do it with SOICs and SOT23s
as well, but their leads are much wimpier, so you have to use pliers a
lot. I stagger the SOIC leads like saw teeth, which helps.
For anything smaller, I just use Bellin breakouts held down with Gorilla
tape. pHEMTs and SiGe transistors are a bit more of a challenge, but
pHEMTs are actually surprisingly stable for such hot devices.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510
http://electrooptical.net
http://hobbs-eo.com
On 13/02/2020 07:58, rangerssuck wrote:
On Thursday, February 6, 2020 at 2:12:16 PM UTC-5, Joerg wrote:
I don't like dead bugging because the pin orders are always mirrored. So
I cut small snippets of wood, copperclad or whatever, and glue the
snippets and then the parts to larger copperclad. Then it's "living bug
style", still on top and the pin order is as in the datasheet.
For dead bugging with DIP packages, I often just bend the pins 180° so
that I can stick the chip down face up. I sometimes cringe thinking
about busted off pins, but in over 40 years of doing this, I've yet to
have one break.
Bending the leads 90 degrees (so that the leadframe is all in one plane,
like it was before the manufacturer bent it) is sufficient and less
risky than 180 degrees. Works with SO-8 too. With care, you can avoid
shorts to the groundplane, and if you don't want to have to exercise
care, put down some strips of Kapton tape onto the groundplane
beforehand, where required.
I certainly prefer the package markings to be face-up, because I have a
terrible memory and will lose the diagrams etc. and will want to know
which chip I used.
Way easier to draw a schematic and mark pin 1 by gouging the package
with dikes. DIP leads are very strong if you don't bend them--you can
really reef on them, which lets you bend Rs and Cs into position with
just your fingers, rather than needing pliers. All the solder joints
are a quarter inch above the ground plane, so shorts are a non-issue.
Dead bug is super fast with DIPs. You can do it with SOICs and SOT23s
as well, but their leads are much wimpier, so you have to use pliers a
lot. I stagger the SOIC leads like saw teeth, which helps.
For anything smaller, I just use Bellin breakouts held down with Gorilla
tape. pHEMTs and SiGe transistors are a bit more of a challenge, but
pHEMTs are actually surprisingly stable for such hot devices.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510
http://electrooptical.net
http://hobbs-eo.com