Help with Laplace Transform for PLL VCO, Kvco?????

[Mike]

On Thu, 18 Mar 2004 21:08:58 -0000, Francis wrote:

You mentioned "Thaler and Pastel, Analysis and Design of Nonlinear Feedback
Control Systems"
1962. Looks interesting.

Now it strikes me that that is something that should by now be in the public
domain, ie out of copyright and so freely available. Ideally downloadable.
(Did you know that you can download all of Charles Dickens works ?)

I don't know how things are where you are, but here in the US copyright
lasts much longer than 42 years. I'm not sure when Thaler and Pastel's book
will pass into the public domain, but it hasn't yet. Copy and distribute at
your own risk.

-- Mike --

 

[Paul Burke]

Mike wrote:

On Thu, 18 Mar 2004 21:08:58 -0000, Francis wrote:


You mentioned "Thaler and Pastel, Analysis and Design of Nonlinear Feedback
Control Systems"
1962. Looks interesting.

Now it strikes me that that is something that should by now be in the public
domain, ie out of copyright and so freely available. Ideally downloadable.
(Did you know that you can download all of Charles Dickens works ?)


I don't know how things are where you are, but here in the US copyright
lasts much longer than 42 years. I'm not sure when Thaler and Pastel's book
will pass into the public domain, but it hasn't yet. Copy and distribute at
your own risk.

I believe it's currently 70 years after the death of the (last) author,
but can be renewed by their heirs for much longer. In fact, I'm not sure
that the Iliad is out of copyright yet...

Paul Burke

 

[Bill Sloman]

"Kevin Aylward" <kevindotaylwardEXTRACT@anasoft.co.uk> wrote in message news:<o_h6c.141$tp.43@newsfep3-gui.server.ntli.net>...

Allan Herriman wrote:
On Thu, 18 Mar 2004 09:09:20 -0000, "Kevin Aylward"
kevindotaylwardEXTRACT@anasoft.co.uk> wrote:

Bill Sloman wrote:
John Larkin <jjlarkin@highlandSNIPtechTHISnologyPLEASE.com> wrote in
message news:<r7vg50924c6n88hb3qea96vr2jt90app6c@4ax.com>...
On Wed, 17 Mar 2004 16:12:28 GMT, Fred Bloggs <nospam@nospam.com
wrote:

because it means the VCO gain is so high that the only final state
possible is one with zero phase error between the VCO and
reference input.

Zero frequency error, I think.

Floyd M. Gardner's "Phaselock Techniques" (ISBN 0-471-04294-3)
classifies phase-locked loops as first order if they have zero
frequency error but a finite phase error, second order if they have
a zero phase error at static frequency and third order if they
track a varying frequency with zero phase error.


Why?

This is misleading or confusing at best. "Order" usually refers to
the total *filter* order.

Kevin, do you have any references to support your claim? I've only
ever seen "order" used to represent the number of open loop poles *of
the entire loop*, not just the filter.

That's not what I meant. I admit this was a bit vague. By filter order I
did mean the whole system response. My issue is that the tracking a
varying frequency with zero phase error system is not a 3rd order system
in terms of its loop response. If it was, the PLLs I have designed
simply would not work, they would oscillate.

Floyd M, Gardener does point out that it is difficult to design third
order phase-locked loops that won't oscillate, though it can be done.
His "Phaselock Techniques" is the classic text on phase-locked loops -
I've got the second edition, published in 1979.

-------
Bill Sloman, Nijmegen

-------
Bill Sloman, Nijmegen

 

[Pellucid]

Another book is "Frequency Synthesizers theory and design" by V.
Manassewitsch, Wiley, ISBN 0-471-01116-9 1987.
..
"Dr. Slick" <radio913@aol.com> wrote in message
news:1d15af91.0403171014.725da348@posting.google.com...

"Terry Given" <the_domes@xtra.co.nz> wrote in message
news:<U3V5c.7769$rw6.156556@news.xtra.co.nz>...

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the transfer
function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?

Phase Locked Loops, R.E. Best, McGraw-Hill


I've got this book, and he doesn't answer my question, at least not
what i read last night.

S.

 

[Terry Given]

"Dr. Slick" <radio913@aol.com> wrote in message
news:1d15af91.0403171014.725da348@posting.google.com...

"Terry Given" <the_domes@xtra.co.nz> wrote in message
news:<U3V5c.7769$rw6.156556@news.xtra.co.nz>...

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the transfer
function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?

Phase Locked Loops, R.E. Best, McGraw-Hill


I've got this book, and he doesn't answer my question, at least not
what i read last night.

S.

page 15, 3rd ed. - the derivation of equation 2.10. It has been answered
here a couple of times, but heres another way to look at it:

vco input = control voltage
vco output = oscillating at (base frequency +KVin) = Asin((w+KVin)t)

phase detector INPUT = phase angle of VC output = integral of frequency

thats where the integrator comes from. If you use a frequency detector not a
phase detector, the 1/s isnt there.....you have a FLL instead.

 

[Dr. Slick]

"Terry Given" <the_domes@xtra.co.nz> wrote in message news:<e5d7c.11810$rw6.222989@news.xtra.co.nz>...

page 15, 3rd ed. - the derivation of equation 2.10. It has been answered
here a couple of times, but heres another way to look at it:

vco input = control voltage
vco output = oscillating at (base frequency +KVin) = Asin((w+KVin)t)

phase detector INPUT = phase angle of VC output = integral of frequency

thats where the integrator comes from. If you use a frequency detector not a
phase detector, the 1/s isnt there.....you have a FLL instead.

This is all understood, but he still doesn't answer my question.

The 1/s term also describes the reactance of a capacitor, like
1/sC, which tells you that at 0 Hz, the impedance is infinite.

How is this analogous to the VCO case? For the VCO, this 1/s
indicates that the transfer function goes to infinity at DC (0 Hz),
right?


My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.


Slick

 

[Active8]

On Thu, 18 Mar 2004 09:09:20 -0000, Kevin Aylward wrote:

Bill Sloman wrote:
John Larkin <jjlarkin@highlandSNIPtechTHISnologyPLEASE.com> wrote in
message news:<r7vg50924c6n88hb3qea96vr2jt90app6c@4ax.com>...
On Wed, 17 Mar 2004 16:12:28 GMT, Fred Bloggs <nospam@nospam.com
wrote:

because it means the VCO gain is so high that the only final state
possible is one with zero phase error between the VCO and reference
input.

Zero frequency error, I think.

Floyd M. Gardner's "Phaselock Techniques" (ISBN 0-471-04294-3)
classifies phase-locked loops as first order if they have zero
frequency error but a finite phase error, second order if they have a
zero phase error at static frequency and third order if they track a
varying frequency with zero phase error.


Why?

This is misleading or confusing at best. "Order" usually refers to the
total *filter* order. The standard one stage pole-zero LP filter used on
typical PLLs will be stable for *all* of the above phase detectors. They
are all (1+as)/s(1+bs). This is a 2nd order system, compensated to
single at HF. Naming the zero phase error frequency tracking detector
system as a 3rd order system implies that you need two leads to
compensate it, when you most certainly don't.

The problem here is that he's referring to Type I, II, and III
loops, not the "order" of the filter. The loop typr refers to the
number of poles of the loop transfer function G(s)H(s) at the
origin. "Order" is definitely *not* the correct term. The different
"types" of the system track step position, step velocity, and step
acceleration, respectively, with zero phase errors in the steady
state.

--

Best Regards,
Mike

 

[Active8]

On Thu, 18 Mar 2004 20:36:43 +1100, Allan Herriman wrote:

On Thu, 18 Mar 2004 09:09:20 -0000, "Kevin Aylward"
kevindotaylwardEXTRACT@anasoft.co.uk> wrote:

Bill Sloman wrote:
John Larkin <jjlarkin@highlandSNIPtechTHISnologyPLEASE.com> wrote in
message news:<r7vg50924c6n88hb3qea96vr2jt90app6c@4ax.com>...
On Wed, 17 Mar 2004 16:12:28 GMT, Fred Bloggs <nospam@nospam.com
wrote:

because it means the VCO gain is so high that the only final state
possible is one with zero phase error between the VCO and reference
input.

Zero frequency error, I think.

Floyd M. Gardner's "Phaselock Techniques" (ISBN 0-471-04294-3)
classifies phase-locked loops as first order if they have zero
frequency error but a finite phase error, second order if they have a
zero phase error at static frequency and third order if they track a
varying frequency with zero phase error.


Why?

This is misleading or confusing at best. "Order" usually refers to the
total *filter* order.

Kevin, do you have any references to support your claim? I've only
ever seen "order" used to represent the number of open loop poles *of
the entire loop*, not just the filter.

Regards,
Allan.

"Order" refers to the highest degree of the characteristic equation
(open loop gain + 1), the roots of which become the closed loop
poles of the overall xfer function. Maybe that's why the terms
"Type" and "Order" get confused, with "Order" being thrown around
indiscriminately.

--
Best Regards,
Mike

 

[Active8]

On Thu, 18 Mar 2004 09:27:07 -0800, Tim Wescott wrote:

"Bill Sloman" <bill.sloman@ieee.org> wrote in message
news:7c584d27.0403171617.21694c7a@posting.google.com...
John Larkin <jjlarkin@highlandSNIPtechTHISnologyPLEASE.com> wrote in
message news:<r7vg50924c6n88hb3qea96vr2jt90app6c@4ax.com>...
On Wed, 17 Mar 2004 16:12:28 GMT, Fred Bloggs <nospam@nospam.com
wrote:

because it means the VCO gain is so high that the only final state
possible is one with zero phase error between the VCO and reference
input.

Zero frequency error, I think.

Floyd M. Gardner's "Phaselock Techniques" (ISBN 0-471-04294-3)
classifies phase-locked loops as first order if they have zero
frequency error but a finite phase error, second order if they have a
zero phase error at static frequency and third order if they track a
varying frequency with zero phase error.

------
Bill Sloman, Nijmegen

I think you're thinking "type 1, 2, etc.", not "order". Control loops are
classified by the number of integrators that they have in the forward part
of the loop -- one integrator gives you zero DC error with a step input, two
gives you zero DC error with a ramp, etc. You can have a 10-gazillionth
order system that still has steady-state error to a step input, which would
make it a type 0 system.

Check any 3rd-year text on control theory.

Yeah, I think I'd like to find a copy of Gardner at Barnes and Nobel
where I can sit down and read it between naps and cappuccinos before
I shell out. I can see myself getting all pissed off at these kinds
of confusing terminology errors.

--
Best Regards,
Mike

 

[Active8]

On 17 Mar 2004 10:14:53 -0800, Dr. Slick wrote:

"Terry Given" <the_domes@xtra.co.nz> wrote in message news:<U3V5c.7769$rw6.156556@news.xtra.co.nz>...

I understand that the Kvco is usually in MHz/volt, but could
someone explain why it has the 1/s? Which indicates that the transfer
function goes to infinity at DC (0 Hz)?

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

Any educated comments?

Phase Locked Loops, R.E. Best, McGraw-Hill


I've got this book, and he doesn't answer my question, at least not
what i read last night.

S.

Try googling on "Dean's book". Download it. ISTR that he at least
shows how you can either use or not use 1/s if you wan to work with
phase or freq. It more or less says what Terry said.

--
Best Regards,
Mike

 

[Active8]

On 21 Mar 2004 10:25:00 -0800, Dr. Slick wrote:

"Terry Given" <the_domes@xtra.co.nz> wrote in message news:<e5d7c.11810$rw6.222989@news.xtra.co.nz>...

page 15, 3rd ed. - the derivation of equation 2.10. It has been answered
here a couple of times, but heres another way to look at it:

vco input = control voltage
vco output = oscillating at (base frequency +KVin) = Asin((w+KVin)t)

phase detector INPUT = phase angle of VC output = integral of frequency

thats where the integrator comes from. If you use a frequency detector not a
phase detector, the 1/s isnt there.....you have a FLL instead.


This is all understood, but he still doesn't answer my question.

The 1/s term also describes the reactance of a capacitor, like
1/sC, which tells you that at 0 Hz, the impedance is infinite.

No, it tells you that in the time domain, there's an integration,
i.e. v = 1/C INT(i dt) It just works out that an ideal cap has
infinite reactance since dt = 1/f = oo for f=0

How is this analogous to the VCO case?

There is no analogy other than the fact that there's an integration.

For the VCO, this 1/s
indicates that the transfer function goes to infinity at DC (0 Hz),
right?

A DC input to a VCO - phase will always increase without bound -
1/s. There's the closest thing to an analogy which you've been given
over and over.

But now you're talking about the closed loop xfer function

phi_err/phi_ref = 1/[1 + G(s)H(s)]

which isn't running at DC.

See, that DC input to the VCO is not realized in s = jw. This "s"
appears in more places in the xfer function than just the VCO gain.
"s" is refering to the steady state frequency of the system.

The VCO control voltage is multiplied by the VCO gain, Kv or Kv/s
since we're working with a phase detector. And Kv is *not* K*v. How
'bout K_v?

So it's V_control.V_c / s

where V_control is the filtered PD output.

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

No, you're confusing the VCO gain with the whole loop again. ANY VCO
that's oscillating will increase it's phase relative to t=0 without
bound. 0, 2pi, 4pi, ... ad infinitum. Didn't I post that before?

If you'd draw out two waves of different freqs, you'd see that
sometimes the rising edges are going to be getting farther apart and
sometimes they'll be closer. If they're harmonically related (Design
HINT), they'll even be spot on at times.

--
Best Regards,
Mike

 

[Dr. Slick]

Active8 <reply2group@ndbbm.net> wrote in message news:<fmxqq7iz4mwo$.dlg@news.individual.net>...

This is all understood, but he still doesn't answer my question.

The 1/s term also describes the reactance of a capacitor, like
1/sC, which tells you that at 0 Hz, the impedance is infinite.

No, it tells you that in the time domain, there's an integration,
i.e. v = 1/C INT(i dt) It just works out that an ideal cap has
infinite reactance since dt = 1/f = oo for f=0

Ok, certainly the voltage across the cap is v=1/C INT(i dt),
and the PERIOD T=1/f=oo for f=0, but dt is infinitesimally small.

And the 1/sC does indeed tell us that the reactance will be
infinite
at 0 Hz.

How is this analogous to the VCO case?

There is no analogy other than the fact that there's an integration.

1/s is 1/s, not matter where it is found. So SOMETHING goes to
infinity in a VCO at 0 Hz!

But now you're talking about the closed loop xfer function

phi_err/phi_ref = 1/[1 + G(s)H(s)]

Where did you get this?

phi_err is what is coming out of the phase detector, and phi_ref
should
be the input. So the numerator here should have Kd in it.

which isn't running at DC.

See, that DC input to the VCO is not realized in s = jw. This "s"
appears in more places in the xfer function than just the VCO gain.
"s" is refering to the steady state frequency of the system.

A LOCKED PLL should have a DC tuning voltage from the charge
pumped capacitor.

My guess today has been that the tuning voltage can be at a DC
voltage (like a single phase), and yet the phase of the output
continues to increase, which kinda implies that the Output phi/Input
phi gain is infinite.

No, you're confusing the VCO gain with the whole loop again. ANY VCO
that's oscillating will increase it's phase relative to t=0 without
bound. 0, 2pi, 4pi, ... ad infinitum. Didn't I post that before?

If the VCO gain is Ko/s, then we can certainly talk about it as a
single
block, out of the loop. Why not?

And what if you DON'T use DC? What if you use a tuning sinewave
of a frequency that is close to the VCO's operating frequency?


Slick

 

[Active8]

On 22 Mar 2004 03:52:46 -0800, Dr. Slick wrote:

Active8 <reply2group@ndbbm.net> wrote in message news:<fmxqq7iz4mwo$.dlg@news.individual.net>...

This is all understood, but he still doesn't answer my question.

The 1/s term also describes the reactance of a capacitor, like
1/sC, which tells you that at 0 Hz, the impedance is infinite.

No, it tells you that in the time domain, there's an integration,
i.e. v = 1/C INT(i dt) It just works out that an ideal cap has
infinite reactance since dt = 1/f = oo for f=0


Ok, certainly the voltage across the cap is v=1/C INT(i dt),
and the PERIOD T=1/f=oo for f=0, but dt is infinitesimally small.

But dT refers to period in the practical use of these equations like

v=L di/dt

And the 1/sC does indeed tell us that the reactance will be
infinite
at 0 Hz.

OK so does 1/jwC. So what? the 1/s still comes from the integral.

How is this analogous to the VCO case?

There is no analogy other than the fact that there's an integration.


1/s is 1/s, not matter where it is found. So SOMETHING goes to
infinity in a VCO at 0 Hz!




But now you're talking about the closed loop xfer function

phi_err/phi_ref = 1/[1 + G(s)H(s)]


Where did you get this?

Control Theory. Same place you get

phi_out/phi_ref = G(s)/[1 + G(s)H(s)]

phi_err is what is coming out of the phase detector, and phi_ref
should
be the input. So the numerator here should have Kd in it.

Kd is in G(s), the forward gain.

which isn't running at DC.

See, that DC input to the VCO is not realized in s = jw. This "s"
appears in more places in the xfer function than just the VCO gain.
"s" is refering to the steady state frequency of the system.


A LOCKED PLL should have a DC tuning voltage from the charge
pumped capacitor.

and the phase will increase without bound, but the phase error

won't. The only analogy is when you look at the VCO by itself. When
looking at the whole system, 1/s is, again, there to put the VCO
output in terms of phase and allow one to analyze the system
response.

snip the daily guess

No, you're confusing the VCO gain with the whole loop again. ANY VCO
that's oscillating will increase it's phase relative to t=0 without
bound. 0, 2pi, 4pi, ... ad infinitum. Didn't I post that before?


If the VCO gain is Ko/s, then we can certainly talk about it as a
^^^^ Kv/s
single
block, out of the loop. Why not?

And what if you DON'T use DC? What if you use a tuning sinewave
of a frequency that is close to the VCO's operating frequency?

Operate the loop outside of it's bandwidth? You'd have a modulator,
no? Or are you talking about just the VCO? I'd think you'd get a f'd
up envelope or a phase modulation.

--
Best Regards,
Mike

 

[Terry Given]

"Active8" <reply2group@ndbbm.net> wrote in message
news:1797lt63fbt8k.dlg@news.individual.net...

On 22 Mar 2004 03:52:46 -0800, Dr. Slick wrote:

Active8 <reply2group@ndbbm.net> wrote in message
news:<fmxqq7iz4mwo$.dlg@news.individual.net>...

This is all understood, but he still doesn't answer my question.

The 1/s term also describes the reactance of a capacitor, like
1/sC, which tells you that at 0 Hz, the impedance is infinite.

No, it tells you that in the time domain, there's an integration,
i.e. v = 1/C INT(i dt) It just works out that an ideal cap has
infinite reactance since dt = 1/f = oo for f=0


Ok, certainly the voltage across the cap is v=1/C INT(i dt),
and the PERIOD T=1/f=oo for f=0, but dt is infinitesimally small.

But dT refers to period in the practical use of these equations like

v=L di/dt

And the 1/sC does indeed tell us that the reactance will be
infinite
at 0 Hz.

OK so does 1/jwC. So what? the 1/s still comes from the integral.


How is this analogous to the VCO case?

There is no analogy other than the fact that there's an integration.


1/s is 1/s, not matter where it is found. So SOMETHING goes to
infinity in a VCO at 0 Hz!

It does - the PHASE.

remember we are talking about THE ANGLE OF A ROTATING VECTOR. The vector
never stops rotating (at least not if frequency <> 0) therefore phase
continues to ramp up, ie the vector keeps spinning around. Draw a plot of
angle vs time, and DONT wrap the angle around between 0 and 2pi (or +/- pi
which works better in digital controllers). Pretty soon you will see that
for constant frequency (ie constant VCO input) theta is a linear ramp that
tends towards infinity.

In practice it is tedious to represent an infinitely large number in binary,
and difficult to generate an infinitely large voltage (or current, for all
you strange lovers of Norton out there , so we take advantage of
rotational symmetry and organise theta to wrap around between (say) +/- pi
radians.

If you implement a PLL in DSP you will immediately see the need to do this
"wrap-around" the first time you run your system, and you will probably find
it useful to display the sawtooth theta waveform (f=const) during
debugging/tuning.

If you implement a PLL in an analogue circuit, the phase detector does it
for you, IMPLICITLY.

If you really wanted, you could build an "integrating" phase detector (I'm
making this up as I go along so bear with me if i get it wrong) by
integrating both the input signal and the VCO output, then using a simple
comparator (or error amp) to do the phase detection.

Nobody does this because there are much easier (cheaper) ways of achieving
the same goal. Mind you, all the "digital" phase detectors require the
"plant" (ie loop filter) to have an overall low-pass characteristic, the
averaging behaviour of which helps perform the "integration" required by the
phase detector. If you neglect this and try to design a fancy plant, watch
it not work!

I hope that clears up the confusion regarding the "what tends to infinity at
DC" question (theta).

And it has bugger all really to do with any control theory or anything, its
just that phase detectors are sneaky circuits, that are more distributed
than you might at first think. And of course circles are fun.

 

[Active8]

On Tue, 23 Mar 2004 15:27:56 -0800, Terry Given wrote:

"Active8" <reply2group@ndbbm.net> wrote in message
news:1797lt63fbt8k.dlg@news.individual.net...
On 22 Mar 2004 03:52:46 -0800, Dr. Slick wrote:

Active8 <reply2group@ndbbm.net> wrote in message
news:<fmxqq7iz4mwo$.dlg@news.individual.net>...

This is all understood, but he still doesn't answer my question.

The 1/s term also describes the reactance of a capacitor, like
1/sC, which tells you that at 0 Hz, the impedance is infinite.

No, it tells you that in the time domain, there's an integration,
i.e. v = 1/C INT(i dt) It just works out that an ideal cap has
infinite reactance since dt = 1/f = oo for f=0


Ok, certainly the voltage across the cap is v=1/C INT(i dt),
and the PERIOD T=1/f=oo for f=0, but dt is infinitesimally small.

But dT refers to period in the practical use of these equations like

v=L di/dt

And the 1/sC does indeed tell us that the reactance will be
infinite
at 0 Hz.

OK so does 1/jwC. So what? the 1/s still comes from the integral.


How is this analogous to the VCO case?

There is no analogy other than the fact that there's an integration.


1/s is 1/s, not matter where it is found. So SOMETHING goes to
infinity in a VCO at 0 Hz!

It does - the PHASE.

remember we are talking about THE ANGLE OF A ROTATING VECTOR. The vector
never stops rotating (at least not if frequency <> 0) therefore phase
continues to ramp up, ie the vector keeps spinning around. Draw a plot of
angle vs time, and DONT wrap the angle around between 0 and 2pi (or +/- pi
which works better in digital controllers). Pretty soon you will see that
for constant frequency (ie constant VCO input) theta is a linear ramp that
tends towards infinity.

In practice it is tedious to represent an infinitely large number in binary,
and difficult to generate an infinitely large voltage (or current, for all
you strange lovers of Norton out there , so we take advantage of
rotational symmetry and organise theta to wrap around between (say) +/- pi
radians.

If you implement a PLL in DSP you will immediately see the need to do this
"wrap-around" the first time you run your system, and you will probably find
it useful to display the sawtooth theta waveform (f=const) during
debugging/tuning.

If you implement a PLL in an analogue circuit, the phase detector does it
for you, IMPLICITLY.

If you really wanted, you could build an "integrating" phase detector (I'm
making this up as I go along so bear with me if i get it wrong) by
integrating both the input signal and the VCO output, then using a simple
comparator (or error amp) to do the phase detection.

Nobody does this because there are much easier (cheaper) ways of achieving
the same goal. Mind you, all the "digital" phase detectors require the
"plant" (ie loop filter) to have an overall low-pass characteristic, the
averaging behaviour of which helps perform the "integration" required by the
phase detector. If you neglect this and try to design a fancy plant, watch
it not work!

No, the "plant" is analogous to the VCO and the filter is the
"controller". THe PD is the error amp.

I hope that clears up the confusion regarding the "what tends to infinity at
DC" question (theta).

And it has bugger all really to do with any control theory or anything,

That was going to be part of my next reply. Slick is desperately
looking for an analogy between caps and VCOs. Like the spring and
the RLC tank. The analogy just isn't there. The 1/s is only the
result of the integral. The whole PLL system could do without the
1/s in the VCO gain if a FD (not PD) were used so that throws any
analogy out the door, anyway. Furthermore, as much as there is to
worry about with PLL circuits, it should be sufficient to understand
the results obtainable from the loop equation. Once you have that,
you just factor out the characteristic equaion for that type of
system and the filter is yours. It's just a matter of selecting the
right components to put the poles and zeros where they belong.

its
just that phase detectors are sneaky circuits, that are more distributed
than you might at first think. And of course circles are fun.

--
Best Regards,
Mike

 

[Dr. Slick]

Active8 <reply2group@ndbbm.net> wrote in message news:<1797lt63fbt8k.dlg@news.individual.net>...

Ok, certainly the voltage across the cap is v=1/C INT(i dt),
and the PERIOD T=1/f=oo for f=0, but dt is infinitesimally small.

But dT refers to period in the practical use of these equations like

v=L di/dt

I noticed you changed it from dt to dT, ok!

The dt is still infinitesimally small. And the di/dt will be the
slope
of the current, which will change of course.

And the 1/sC does indeed tell us that the reactance will be
infinite
at 0 Hz.

OK so does 1/jwC. So what? the 1/s still comes from the integral.

So there must be an analogy.

1/s is 1/s, not matter where it is found. So SOMETHING goes to
infinity in a VCO at 0 Hz!

It may be that the phase gain (phi_out/phi_in) is what goes to
infinity.
At DC tuning voltage, the phase of the input doesn't change, so for
every 1
rad of phi_in, the phi_out is infinitely large.

However, perhaps if you use a non-zero frequency for the tuning
voltage (like a sine wave of a non-zero frequency), then the change in
phi_out for every 1 rad of phi_in will NOT be infinite anymore.




<snip YOUR daily guess>

And what if you DON'T use DC? What if you use a tuning sinewave
of a frequency that is close to the VCO's operating frequency?

Operate the loop outside of it's bandwidth? You'd have a modulator,
no? Or are you talking about just the VCO? I'd think you'd get a f'd
up envelope or a phase modulation.

how can you modulate outside of the loop bandwidth? The loop
will "correct" your modulation.


Slick

 

[Dr. Slick]

"Terry Given" <the_domes@xtra.co.nz> wrote in message news:<VdN7c.13589$rw6.253262@news.xtra.co.nz>...

1/s is 1/s, not matter where it is found. So SOMETHING goes to
infinity in a VCO at 0 Hz!

It does - the PHASE.

remember we are talking about THE ANGLE OF A ROTATING VECTOR. The vector
never stops rotating (at least not if frequency <> 0) therefore phase
continues to ramp up, ie the vector keeps spinning around. Draw a plot of
angle vs time, and DONT wrap the angle around between 0 and 2pi (or +/- pi
which works better in digital controllers). Pretty soon you will see that
for constant frequency (ie constant VCO input) theta is a linear ramp that
tends towards infinity.


If you really wanted, you could build an "integrating" phase detector (I'm
making this up as I go along so bear with me if i get it wrong) by
integrating both the input signal and the VCO output, then using a simple
comparator (or error amp) to do the phase detection.

Nobody does this because there are much easier (cheaper) ways of achieving
the same goal. Mind you, all the "digital" phase detectors require the
"plant" (ie loop filter) to have an overall low-pass characteristic, the
averaging behaviour of which helps perform the "integration" required by the
phase detector. If you neglect this and try to design a fancy plant, watch
it not work!

You mean to call the loop filter the "controller".

I hope that clears up the confusion regarding the "what tends to infinity at
DC" question (theta).

And it has bugger all really to do with any control theory or anything, its
just that phase detectors are sneaky circuits, that are more distributed
than you might at first think. And of course circles are fun.

Well, a lot of engineers just go through the motions of understanding
some pretty not-so-simple concepts, and just bull-sh** their way by
pretending they understand more than they really do, but they consequently
don't learn as much as they could.

Fear of admiting you don't know something... you eventually figure out
who you can trust.

Paradoxically, the people i trust the most are the ones who can actually
admit, "I don't know."

OK so does 1/jwC. So what? the 1/s still comes from the integral.

So there must be an analogy.

1/s is 1/s, not matter where it is found. So SOMETHING goes to
infinity in a VCO at 0 Hz!

It may be that the phase gain (phi_out/phi_in) is what goes to
infinity.
At DC tuning voltage, the phase of the input doesn't change, so for
every 1
rad of phi_in, the phi_out is infinitely large.

However, perhaps if you use a non-zero frequency for the tuning
voltage (like a sine wave of a non-zero frequency), then the change in
phi_out for every 1 rad of phi_in will NOT be infinite anymore.


I believe this concurs with what you have written as well, eh
Terry?



Slick

 

[Terry Given]

That was going to be part of my next reply. Slick is desperately
looking for an analogy between caps and VCOs. Like the spring and
the RLC tank. The analogy just isn't there. The 1/s is only the
result of the integral.

I have had some interesting arguments over the years because of analogies.
Most often with someone who has limited technical knowledge (clearly Dr
Slick doesnt fall into this category - his questions are pretty good) who
persists in clinging to an analogy by asking ever-more ridiculous "then why
doesnt it behave like this" type questions, the answer to which is usually
"because your analogy sucks"

The whole PLL system could do without the
1/s in the VCO gain if a FD (not PD) were used so that throws any
analogy out the door, anyway.

strictly speaking the 1/s MUST be "there" (otherwise it wouldnt be in the
transfer function) its just hiding inside the PD (and perhaps the loop
filter) even though we draw it in the VCO. He made me think about it though,
and probably asked a question that others have pondered

Furthermore, as much as there is to
worry about with PLL circuits, it should be sufficient to understand
the results obtainable from the loop equation. Once you have that,
you just factor out the characteristic equaion for that type of
system and the filter is yours. It's just a matter of selecting the
right components to put the poles and zeros where they belong.

Best Regards,
Mike

Once you learn enough, you realise that a damped 2nd order denominator
covers most real situations, and crude 1st order approximations (average
energy etc) are almost as good. I dont think it works so well without the
understanding though - most cookbooks dont give you much information on the
applicable ranges of their formulae, so you dont know when you are getting
into trouble.

 

[Active8]

On 22 Mar 2004 22:45:32 -0800, Dr. Slick wrote:

Active8 <reply2group@ndbbm.net> wrote in message news:<1797lt63fbt8k.dlg@news.individual.net>...
snip


And what if you DON'T use DC? What if you use a tuning sinewave
of a frequency that is close to the VCO's operating frequency?

Operate the loop outside of it's bandwidth? You'd have a modulator,
no? Or are you talking about just the VCO? I'd think you'd get a f'd
up envelope or a phase modulation.


how can you modulate outside of the loop bandwidth? The loop
will "correct" your modulation.

maybe i was standing on my head when i wrote that. Never bothered

thinking of modulating the VCO at a freq close to it's freq. Why
would you do that?

--
Best Regards,
Mike

 

[Active8]

On Tue, 23 Mar 2004 19:50:03 -0800, Terry Given wrote:

That was going to be part of my next reply. Slick is desperately
looking for an analogy between caps and VCOs. Like the spring and
the RLC tank. The analogy just isn't there. The 1/s is only the
result of the integral.

I have had some interesting arguments over the years because of analogies.
Most often with someone who has limited technical knowledge (clearly Dr
Slick doesnt fall into this category - his questions are pretty good) who
persists in clinging to an analogy by asking ever-more ridiculous "then why
doesnt it behave like this" type questions, the answer to which is usually
"because your analogy sucks"

The whole PLL system could do without the
1/s in the VCO gain if a FD (not PD) were used so that throws any
analogy out the door, anyway.

strictly speaking the 1/s MUST be "there" (otherwise it wouldnt be in the
transfer function)

it's there *because* of the use of a PD. You wouldn't need it with
an FD. I said, "FD (not PD)".

its just hiding inside the PD (and perhaps the loop
filter)

You *could* say it's hiding in the PD but the fact is, you need it
to convert VCO freq to phase because the PD needs a phase input to
compare to the ref phase. With an FD it's trivial to just get rid of
the 1/s and do the thing in freq. f_in, f_out, f_error. And if you
can't see that, download Dean's Book.

even though we draw it in the VCO. He made me think about it though,
and probably asked a question that others have pondered

There'd be less pondering if they'd just read Dean's Book. This
thread's been running 9 days. 9 days to cover one paragraph.

Furthermore, as much as there is to
worry about with PLL circuits, it should be sufficient to understand
the results obtainable from the loop equation. Once you have that,
you just factor out the characteristic equaion for that type of
system and the filter is yours. It's just a matter of selecting the
right components to put the poles and zeros where they belong.

Best Regards,
Mike

Once you learn enough, you realise that a damped 2nd order denominator
covers most real situations, and crude 1st order approximations (average
energy etc) are almost as good. I dont think it works so well without the
understanding though - most cookbooks dont give you much information on the
applicable ranges of their formulae, so you dont know when you are getting
into trouble.

That's why it's best to understand using the math in every detail.
Even as far as root-locus and Nyquist stability, AFAIC. And you have
to be able to understnd how to damp the thing for settling time and
all that.

On the plus side, for those who like to visualize stuff, the various
math CAD packages help. But you gotta know the math to use them. I
like it because even though every greenhorn and his uncle can get a
PIC to flash an LED, they won't get far with an analog control loop,
or even a PIC, without the math. State space, PID, whatever.

The crux of the application is the "C" of the "PIC". <-- that needs
help, maybe. maybe not.

--
Best Regards,
Mike