Guest
John_H wrote:
like hell about the power design, and the FAE could not get me an
answer, and the potential customer gave up. I got drilled about several
other items the data sheet could not answer either. That was a useful
exercise in learning that the info just isn't available.
I've tried to cool that. I'm also not going to back down and let them
ridicule me every thing they disagree without a cost to them. I'm just
a few years younger, have spent my life in other engineering areas, and
I do understand my business areas. There are some very clear
differences between our perspectives, which are not based on absolute
rights and wrongs, and would normally be matters to agree to disagree
on. If their intent is to destroy my credibility because I'm not an
insider, and I've a different view point they don't like ... then I
will reluctantly play that game as well until they get tired of being
burned too - or Xilinx management steps in and pulls the plug. If they
can act responsibly, so will I. But I will continue to push for things
that are needed for a pure reconfigurable computing market place, a
niche market that is growing, and they clearly have mixed interest in.
It was fully amusing to watch last week go from Austin and the other
poster say that RC and PR were money sinks and being dropped, and right
after I pressed to open source it, another Xilinx guy steps in and says
wait a year and they will finally get it fixed in the next major
release. That is still a tiled PR solution using PAR, which is just to
slow and requires far to my floor planning for my market. With Austin
asserting JBits is dead, that kills the alternate strategies of using
the backend tools from JHDL or JHDLBits into Jbits. Xilinx has very
mixed internal positions on that whole tool set. I had been told that I
would never be able to use JHDLBits, Then Austin pops in and trys to
change that. Then the next week is declaring JBits a failure and dead.
Then another source tells me Austin doesn't speak for the JBits team,
that the JBits isn't dead.
attacks in reponse were never justified. Frankly, based on a business
that stands behind Austin and Peter, I've considered not ever doing
business with Xilinx if that level of utter arrogance is to be
expected. I have about 4K Xilinx parts in my inventory that I can dump,
and never deal with the company again. Or, I can do as I've planned for
two years, and that is build a new company around reconfigurable
computing boards. I've pressed that the current ISE software model with
very poor place and route for compile, load and go operations just
doesn't fit that market. It was designed to do an excellent job at all
costs, not a very good job quickly. It's ability to handle dynamic
reconfiguration has been marginal and error prone. After talking with
several people that had gone down that path, the suggest was to roll my
own based on the jbits and JHDL code. The legal issues with that are
less than clear. Nor do the high ISE per seat license costs work
trying to sell FPGA's as a very fast computer accellerator.
That Xilinx is a bit thin skinned about criticism, and constructive
criticism, is a bit of an understatement from my perspective. I do
know that when my FAE can not provide worst case power numbers, and I'm
being pressed hard for them, there are problems. The customer had
already had the same discussion and lack of results from a prior
proposal and was WAY ahead of me. There are also problems when
customer interfaces are not trained to listen to the customers needs,
and instead jump in and argue why the customers are wrong. There is a
lot of truth that the customer understands their business, and it's the
vendors job to understand that the customer probably isn't just wrong
about their business needs. In tech land, that concept that the
customer is always right, needs some serious refinement. Sure customers
get it wrong, and need guidance, but they are generally very clueful
about what they need for their business.
In talking with others I've gotten similar mixed feelings about Altera,
but no first hand experience yet.
different perspectives. The problem in a nut shell is that RC isn't
taken seriously by Xilinx, as it's been a 15 year pipe dream. Their
tools and business model are for a different market place -- high
volume embedded. And there staff are used to telling customers how to
use Xilinx product, and have some serious problems when you step
outside the high volume embedded application areas. First of all, the
biggest sales get the support. And as we have clearly seen, niche
markets, get little and are quickly subjected to being dropped, to go
chase another large customer. Small customers either need a way to fit
in and pickup the crumbs, or go to the seven dwarfs as Austin puts it.
IE send the small customers to the small players.
Given this has been the status quo for some decade .... clearly things
are not likely to change without a shove from my perspective. I'm more
than willing to step up and push for change, rather than watch the
opportunities slip by. I don't think watching the chances slip by
another decade is the right choice. When it comes to Xilinx and RC,
either they need to embrace it, and clearly get behind it, or step
aside. Their indecison is hurting the market place seriously. Other
than a few ruffled feathers the last few weeks have been very useful in
airing differences in market requirements. The side emails I've gotten
have been supportive in general.
So I leave you with this challenge ... layout a road map that will
either effect the required changes, or get a clear decision from Xilinx
management they do not want to be a major player in the RC market -
firm decision inside 3-6 months.
I'm avocating being vocal, direct, and a bit of a squeeky wheel, as the
passive approach has created 15 years of indicision that we see even in
the last few weeks with radically different views from several
different Xilinx spokes persons. I'm willing to actively and intensely
engage Austin, Peter, and other Xilinx staff on all the related issues
to fully air the differences in opionion about the divergent needs of
the various markets. So far, the intense, and informative debate here
has actually been very useful to provoke discussion that would normally
just be ignored.
Austin and I differ on the impact that patent expirations will have,
but history clearly relates that the expiration of base patents in
other technology areas was followed by a rapid change in the guard as
off shore companies stepped in and took over the market globally
leafing the US market founders dino's. In the next four years all the
major patents that control XC2000, XC3000, and much of XC4000
technology expire ... which means off shore companies will be free to
market bigger and faster version of those product technologies. They
will not be Virtext-II Pro's or XC4V's, but they will be big, fast, and
cheap FPGAs. And five years after that, about a decade from now, the
landscape may well be very very different in who are market leaders.
Fairly major revenue choices, like the Zero Defect is Quality
perspective the prevents Xilinx from wringing maxium revenue from every
wafer are very strong indicators that Xilinx may not be nimble enough
to adapt to a comodity FPGA market place price pressures that will
force severe cuts in the margins they have held for years. The
layoffs, the market restructuring, sweeping changes in management teams
could easily send Xilinx to it's grave inside as little as a few years
- or leave it a minority low volume player for a long lingering death
or takeover/buyout target for the IP.
I can be vocal, and raise the issues. Or I can shut my trap and watch
engage the debate .... make up your mind .... and if the changes come
true as I suspect, at least everyone had their day to plan ahead and
not cry over the changes. Austin and Peter are likely to retire before
long, so it will not be their watch on duty if the market loss happens
..... but it will be their direction and attitudes that set the stage
for it.
Actually I had two large proposals out with one of them pressing meDid you declare their datasheets a piece of crap because
they don't provide what you believe to be "proper" power data?
like hell about the power design, and the FAE could not get me an
answer, and the potential customer gave up. I got drilled about several
other items the data sheet could not answer either. That was a useful
exercise in learning that the info just isn't available.
And when was that?Did you call their business methods a scam?
If Austin and Peter want to be confrontational .... it's their choice.Geeze, man - listen to yourself. Ask the FAEs that have been so helpful to
look at your threads and see if they'll side with you or try to help educate
you in the other aspects of Xilinx that are there to benefit the customer
base.
I've tried to cool that. I'm also not going to back down and let them
ridicule me every thing they disagree without a cost to them. I'm just
a few years younger, have spent my life in other engineering areas, and
I do understand my business areas. There are some very clear
differences between our perspectives, which are not based on absolute
rights and wrongs, and would normally be matters to agree to disagree
on. If their intent is to destroy my credibility because I'm not an
insider, and I've a different view point they don't like ... then I
will reluctantly play that game as well until they get tired of being
burned too - or Xilinx management steps in and pulls the plug. If they
can act responsibly, so will I. But I will continue to push for things
that are needed for a pure reconfigurable computing market place, a
niche market that is growing, and they clearly have mixed interest in.
It was fully amusing to watch last week go from Austin and the other
poster say that RC and PR were money sinks and being dropped, and right
after I pressed to open source it, another Xilinx guy steps in and says
wait a year and they will finally get it fixed in the next major
release. That is still a tiled PR solution using PAR, which is just to
slow and requires far to my floor planning for my market. With Austin
asserting JBits is dead, that kills the alternate strategies of using
the backend tools from JHDL or JHDLBits into Jbits. Xilinx has very
mixed internal positions on that whole tool set. I had been told that I
would never be able to use JHDLBits, Then Austin pops in and trys to
change that. Then the next week is declaring JBits a failure and dead.
Then another source tells me Austin doesn't speak for the JBits team,
that the JBits isn't dead.
That's a two way street. Yes I've pressed hard, but the personalThe written word is often a poor way to communicate for those who don't have
a solid understanding of professional interaction. Often all it takes is a
good conversation - face to face - to help the understanding come through.
If you're a customer in need and you ask for help from a respectable
company, you get courteous assistance. On this newsgroup you haven't been a
customer in need, you've been an agitator - specifically in this tired
thread you've been an underinformed "devil's advocate."
attacks in reponse were never justified. Frankly, based on a business
that stands behind Austin and Peter, I've considered not ever doing
business with Xilinx if that level of utter arrogance is to be
expected. I have about 4K Xilinx parts in my inventory that I can dump,
and never deal with the company again. Or, I can do as I've planned for
two years, and that is build a new company around reconfigurable
computing boards. I've pressed that the current ISE software model with
very poor place and route for compile, load and go operations just
doesn't fit that market. It was designed to do an excellent job at all
costs, not a very good job quickly. It's ability to handle dynamic
reconfiguration has been marginal and error prone. After talking with
several people that had gone down that path, the suggest was to roll my
own based on the jbits and JHDL code. The legal issues with that are
less than clear. Nor do the high ISE per seat license costs work
trying to sell FPGA's as a very fast computer accellerator.
That Xilinx is a bit thin skinned about criticism, and constructive
criticism, is a bit of an understatement from my perspective. I do
know that when my FAE can not provide worst case power numbers, and I'm
being pressed hard for them, there are problems. The customer had
already had the same discussion and lack of results from a prior
proposal and was WAY ahead of me. There are also problems when
customer interfaces are not trained to listen to the customers needs,
and instead jump in and argue why the customers are wrong. There is a
lot of truth that the customer understands their business, and it's the
vendors job to understand that the customer probably isn't just wrong
about their business needs. In tech land, that concept that the
customer is always right, needs some serious refinement. Sure customers
get it wrong, and need guidance, but they are generally very clueful
about what they need for their business.
In talking with others I've gotten similar mixed feelings about Altera,
but no first hand experience yet.
I've actually interacted with a fair number of people with radicallyYou help noone.
different perspectives. The problem in a nut shell is that RC isn't
taken seriously by Xilinx, as it's been a 15 year pipe dream. Their
tools and business model are for a different market place -- high
volume embedded. And there staff are used to telling customers how to
use Xilinx product, and have some serious problems when you step
outside the high volume embedded application areas. First of all, the
biggest sales get the support. And as we have clearly seen, niche
markets, get little and are quickly subjected to being dropped, to go
chase another large customer. Small customers either need a way to fit
in and pickup the crumbs, or go to the seven dwarfs as Austin puts it.
IE send the small customers to the small players.
Given this has been the status quo for some decade .... clearly things
are not likely to change without a shove from my perspective. I'm more
than willing to step up and push for change, rather than watch the
opportunities slip by. I don't think watching the chances slip by
another decade is the right choice. When it comes to Xilinx and RC,
either they need to embrace it, and clearly get behind it, or step
aside. Their indecison is hurting the market place seriously. Other
than a few ruffled feathers the last few weeks have been very useful in
airing differences in market requirements. The side emails I've gotten
have been supportive in general.
So I leave you with this challenge ... layout a road map that will
either effect the required changes, or get a clear decision from Xilinx
management they do not want to be a major player in the RC market -
firm decision inside 3-6 months.
I'm avocating being vocal, direct, and a bit of a squeeky wheel, as the
passive approach has created 15 years of indicision that we see even in
the last few weeks with radically different views from several
different Xilinx spokes persons. I'm willing to actively and intensely
engage Austin, Peter, and other Xilinx staff on all the related issues
to fully air the differences in opionion about the divergent needs of
the various markets. So far, the intense, and informative debate here
has actually been very useful to provoke discussion that would normally
just be ignored.
Austin and I differ on the impact that patent expirations will have,
but history clearly relates that the expiration of base patents in
other technology areas was followed by a rapid change in the guard as
off shore companies stepped in and took over the market globally
leafing the US market founders dino's. In the next four years all the
major patents that control XC2000, XC3000, and much of XC4000
technology expire ... which means off shore companies will be free to
market bigger and faster version of those product technologies. They
will not be Virtext-II Pro's or XC4V's, but they will be big, fast, and
cheap FPGAs. And five years after that, about a decade from now, the
landscape may well be very very different in who are market leaders.
Fairly major revenue choices, like the Zero Defect is Quality
perspective the prevents Xilinx from wringing maxium revenue from every
wafer are very strong indicators that Xilinx may not be nimble enough
to adapt to a comodity FPGA market place price pressures that will
force severe cuts in the margins they have held for years. The
layoffs, the market restructuring, sweeping changes in management teams
could easily send Xilinx to it's grave inside as little as a few years
- or leave it a minority low volume player for a long lingering death
or takeover/buyout target for the IP.
I can be vocal, and raise the issues. Or I can shut my trap and watch
engage the debate .... make up your mind .... and if the changes come
true as I suspect, at least everyone had their day to plan ahead and
not cry over the changes. Austin and Peter are likely to retire before
long, so it will not be their watch on duty if the market loss happens
..... but it will be their direction and attitudes that set the stage
for it.