Dividing a 32768 Hz crystal frequency...

tirsdag den 27. juni 2023 kl. 14.58.13 UTC+2 skrev Ricky:
On Tuesday, June 27, 2023 at 5:17:21 AM UTC-4, John Woodgate wrote:
On Tuesday, June 27, 2023 at 8:15:58 AM UTC+1, Martin Brown wrote:
On 26/06/2023 23:54, John Woodgate wrote:
On Monday, June 26, 2023 at 11:39:14 PM UTC+1, Phil Hobbs wrote:
Phil Hobbs <pcdhSpamM...@electrooptical.net> wrote:
John Woodgate <jmw2...@gmail.com> wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a
stable frequency for a component bridge. I could use a 4017 and
half a a 4013 (sorry about these ancient devices, but they are
still good for some things), but I would have to add something
to make the crystal oscillate unless there is a way to use the
other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the
oscillator, but I can\'t see how to make it divide by 20. I know
there is a technique that combines some of the output signals
via an EXOR to achieve divisors that are not powers of 2, but I
can\'t find information on which signals to combine.


Hey, John,

Nice to see you back on SED, man! An HC40103 will do it, if you
don’t mind a 5% duty cycle.

Plus a 74HC1G04 or something for the oscillator. Cheers

Thanks, Phil. I left SED when it turned into a political forum. I
will certainly look at 40103, but the duty cycle is a problem. I want
to filter the output to make a sine wave with not too much
distortion. I don\'t seem to be able to reply to this group by email..
Depending on how much is not much then for a spot frequency integrating
it once and diode shaping followed by a filter will get all the higher
harmonics well down. HP patent on this trick is long out of date.

I\'m curious - what is special about 1591.55 Hz ?

To do that you actually want to divide 32768 by (almost)
20.6 which gets 1590.68 or easier 20.5 which gets 1598.44

20 21 alternately and then combine with the original clock signal to get
20.5 20.5 equal mark space ratio at your chosen frequency.

20 21 20 21 20 would get your 20.6 but with terrible phase noise and
harmonic content that might well be more problematic to eliminate.
Is that the way it is set up?
More likely how your news client is set up.
Thunderbird has \"Reply\" (to author) as one of its buttons.

Updates sometimes promote it to being the default action too!

--
Martin Brown
Thanks, Martin and all the others who have given helpful advice --- too many to reply individually. The project is tutorial in nature, so I don\'t want to use too many \'integrated\' fixes, and SMD-only devices are not an option. Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency, which needs to be stable within ±1% and not require a counter to determine it.

I will try \'Reply to list\' instead of \'Reply\' to see if that works.
Why the requirement to not use a counter??? I don\'t know what that means in this context, since you are proposing on using a counter. Can you explain?

\"not require a counter to determine it\" I would assume that means it needs to be on frequency as build so you don\'t a frequency counter to verify and adjust it
 
On Tuesday, June 27, 2023 at 12:57:13 PM UTC+1, Phil Allison wrote:
John Woodgate wrote:

-----------------------------------------

The project is tutorial in nature, so I don\'t want to use too many \'integrated\' fixes, and SMD-only devices are not an option.
Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency,
which needs to be stable within ±1% and not require a counter to determine it.

** OK - we finally have an actual \" spec\" for your 1591 Hz sine wave oscillator.

This simple topology will do the job very easily:

https://sound-au.com/project86.htm

The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v.
Quad op-amps like the TL064 or TL074 are perfect - so are many other duals.

THD is about 0.15% and frequency can be trimmed by adjusting one or both RT values as shown in fig 2.
Amplitude stability depends only on the tempco of the 4 diodes.

Essentially it is my design and many hundreds have been built.
Way better than a Wein bridge topology since there\'s no need for ( now unobtainable) thermistors, tiny lamps or fussy FETs.


.... Phil
Looks very good, but too complicated for my project.
 
On Tuesday, June 27, 2023 at 2:15:00 PM UTC+1, Lasse Langwadt Christensen wrote:
tirsdag den 27. juni 2023 kl. 14.58.13 UTC+2 skrev Ricky:
On Tuesday, June 27, 2023 at 5:17:21 AM UTC-4, John Woodgate wrote:
On Tuesday, June 27, 2023 at 8:15:58 AM UTC+1, Martin Brown wrote:
On 26/06/2023 23:54, John Woodgate wrote:
On Monday, June 26, 2023 at 11:39:14 PM UTC+1, Phil Hobbs wrote:
Phil Hobbs <pcdhSpamM...@electrooptical.net> wrote:
John Woodgate <jmw2...@gmail.com> wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a
stable frequency for a component bridge. I could use a 4017 and
half a a 4013 (sorry about these ancient devices, but they are
still good for some things), but I would have to add something
to make the crystal oscillate unless there is a way to use the
other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the
oscillator, but I can\'t see how to make it divide by 20. I know
there is a technique that combines some of the output signals
via an EXOR to achieve divisors that are not powers of 2, but I
can\'t find information on which signals to combine.


Hey, John,

Nice to see you back on SED, man! An HC40103 will do it, if you
don’t mind a 5% duty cycle.

Plus a 74HC1G04 or something for the oscillator. Cheers

Thanks, Phil. I left SED when it turned into a political forum. I
will certainly look at 40103, but the duty cycle is a problem. I want
to filter the output to make a sine wave with not too much
distortion. I don\'t seem to be able to reply to this group by email.
Depending on how much is not much then for a spot frequency integrating
it once and diode shaping followed by a filter will get all the higher
harmonics well down. HP patent on this trick is long out of date.

I\'m curious - what is special about 1591.55 Hz ?

To do that you actually want to divide 32768 by (almost)
20.6 which gets 1590.68 or easier 20.5 which gets 1598.44

20 21 alternately and then combine with the original clock signal to get
20.5 20.5 equal mark space ratio at your chosen frequency.

20 21 20 21 20 would get your 20.6 but with terrible phase noise and
harmonic content that might well be more problematic to eliminate.
Is that the way it is set up?
More likely how your news client is set up.
Thunderbird has \"Reply\" (to author) as one of its buttons.

Updates sometimes promote it to being the default action too!

--
Martin Brown
Thanks, Martin and all the others who have given helpful advice --- too many to reply individually. The project is tutorial in nature, so I don\'t want to use too many \'integrated\' fixes, and SMD-only devices are not an option. Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency, which needs to be stable within ±1% and not require a counter to determine it.

I will try \'Reply to list\' instead of \'Reply\' to see if that works.
Why the requirement to not use a counter??? I don\'t know what that means in this context, since you are proposing on using a counter. Can you explain?

\"not require a counter to determine it\" I would assume that means it needs to be on frequency as build so you don\'t a frequency counter to verify and adjust it
Yes, correct.
 
On Tuesday, June 27, 2023 at 12:11:48 PM UTC+1, Phil Hobbs wrote:
John Woodgate <jmw2...@gmail.com> wrote:
On Tuesday, June 27, 2023 at 8:15:58 AM UTC+1, Martin Brown wrote:
On 26/06/2023 23:54, John Woodgate wrote:
On Monday, June 26, 2023 at 11:39:14 PM UTC+1, Phil Hobbs wrote:
Phil Hobbs <pcdhSpamM...@electrooptical.net> wrote:
John Woodgate <jmw2...@gmail.com> wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a
stable frequency for a component bridge. I could use a 4017 and
half a a 4013 (sorry about these ancient devices, but they are
still good for some things), but I would have to add something
to make the crystal oscillate unless there is a way to use the
other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the
oscillator, but I can\'t see how to make it divide by 20. I know
there is a technique that combines some of the output signals
via an EXOR to achieve divisors that are not powers of 2, but I
can\'t find information on which signals to combine.


Hey, John,

Nice to see you back on SED, man! An HC40103 will do it, if you
don’t mind a 5% duty cycle.

Plus a 74HC1G04 or something for the oscillator. Cheers

Thanks, Phil. I left SED when it turned into a political forum. I
will certainly look at 40103, but the duty cycle is a problem. I want
to filter the output to make a sine wave with not too much
distortion. I don\'t seem to be able to reply to this group by email.
Depending on how much is not much then for a spot frequency integrating
it once and diode shaping followed by a filter will get all the higher
harmonics well down. HP patent on this trick is long out of date.

I\'m curious - what is special about 1591.55 Hz ?

To do that you actually want to divide 32768 by (almost)
20.6 which gets 1590.68 or easier 20.5 which gets 1598.44

20 21 alternately and then combine with the original clock signal to get
20.5 20.5 equal mark space ratio at your chosen frequency.

20 21 20 21 20 would get your 20.6 but with terrible phase noise and
harmonic content that might well be more problematic to eliminate.
Is that the way it is set up?
More likely how your news client is set up.
Thunderbird has \"Reply\" (to author) as one of its buttons.

Updates sometimes promote it to being the default action too!

--
Martin Brown
Thanks, Martin and all the others who have given helpful advice --- too
many to reply individually. The project is tutorial in nature, so I
don\'t want to use too many \'integrated\' fixes, and SMD-only devices are
not an option. Regarding the frequency, it does need to be near 10k/2pi,
but other things can be adjusted to suit the exact frequency, which needs
to be stable within ±1% and not require a counter to determine it.

I will try \'Reply to list\' instead of \'Reply\' to see if that works.

Some years ago, we had a George Herold thread on making sine waves. The
eventual solution was a 4017 with resistors forming a weighted sum of the
outputs. This cancels the second through ninth harmonics, making filtering
much easier.
Cheers

Phil Hobbs

--
Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC /
Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics
Is ther any way of retrieving that interesting information?
 
On Tuesday, June 27, 2023 at 9:25:00 AM UTC-4, John Woodgate wrote:
On Tuesday, June 27, 2023 at 2:15:00 PM UTC+1, Lasse Langwadt Christensen wrote:
tirsdag den 27. juni 2023 kl. 14.58.13 UTC+2 skrev Ricky:
On Tuesday, June 27, 2023 at 5:17:21 AM UTC-4, John Woodgate wrote:
On Tuesday, June 27, 2023 at 8:15:58 AM UTC+1, Martin Brown wrote:
On 26/06/2023 23:54, John Woodgate wrote:
On Monday, June 26, 2023 at 11:39:14 PM UTC+1, Phil Hobbs wrote:
Phil Hobbs <pcdhSpamM...@electrooptical.net> wrote:
John Woodgate <jmw2...@gmail.com> wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a
stable frequency for a component bridge. I could use a 4017 and
half a a 4013 (sorry about these ancient devices, but they are
still good for some things), but I would have to add something
to make the crystal oscillate unless there is a way to use the
other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the
oscillator, but I can\'t see how to make it divide by 20. I know
there is a technique that combines some of the output signals
via an EXOR to achieve divisors that are not powers of 2, but I
can\'t find information on which signals to combine.


Hey, John,

Nice to see you back on SED, man! An HC40103 will do it, if you
don’t mind a 5% duty cycle.

Plus a 74HC1G04 or something for the oscillator. Cheers

Thanks, Phil. I left SED when it turned into a political forum. I
will certainly look at 40103, but the duty cycle is a problem. I want
to filter the output to make a sine wave with not too much
distortion. I don\'t seem to be able to reply to this group by email.
Depending on how much is not much then for a spot frequency integrating
it once and diode shaping followed by a filter will get all the higher
harmonics well down. HP patent on this trick is long out of date.

I\'m curious - what is special about 1591.55 Hz ?

To do that you actually want to divide 32768 by (almost)
20.6 which gets 1590.68 or easier 20.5 which gets 1598.44

20 21 alternately and then combine with the original clock signal to get
20.5 20.5 equal mark space ratio at your chosen frequency.

20 21 20 21 20 would get your 20.6 but with terrible phase noise and
harmonic content that might well be more problematic to eliminate..
Is that the way it is set up?
More likely how your news client is set up.
Thunderbird has \"Reply\" (to author) as one of its buttons.

Updates sometimes promote it to being the default action too!

--
Martin Brown
Thanks, Martin and all the others who have given helpful advice --- too many to reply individually. The project is tutorial in nature, so I don\'t want to use too many \'integrated\' fixes, and SMD-only devices are not an option. Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency, which needs to be stable within ±1% and not require a counter to determine it.

I will try \'Reply to list\' instead of \'Reply\' to see if that works.
Why the requirement to not use a counter??? I don\'t know what that means in this context, since you are proposing on using a counter. Can you explain?

\"not require a counter to determine it\" I would assume that means it needs to be on frequency as build so you don\'t a frequency counter to verify and adjust it
Yes, correct.

So, you are saying no oscillators tuned by an RC, for example. Ok, that\'s not hard. What you are talking about, using a crystal and a divider should work.

This thread is very long at this point. What are the problems? You seem to reject a lot of solutions because they are too complex. I don\'t know what to recommend at this point. You seem to be looking for a Goldilocks solution. Maybe you could summarize the solutions that come closest at the moment?

--

Rick C.

++ Get 1,000 miles of free Supercharging
++ Tesla referral code - https://ts.la/richard11209
 
On Tuesday, June 27, 2023 at 2:56:18 PM UTC+1, Ricky wrote:
On Tuesday, June 27, 2023 at 9:25:00 AM UTC-4, John Woodgate wrote:
On Tuesday, June 27, 2023 at 2:15:00 PM UTC+1, Lasse Langwadt Christensen wrote:
tirsdag den 27. juni 2023 kl. 14.58.13 UTC+2 skrev Ricky:
On Tuesday, June 27, 2023 at 5:17:21 AM UTC-4, John Woodgate wrote:
On Tuesday, June 27, 2023 at 8:15:58 AM UTC+1, Martin Brown wrote:
On 26/06/2023 23:54, John Woodgate wrote:
On Monday, June 26, 2023 at 11:39:14 PM UTC+1, Phil Hobbs wrote:
Phil Hobbs <pcdhSpamM...@electrooptical.net> wrote:
John Woodgate <jmw2...@gmail.com> wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a
stable frequency for a component bridge. I could use a 4017 and
half a a 4013 (sorry about these ancient devices, but they are
still good for some things), but I would have to add something
to make the crystal oscillate unless there is a way to use the
other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the
oscillator, but I can\'t see how to make it divide by 20. I know
there is a technique that combines some of the output signals
via an EXOR to achieve divisors that are not powers of 2, but I
can\'t find information on which signals to combine.


Hey, John,

Nice to see you back on SED, man! An HC40103 will do it, if you
don’t mind a 5% duty cycle.

Plus a 74HC1G04 or something for the oscillator. Cheers

Thanks, Phil. I left SED when it turned into a political forum. I
will certainly look at 40103, but the duty cycle is a problem.. I want
to filter the output to make a sine wave with not too much
distortion. I don\'t seem to be able to reply to this group by email.
Depending on how much is not much then for a spot frequency integrating
it once and diode shaping followed by a filter will get all the higher
harmonics well down. HP patent on this trick is long out of date.

I\'m curious - what is special about 1591.55 Hz ?

To do that you actually want to divide 32768 by (almost)
20.6 which gets 1590.68 or easier 20.5 which gets 1598.44

20 21 alternately and then combine with the original clock signal to get
20.5 20.5 equal mark space ratio at your chosen frequency.

20 21 20 21 20 would get your 20.6 but with terrible phase noise and
harmonic content that might well be more problematic to eliminate.
Is that the way it is set up?
More likely how your news client is set up.
Thunderbird has \"Reply\" (to author) as one of its buttons.

Updates sometimes promote it to being the default action too!

--
Martin Brown
Thanks, Martin and all the others who have given helpful advice --- too many to reply individually. The project is tutorial in nature, so I don\'t want to use too many \'integrated\' fixes, and SMD-only devices are not an option. Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency, which needs to be stable within ±1% and not require a counter to determine it.

I will try \'Reply to list\' instead of \'Reply\' to see if that works.
Why the requirement to not use a counter??? I don\'t know what that means in this context, since you are proposing on using a counter. Can you explain?

\"not require a counter to determine it\" I would assume that means it needs to be on frequency as build so you don\'t a frequency counter to verify and adjust it
Yes, correct.
So, you are saying no oscillators tuned by an RC, for example. Ok, that\'s not hard. What you are talking about, using a crystal and a divider should work.

This thread is very long at this point. What are the problems? You seem to reject a lot of solutions because they are too complex. I don\'t know what to recommend at this point. You seem to be looking for a Goldilocks solution. Maybe you could summarize the solutions that come closest at the moment?

--

Rick C.

++ Get 1,000 miles of free Supercharging
++ Tesla referral code - https://ts.la/richard11209
Yes, the thread is very (too) long, but you guys keep adding ingenious solutions. I can\'t say too much about the project, but there are restrictions on what I can use: most of it has to be my own work, so I can\'t use published solutions without profound changes. Thanks for supporting my original proposal. I will try it with one half of the 4013 for the oscillator.

I really don\'t want any more help, with thanks to all who have tried. Many of teh suggestions open up other streams of thought.
 
On 27/06/2023 14:26, John Woodgate wrote:
On Tuesday, June 27, 2023 at 12:11:48 PM UTC+1, Phil Hobbs wrote:

Some years ago, we had a George Herold thread on making sine waves. The
eventual solution was a 4017 with resistors forming a weighted sum of the
outputs. This cancels the second through ninth harmonics, making filtering
much easier.

It might be this thread which I vaguely recall also in AoE.

https://groups.google.com/g/sci.electronics.design/c/RDRNCUjjI08/m/YH038ruKNAIJ

--
Martin Brown
 
On a sunny day (Tue, 27 Jun 2023 05:55:52 -0700 (PDT)) it happened Ricky
<gnuarm.deletethisbit@gmail.com> wrote in
<faefd626-0e9d-4ed4-8901-29fd44b77014n@googlegroups.com>:

On Tuesday, June 27, 2023 at 6:00:27 AM UTC-4, Jan Panteltje wrote:
On a sunny day (Mon, 26 Jun 2023 23:20:14 -0700 (PDT)) it happened Ricky=

gnuarm.del...@gmail.com> wrote in
c49794d7-262f-4006...@googlegroups.com>:
On Tuesday, June 27, 2023 at 1:38:44 AM UTC-4, Jan Panteltje wro=
te:
On a sunny day (Tue, 27 Jun 2023 01:20:59 -0000 (UTC)) it happened Mik=
e M=
onett
VE3BTI <spa...@not.com> wrote in <XnsB02FD9304A...@135.181.20.170>:
John Woodgate <jmw2...@gmail.com> wrote:

I want to divide a 32768 Hz crystal frequency by 20 to get a stable
frequency for a component bridge. I could use a 4017 and half a a 4=
013=

(sorry about these ancient devices, but they are still good for som=
e=

things), but I would have to add something to make the crystal osci=
lla=
te
unless there is a way to use the other half of the 4013 to make the=

oscillator.

I also looked at using just a 4096, which gives me the oscillator, =
but=
I
can\'t see how to make it divide by 20. I know there is a technique =
tha=
t
combines some of the output signals via an EXOR to achieve divisors=
th=
at
are not powers of 2, but I can\'t find information on which signals =
to=

combine.

Tom Van Baak, moderator of the Time-Nuts group, posted an article yea=
rs =
sgo
on using a PIC to count down from 2 to 255. It had very low jitter. H=
e=

measured the jitter in the picosecond range.

The device he used was extremely cheap, and is not the same as the PI=
C=

microcrollers, which could never give picosecond timimg. I believe it=
ha=
d
only 4 pins.

I emailed him and asked for more information.

I will post when he replies.
Here is a Microchip PIC frequency counter:
https://panteltje.nl/panteltje/pic/freq_pic/
coded by somebody else, just modified it for RS232 output as I had no =
suitable LCD,
and put it in a RS232 connector housing.
Modify it for any output? just use a preloaded downcounter?

I believe I would add some input protection. Is that not a problem for y=
ou=
?

Well, 100 pF does not form a low impedance for slow things like mains.
PIC datasheet specifies a clamp-current for the input pins;
Clamp current, IK (VPIN < 0 or VPIN > VDD) ± 20 mA
So now you can calculate how much and how fast an input voltage change yo=
u need with 100 pF for destruction.
Ask Martin?
Its still working AFAIK after so many years.
But I do not work with pico seconds rise time kilovolts.
Mostly use higher frequencies and spectrum analyzers based on RTL_SDR sti=
cks, accuracy 1ppm and more info:
http://panteltje.nl/pub/spectrum_analyzer_IX_IMG_0699.JPG
http://panteltje.nl/pub/radar10_135000000_versus_1374576000_MHz.mpeg

You can make it as complicated and precise as you want:
https://panteltje.nl/pub/FPGA_board_with_25MHz_VCXO_locked_to_rubidium_10=
MHz_reference_IMG_3724.GIF
https://panteltje.nl/pub/GPS_L1_locked_to_rubidium_reference_test_setup_I=
MG_3733.GIF
was that not from my artificial GPS sattelite Mr Bond?

Does this help?

What\'s the rise time of touching some voltage rail? I don\'t see even a re=
sistor, to allow the capacitor to form an RC circuit, so I suppose this is =
depending on the parasitic diodes to prevent damage. That\'s my point. The=
re\'s nothing to limit the current through the diodes, including your nonsen=
se about kilovolt, ps rise time signals.

You suck, show somehing YOU designed that actually works or publish the code.
You do not even understand basic equipment
Not a microwave and not a current path.

Babbler
Same as Don Y
Try to read.

:)
 
On a sunny day (Tue, 27 Jun 2023 04:57:09 -0700 (PDT)) it happened Phil
Allison <pallison49@gmail.com> wrote in
<16392362-2a39-4ed1-b591-6c269210ada6n@googlegroups.com>:

John Woodgate wrote:

-----------------------------------------

The project is tutorial in nature, so I don\'t want to use too many \'integ=
rated\' fixes, and SMD-only devices are not an option.
Regarding the frequency, it does need to be near 10k/2pi, but other thing=
s can be adjusted to suit the exact frequency,
which needs to be stable within ±1% and not require a counter to det=
ermine it.


** OK - we finally have an actual \" spec\" for your 1591 Hz sine wave oscil=
lator.

This simple topology will do the job very easily:

https://sound-au.com/project86.htm

The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v.
Quad op-amps like the TL064 or TL074 are perfect - so are many other duals.

THD is about 0.15% and frequency can be trimmed by adjusting one or both RT=
values as shown in fig 2.
Amplitude stability depends only on the tempco of the 4 diodes.

Essentially it is my design and many hundreds have been built.
Way better than a Wein bridge topology since there\'s no need for ( now unob=
tainable) thermistors, tiny lamps or fussy FETs.


.... Phil

It is nice, but these days I just use my laptop or Raspberry Pi with \'sox\' as signal generator:
https://www.audiosciencereview.com/forum/index.php?threads/howto-sox-audio-tool-as-a-signal-generator.4242/
 
On Tue, 27 Jun 2023 06:24:10 -0700 (PDT), John Woodgate
<jmw28563@gmail.com> wrote:

On Tuesday, June 27, 2023 at 12:57:13?PM UTC+1, Phil Allison wrote:
John Woodgate wrote:

-----------------------------------------

The project is tutorial in nature, so I don\'t want to use too many \'integrated\' fixes, and SMD-only devices are not an option.
Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency,
which needs to be stable within ±1% and not require a counter to determine it.

** OK - we finally have an actual \" spec\" for your 1591 Hz sine wave oscillator.

This simple topology will do the job very easily:

https://sound-au.com/project86.htm

The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v.
Quad op-amps like the TL064 or TL074 are perfect - so are many other duals.

THD is about 0.15% and frequency can be trimmed by adjusting one or both RT values as shown in fig 2.
Amplitude stability depends only on the tempco of the 4 diodes.

Essentially it is my design and many hundreds have been built.
Way better than a Wein bridge topology since there\'s no need for ( now unobtainable) thermistors, tiny lamps or fussy FETs.


.... Phil
Looks very good, but too complicated for my project.

It\'s no big deal to lowpass a square wave into a pretty good sine.
It\'s fun to Spice things like that, fiddle until it works.

Don\'t start with a 2nd order Sallen-Key! 3rd is OK. LC is nicely
retro.

Given a binary counter and a hacked resistor DAC, I guess you can\'t
reduce the 3rd harmonic, the big one.
 
On Monday, June 26, 2023 at 10:20:48 AM UTC-4, John Woodgate wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a stable frequency for a component bridge. I could use a 4017 and half a a 4013 (sorry about these ancient devices, but they are still good for some things), but I would have to add something to make the crystal oscillate unless there is a way to use the other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the oscillator, but I can\'t see how to make it divide by 20. I know there is a technique that combines some of the output signals via an EXOR to achieve divisors that are not powers of 2, but I can\'t find information on which signals to combine.

20= 2 x 2 x 5.

There are plenty divide by 5 circuits from the BCD days.

There are handful of quad D-FFs in the 4000 series that economize on parts a little bit- much more flexibility using HC.

A generic diagram here:

https://pages.mtu.edu/~suits/electronics/Divide_by_3&5_circuit.html

The remaining 2 x 2 is kinda self-evident.

You can make the oscillator out of anything. Most circuit examples are logic inverter Pierce oscillators with a series resistance between the inverter output and crystal feedback branch. You just need to keep the crystal dissipation in the microwatt range at resonance using that resistance. The parameter should be on the crystal datasheet.
 
On Tuesday, June 27, 2023 at 4:08:05 PM UTC+1, Martin Brown wrote:
On 27/06/2023 14:26, John Woodgate wrote:
On Tuesday, June 27, 2023 at 12:11:48 PM UTC+1, Phil Hobbs wrote:

Some years ago, we had a George Herold thread on making sine waves. The
eventual solution was a 4017 with resistors forming a weighted sum of the
outputs. This cancels the second through ninth harmonics, making filtering
much easier.
It might be this thread which I vaguely recall also in AoE.

https://groups.google.com/g/sci.electronics.design/c/RDRNCUjjI08/m/YH038ruKNAIJ

--
Martin Brown
Thanks, but the head of the thread is missing and I can\'t guess what went before.
 
On Tuesday, June 27, 2023 at 5:23:41 PM UTC+1, Fred Bloggs wrote:
On Monday, June 26, 2023 at 10:20:48 AM UTC-4, John Woodgate wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a stable frequency for a component bridge. I could use a 4017 and half a a 4013 (sorry about these ancient devices, but they are still good for some things), but I would have to add something to make the crystal oscillate unless there is a way to use the other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the oscillator, but I can\'t see how to make it divide by 20. I know there is a technique that combines some of the output signals via an EXOR to achieve divisors that are not powers of 2, but I can\'t find information on which signals to combine.

20= 2 x 2 x 5.

There are plenty divide by 5 circuits from the BCD days.

There are handful of quad D-FFs in the 4000 series that economize on parts a little bit- much more flexibility using HC.

A generic diagram here:

https://pages.mtu.edu/~suits/electronics/Divide_by_3&5_circuit.html

The remaining 2 x 2 is kinda self-evident.

You can make the oscillator out of anything. Most circuit examples are logic inverter Pierce oscillators with a series resistance between the inverter output and crystal feedback branch. You just need to keep the crystal dissipation in the microwatt range at resonance using that resistance. The parameter should be on the crystal datasheet.
Thank you.
I will not continue this thread, with thanks to all.
 
tirsdag den 27. juni 2023 kl. 18.20.00 UTC+2 skrev John Larkin:
On Tue, 27 Jun 2023 06:24:10 -0700 (PDT), John Woodgate
jmw2...@gmail.com> wrote:
On Tuesday, June 27, 2023 at 12:57:13?PM UTC+1, Phil Allison wrote:
John Woodgate wrote:

-----------------------------------------

The project is tutorial in nature, so I don\'t want to use too many \'integrated\' fixes, and SMD-only devices are not an option.
Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency,
which needs to be stable within ą1% and not require a counter to determine it.

** OK - we finally have an actual \" spec\" for your 1591 Hz sine wave oscillator.

This simple topology will do the job very easily:

https://sound-au.com/project86.htm

The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v.
Quad op-amps like the TL064 or TL074 are perfect - so are many other duals.

THD is about 0.15% and frequency can be trimmed by adjusting one or both RT values as shown in fig 2.
Amplitude stability depends only on the tempco of the 4 diodes.

Essentially it is my design and many hundreds have been built.
Way better than a Wein bridge topology since there\'s no need for ( now unobtainable) thermistors, tiny lamps or fussy FETs.


.... Phil
Looks very good, but too complicated for my project.
It\'s no big deal to lowpass a square wave into a pretty good sine.
It\'s fun to Spice things like that, fiddle until it works.

Don\'t start with a 2nd order Sallen-Key! 3rd is OK. LC is nicely
retro.

Given a binary counter and a hacked resistor DAC, I guess you can\'t
reduce the 3rd harmonic, the big one.

six steps can be ok
https://imgur.com/a/cQJu9qg
 
On Tue, 27 Jun 2023 15:35:01 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

tirsdag den 27. juni 2023 kl. 18.20.00 UTC+2 skrev John Larkin:
On Tue, 27 Jun 2023 06:24:10 -0700 (PDT), John Woodgate
jmw2...@gmail.com> wrote:
On Tuesday, June 27, 2023 at 12:57:13?PM UTC+1, Phil Allison wrote:
John Woodgate wrote:

-----------------------------------------

The project is tutorial in nature, so I don\'t want to use too many \'integrated\' fixes, and SMD-only devices are not an option.
Regarding the frequency, it does need to be near 10k/2pi, but other things can be adjusted to suit the exact frequency,
which needs to be stable within ?1% and not require a counter to determine it.

** OK - we finally have an actual \" spec\" for your 1591 Hz sine wave oscillator.

This simple topology will do the job very easily:

https://sound-au.com/project86.htm

The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v.
Quad op-amps like the TL064 or TL074 are perfect - so are many other duals.

THD is about 0.15% and frequency can be trimmed by adjusting one or both RT values as shown in fig 2.
Amplitude stability depends only on the tempco of the 4 diodes.

Essentially it is my design and many hundreds have been built.
Way better than a Wein bridge topology since there\'s no need for ( now unobtainable) thermistors, tiny lamps or fussy FETs.


.... Phil
Looks very good, but too complicated for my project.
It\'s no big deal to lowpass a square wave into a pretty good sine.
It\'s fun to Spice things like that, fiddle until it works.

Don\'t start with a 2nd order Sallen-Key! 3rd is OK. LC is nicely
retro.

Given a binary counter and a hacked resistor DAC, I guess you can\'t
reduce the 3rd harmonic, the big one.

six steps can be ok
https://imgur.com/a/cQJu9qg

Consider a binary counter. The MSB is a square wave of freqency F,
with third harmonic 3F.

The next bit is 2F with harmonic 6F.

I can\'t see how any linear-weighted combination of counter bits can
cancel the 3F line.
 
John Woodgate wrote:
-----------------------------------
Phil Allison wrote:
John Woodgate wrote:
** OK - we finally have an actual \" spec\" for your 1591 Hz sine wave oscillator.

This simple topology will do the job very easily:

https://sound-au.com/project86.htm

The DC supply can be to 9v as shown, or +/- 5V or up to +/- 15 v.
Quad op-amps like the TL064 or TL074 are perfect - so are many other duals.

THD is about 0.15% and frequency can be trimmed by adjusting one or both RT values as shown in fig 2.
Amplitude stability depends only on the tempco of the 4 diodes.

Essentially it is my design and many hundreds have been built.
Way better than a Wein bridge topology since there\'s no need for ( now unobtainable) thermistors, tiny lamps or fussy FETs.


.... Phil
Looks very good, but too complicated for my project.

** Huh ??

Just to be clear, for a fixed frequency output you only need to build the schematic shown in fig 2.
RT and C values of 10k and 10nF to give 1591 Hz.




....... Phil
 
On Wednesday, June 28, 2023 at 9:34:24 AM UTC+10, John Larkin wrote:
On Tue, 27 Jun 2023 15:35:01 -0700 (PDT), Lasse Langwadt Christensen <lang...@fonz.dk> wrote:
tirsdag den 27. juni 2023 kl. 18.20.00 UTC+2 skrev John Larkin:
On Tue, 27 Jun 2023 06:24:10 -0700 (PDT), John Woodgate <jmw2...@gmail.com> wrote:
On Tuesday, June 27, 2023 at 12:57:13?PM UTC+1, Phil Allison wrote:
John Woodgate wrote:

It\'s no big deal to lowpass a square wave into a pretty good sine.

It\'s even easier to low pass a \"modified sine wave\"
-- --
- - - - -
-- --
which you can get by switching between three voltages. The great virtue is that if the timing and the voltage are exactly right tghe thirtd harmonic contnet s exactl

It\'s fun to Spice things like that, fiddle until it works.

Don\'t start with a 2nd order Sallen-Key! 3rd is OK. LC is nicely
retro.

Given a binary counter and a hacked resistor DAC, I guess you can\'t
reduce the 3rd harmonic, the big one.

six steps can be ok
https://imgur.com/a/cQJu9qg
Consider a binary counter. The MSB is a square wave of freqency F,
with third harmonic 3F.

The next bit is 2F with harmonic 6F.

I can\'t see how any linear-weighted combination of counter bits can cancel the 3F line.

That isn\'t how you do it. Feeding the square wave through a shift-register and using resistors hung on successive taps lets you set up a finite-impulse response filter.

They do have to go into an adder/subtractor op amp set up to generate the desired output.

For an infinite length shift register the optimal weighing is is the sinc function

https://en.wikipedia.org/wiki/Sinc_function

which does change sign. Truncating it produces \"Gibbs oscillations\" which you can essentially eliminated by applying a raised cosine (Hamming) window to the finite length of shift register you actually use. The filter doesn\'t cut off quite as hard but it does cut off monotonicly.

You can kill the third harmonic pretty close to perfectly.

--
Bill Sloman, Sydney
 
On 27-June-23 12:20 am, John Woodgate wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a stable frequency for a component bridge. I could use a 4017 and half a a 4013 (sorry about these ancient devices, but they are still good for some things), but I would have to add something to make the crystal oscillate unless there is a way to use the other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the oscillator, but I can\'t see how to make it divide by 20. I know there is a technique that combines some of the output signals via an EXOR to achieve divisors that are not powers of 2, but I can\'t find information on which signals to combine.

Many years ago, I ANDed a bunch of outputs from counter stages, and fed
the result into the reset, to achieve division by some arbitrary
integer. I was electronically naive [*] at the time, and what I did may
have relied on the propagation delays to work properly. The application
would not have been sensitive to the occasional glitch.

Or perhaps I was lucky enough to have bought a counter with a
synchronous reset. Either way, it worked.

Sylvia

[*] OK, OK, you got me; even more electronically naive than now.
 
On Wed, 28 Jun 2023 14:35:42 +1000, Sylvia Else <sylvia@email.invalid>
wrote:

On 27-June-23 12:20 am, John Woodgate wrote:
I want to divide a 32768 Hz crystal frequency by 20 to get a stable frequency for a component bridge. I could use a 4017 and half a a 4013 (sorry about these ancient devices, but they are still good for some things), but I would have to add something to make the crystal oscillate unless there is a way to use the other half of the 4013 to make the oscillator.

I also looked at using just a 4096, which gives me the oscillator, but I can\'t see how to make it divide by 20. I know there is a technique that combines some of the output signals via an EXOR to achieve divisors that are not powers of 2, but I can\'t find information on which signals to combine.

Many years ago, I ANDed a bunch of outputs from counter stages, and fed
the result into the reset, to achieve division by some arbitrary
integer. I was electronically naive [*] at the time, and what I did may
have relied on the propagation delays to work properly. The application
would not have been sensitive to the occasional glitch.

Or perhaps I was lucky enough to have bought a counter with a
synchronous reset. Either way, it worked.

Sylvia

[*] OK, OK, you got me; even more electronically naive than now.

Actually, I think that it always works, sync or async.
 
On Tuesday, June 27, 2023 at 11:28:46 PM UTC-7, John Larkin wrote:
On Wed, 28 Jun 2023 14:35:42 +1000, Sylvia Else <syl...@email.invalid
wrote:

Many years ago, I ANDed a bunch of outputs from counter stages, and fed
the result into the reset, to achieve division by some arbitrary
integer. I was electronically naive [*] at the time, and what I did may
have relied on the propagation delays to work properly. The application
would not have been sensitive to the occasional glitch.

Or perhaps I was lucky enough to have bought a counter with a
synchronous reset. Either way, it worked.

Sylvia

[*] OK, OK, you got me; even more electronically naive than now.
Actually, I think that it always works, sync or async.

Not necessarily: async reset can be fooled by the transient between-states
values of a slow slewing or ripple-delayed clocked event. Using the gate
output AT the main clock time should take you from N to zero, as long
as gate and slew delays aren\'t bigger than a clock period.
 

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