J
John Larkin
Guest
On Mon, 17 May 2004 11:03:14 -0700, Jim Thompson
<thegreatone@example.com> wrote:
fly on) had a nasty intermittent problem with one of our modules
recently. They'd work fine alone, but would reset/reboot if certain
other cards were in the rack. Turns out somebody was making glitches
on the \SYSRESET line. I'd tell you how we fixed it, but you might
kill me.
Actually, synchronous logic is just a mental crutch for people who
can't figure out real spaghetti logic. Async logic is threatening to
make a comeback, now that fully-clocked CMOS is starting to melt
chips. Rumor has it that part of the Pentium 4 is done in async logic.
There was a big project at TI once, ASC, where all TTL presets and
clears had to be tied high.
John
<thegreatone@example.com> wrote:
One of my VME customers (who makes the engines for the planes we allOn Mon, 17 May 2004 10:51:31 -0700, "Richard Henry" <rphenry@home.com
wrote:
"John Larkin" <jjlarkin@highSNIPlandTHIStechPLEASEnology.com> wrote in
message news:56sha057knt2cn7a66uratd2fi3ac4o96c@4ax.com...
On Mon, 17 May 2004 09:51:33 -0700, Jim Thompson
thegreatone@example.com> wrote:
Well, duh! ANY combinational logic inherently has glitches UNLESS
either (1) the inputs are sequenced (say with multiple clocks) or (2)
the outputs are strobed during a period that inputs are not changing.
or (3) you hang a big capacitor from output to ground.
I went to a job interview once where the chief engineer (a big, bearded
biker that everyone in the comapny called "Mad Dog") wanted to be sure that
I didn't design digital circuits with capacitive delay elements.
[snip]
I knew a fellow like that, named Ed Greenwood (now deceased), at
GenRad, big (as in >> 300#), bearded, quite tall.
He was noted for *dragging* a car out of his reserved parking space by
simply throwing a chain around the axle and pulling it out into the
aisle-way. Turned out to be a customer's rental car ;-)
He'd kill you if you used a one-shot anywhere!
...Jim Thompson
fly on) had a nasty intermittent problem with one of our modules
recently. They'd work fine alone, but would reset/reboot if certain
other cards were in the rack. Turns out somebody was making glitches
on the \SYSRESET line. I'd tell you how we fixed it, but you might
kill me.
Actually, synchronous logic is just a mental crutch for people who
can't figure out real spaghetti logic. Async logic is threatening to
make a comeback, now that fully-clocked CMOS is starting to melt
chips. Rumor has it that part of the Pentium 4 is done in async logic.
There was a big project at TI once, ASC, where all TTL presets and
clears had to be tied high.
John