Can somebody take a peek at this circuit for me?

[John Larkin]

On Wed, 23 Mar 2005 22:02:50 +0100, "Fred Bartoli"
<fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> wrote:

"Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> a écrit dans
le message de news:4241d798$0$2778$626a14ce@news.free.fr...


I wonder what it is now they've changed it's name.

Oops.
I apostrophe (French verb for 'heckle') myself before the apostrophe cop do.

"I wonder what it is now they've changed its name."

Hey, we don't like furriners that use our language better than we do.

John

 

[Rich The Newsgropup Wacko]

On Wed, 23 Mar 2005 20:02:40 -0800, John Larkin wrote:

On Wed, 23 Mar 2005 22:02:50 +0100, "Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> wrote:


"Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> a écrit dans
le message de news:4241d798$0$2778$626a14ce@news.free.fr...


I wonder what it is now they've changed it's name.

Oops.
I apostrophe (French verb for 'heckle') myself before the apostrophe cop do.

"I wonder what it is now they've changed its name."


Hey, we don't like furriners that use our language better than we do.

That's not true of everybody. I don't like
a) furriners who immigrate and can't be bothered to learn the language of
their new homeland
b) merkins that can't speak as good of merkin as furriners.
</grumble>

Cheers!
Rich

 

[John Larkin]

On Wed, 23 Mar 2005 12:38:12 -0600, Michael Noone
<mnoone.uiuc.edu@127.0.0.1> wrote:

John Larkin <jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> wrote in
news:mop1411hd4a9jdgbm8oomk0vldiqrd2ph2@4ax.com:

On Tue, 22 Mar 2005 11:54:38 -0600, Michael Noone
mnoone.uiuc.edu@127.0.0.1> wrote:

"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in
news:8HS%d.1$e%3.253@news.uswest.net:


You should learn to say what a circuit has to do in
terms of performance, preferably quantifiable. I
could say your circuit will "work", because you
have not really specified what that means.

Well - right now I just want to see if it even sort of works - but
eventually I want a circuit that can amplify a 0-10V signal to 0-400
with response time of about 1ms and with accuracy to the nearest volt
on the output.


I did post my little HV amplifier circuit to a.b.s.e. a while back. It
uses an opamp driving a pair of high-voltage optocouplers, with the
phototransistor sides as the output totem pole across the 400 volt
supply. This eliminated all sorts of level shifting problems... lets
light do it! It should be about good for 1 mA drive from 400 volt
rails.

What are you going to drive?

John

Hi John - it will be driving some sort of fluid load. I've been told
that it should be able to sync 0-20ma though this fluid. I looked
through ABSE and didn't find your circuit. My NG server has about 30 day
retention - so it should still be there... Do you have any idea what the
filename or topic name was? Thanks,

-Michael

Hey, Michael, I posted it again. This uses the V+ and V- power supply
currents of the opamp to drive the led sides of high-voltage
optocouplers. I use a variant of this in a box I built for some guys
who make electron-microscope sorta things, where not much current is
needed. But 20 mA is probably pushing this too hard... the opto ctr's
are low, and the couplers could well fry from power dissipation.

But the general idea of using optocouplers as analog level shifters is
sorta handy to keep around. We did discuss cascoding lower-voltage
optos with depletion-mode mosfets.

Is the fluid one of those electro-rheological thingies?

John

 

[John Woodgate]

I read in sci.electronics.design that Pooh Bear
<rabbitsfriendsandrelations@hotmail.com> wrote (in
<4241F752.63729E59@hotmail.com&gt about 'Can somebody take a peek at this
circuit for me?', on Wed, 23 Mar 2005:

I actually had an offer from Imperial but wasn't aware that UCL was
duff. UCL seemed like a more interesting college to go to.

More girls.

I was 18 years earlier.
--
Regards, John Woodgate, OOO - Own Opinions Only.
There are two sides to every question, except
'What is a Moebius strip?'
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

[Fred Bloggs]

Larry Brasfield wrote:

"John Fields" <jfields@austininstruments.com> wrote in message
news:8n7341pqags1l6l9htraduvcua0509euh9@4ax.com...

On Tue, 22 Mar 2005 12:50:32 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:


"John Fields" <jfields@austininstruments.com> wrote in message
news:emr041dnld7pmj6v7emf5bdsvng962tqgv@4ax.com...

+400V>--+-----+---D S---+----------+-------->>--+
| | G | | |
| | | [ZENER] | |
[R1] [R2] | |K | |
| | +-----+ | |
| | | | |
| +-----+ | |
| | | |
+-------------------+ Vin [R2] |
| | | | | |
| D /-|--+ | [RL]
|K G---< | | |
[REF] S \+|-------+-----+ |
| | | | | |
| | | [R3] [C1] |
| | | | | |
GND>----+-----------+-------+--------+-----+-->>--+


Use a little high-voltage FET to drive the big FET's gate. They're
cheap and it doesn't take much (damn near nothing) to drive them. Use
a micropower opamp and you can get its supply voltage from a resistor
and a low-current shunt reference tied to the 400V rail (or even just
a resistive divider) The Zener is to make sure the big MOSFET's gate
voltage never goes higher than it's supposed to, WRT to the source,
R2 R3 is the 40:1 divider, and C1 is to keep the thing from
oscillating.

What do you think the maximum output will be and
how does that compare with the "requirement"?

Would you increase C1 until it formed the dominant
pole in that loop?

Where do think that would be, considering where the
the previously dominant pole is (likely to be)?

How much loop gain variation would you expect to
see as the operating point changes?

---
For the answer to all of your questions, if you've taken the trouble
to download LTC's excellent simulator, run bitethedust.asc which you
can find at abse under the subject: "Bite the dust, asshole"



Quite a few points in one sentence, so I will answer them
in order, with a number to deliniate them.

1. Using simulation is not the right place to answer those
questions, especially when considering a set of topologies.
The simulator can be used to confirm (or refute) one's
understanding of a circuit, but it shares many of the pitfalls
of prototypes. It is a way of seeing how a specific
collection of components, with a specific set of parameters
and values, will behave. (And keep in mind, those parts
may correspond to no real part if the models are faulty.)
Saying "My circuit is good!" because you see something
you wanted to see out of a simulation is folly.

Backpedaling now that you have been corrected by several people? Your
earlier post advised the OP to use SPICE to "discover" how the circuit
will do- which means you don't know much about using SPICE. And in your
other pseudo-intellectual post where you stated that Early effect was
only used in the normal active region of device operation, you again
demonstrated ignorance of SPICE and the Ebers-Moll basis of the modeling
used. But you skulked out of that thread too- another cowardly ploy by
the rat abandoning his sinking ship. You are such an obvious fake and
loser that one can conclude "only in America" do freaks like you subsist.

2. I have used LTSpice for a few years for quick
and dirty work.

Which quick and dirty work is that? You don't build a damned thing, that
much is obvious, and no one in their right would take you seriously as
an engineer.

3. I did acquire your strangely named sim file. It
is a vigorous oscillator. If you took the output
from the op-amp with suitable limiting, you could
use it as a crude VCO.

"Vigorous" oscillator, parrot and pseudo-intellectual? What is that? An
oscillator that keeps going, and going, and going, even when you ground
all the internal nodes?

4. Name-calling is the recourse of those who find
it difficult to formulate a rational argument.

Nah- telling you what you are is not "name-calling". It is called
"telling you what you are". You have no idea how much of an aggravating
pompous incompetent fraud you have demonstrated yourself to be...

Here are some short answers to my questions,
evident from a very brief analysis (of your posted
circuit which had no values or part types) and
confirmed by watching your oscillator with SPICE
(with the quoted questions copied from above):

You "watched" his oscillator with SPICE? So that means you dragged some
oscilloscope into the simulation and pressed RUN- that would be a good
assessment of your skill set since it is becoming obvious all the time
that you are uneducable.

What do you think the maximum output will be and
how does that compare with the "requirement"?


The requirement was 0 V to +400 V out. The
above schematic necessarily produces less than
that, subtracting at least a PMOS gate threshold.

The simulation does much lower due to part selection
apparently limited to the LTSpice standard library.

Trivial and inconsequential observation so-called.....

Would you increase C1 until it formed the dominant
pole in that loop?


That is the only way to make the circuit stable, but
the response becomes so slow that simulating it is
a challenge. (a challenge I had no patience for)

What a crock of manure- you mean you don't know how to do it- and SPICE
really has no trouble handling d.e.'s with time constants orders of
magnitude apart- this was one of the most fundamental problems Gear
integration was designed to overcome.

Where do think that would be, considering where the
the previously dominant pole is (likely to be)?


Way closer to 0 than the 3 to 30 Hz typical location
of the op-amp. "Way" has magnitude similar to the
circuit's excessively high low frequency loop gain.

Hey- that's called DC accuracy. Weren't you using a DC accuracy argument
in a previous thread about summing integrators where you stated it was
a major consideration. You sound more and more like a whining complainer
habitually grasping at straws...

How much loop gain variation would you expect to
see as the operating point changes?


The circuit in question, for the output range required,
(or limiting same to the deliverable output range),
has an extremely wide range of loop gain because
the common source FET current goes from very
near 0 to values many times higher. This greatly
complicates the task of designing the loop for
stability. In the simulation, this fact, (together with
the fact that it was not designed for stability), is
the reason the circuit acts like a VCO.

Just more of your descriptive crap- "extremely wide range", "greatly
complicates" ( another allusion to a skill set that doesn't exist), and
more generalistic bs with absolutely not a stitch of anything specific...

 

[Fred Bartoli]

"John Larkin" <jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> a écrit dans
le message de news:kse441h2jvooivjqjbgm2unijng783kv2h@4ax.com...

On Wed, 23 Mar 2005 22:02:50 +0100, "Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> wrote:


"Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> a écrit
dans
le message de news:4241d798$0$2778$626a14ce@news.free.fr...


I wonder what it is now they've changed it's name.

Oops.
I apostrophe (French verb for 'heckle') myself before the apostrophe cop
do.

"I wonder what it is now they've changed its name."


Hey, we don't like furriners that use our language better than we do.

So let speak French. We are much more tolerant of this

ok. i apollo jazz, hand i wyl tri two doh mail beast know.


--
Thanks,
Fred.

 

[Fred Bloggs]

Larry Brasfield wrote:

your topology is/was deeply flawed. To "fix" it, I would
simply replace it with the topology I posted earlier.

Your earlier topology which you dropped discussion on was a joke. It
went open loop for the requested input range, and it was an inverter. In
addition, not a single value or part number was specified- because you
have no clue in hell. You are a total fake, fraud, and incompetent.

As I
discovered in just a few minutes this morning, my circuit
can be given values that are easily determined by a simple
analysis and works right away with a decent response that
is stable over the active output range.

Well- post it then, windbag...you have been dodging do that for some
time now. And /you/ might as well give using the word "analysis"- quite
the pretense given your laughably weak attempts at it so far.

[...snip the rest of your boring and dull bs...]

 

[Fred Bloggs]

Larry Brasfield wrote:

There are deep electronical lessons to be learned
from it that one could conceivably miss while sitting
thru several quarters of frequency domain analysis
and control theory classes.

"electronical"? Aren't you special. And did you sit through several
"quarters" of hack control theory and elementary signal theory classes?
Giving away your community college background there...what a fake.

For the benefit of the
NG, I will humbly try to elaborate them:

Oh here he goes again- the whole NG should listen up to the narcissist.
Can he be so godammed dumb he thinks anyone gives him the time of day by
now?

1. It is possible to close a feedback loop with an
op-amp integrator, then, by turning its gain
down far enough, get the loop to be stable.

"Turning its gain down"? Take your little sissy-puke perspective on
feedback control and get lost- the last thing anyone should do is step
inside your world of delusion and ignorance.

2. Excess phase problems induced by the insertion
of a useless resistor between a FET gate and its
original input can be mitigated to some extent by
adding a zero into the integrator response at a
completely different frequency than the needless
pole created by the useless resistor.

Not necessarily so- capacitive loading can cause op amp output stage
instabilities that have nothing to do with its gain/phase performance
otherwise- but you wouldn't know that, would you? And as for adding a
zero to the response, your earlier post that you had to add a "network"
pole. Sounds like you don't know what you're doing....

3. When no effort has been made to stabilize the
gain of stages within the feedback loop, it remains
possible to stabilize the loop by turning integrator
gain down far enough, provided one is willing to
accept less predictable response.

What a crock of manure- all you can think of is the most pathetic
dog-simple compensation extant- and then mental midget forever about it-
getting a lot of the strategy wrong in the process. It is clear you are
a total fraud who has never worked feedback in his life.

I humbly admit to having learned these lessons at
various times in the past, one of them from John.


Hi Mr. Fields - could you post what the corrected version of your circuit
is? Thanks so much for your help,


Since Mr. Fields appears busy, I will answer:

If you are willing to adapt his circuit to your
needs, it is what he posted yesterday except
with these mods:

1. Break the setpoint input and reconnect
with a 10K resistor.

2. Add a 100nF cap between the op-amp
output and its inverting input.

3. Add a 1000 Ohm resistor between the
op-amp output and the gate. (Do not try
to calculate the optimum value if you want
the resistor there.)

Again- wrong answer.

 

[Fred Bartoli]

"John Larkin" <jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> a écrit dans
le message de news:6ie4419d7m2u9g1rgf9cdd2fs1br11pujv@4ax.com...

Seriously (are we allowed to be serious?) I'd love to have a simulator
that let me connect sliders to parts values so I could change values
and see the transient or frequency response change in real time, like
a real-life breadboard/scope does. I figure I'd need 100x or sometimes
1000x the CPU power that I have now to make that realistic.

Better yet, a 2-D slider that lets me explore pairs of variables.

Have a try at icap4 from www.intusoft.com .

It almost allow that sort of thing. They have a demo package, plus now a
cheap and less limited student version.

And what an exciting experience when, tweaking your circuit, you
suddently
hear a nice prrshhhhh...pfff...pop, all that real time synthesized in
Dolby
5.1, with a nice animated stereo view of a flame you can look at with a
m$
LCD glasses.

And automatic PowerPoint presentation generation for Jim.

But he'll have to have the fire brigade right at the meeting room door to
reassure his customers.


--
Thanks,
Fred.

 

[Fred Bloggs]

Larry Brasfield wrote:

"John Fields" <jfields@austininstruments.com> wrote in message
news:1om341dqi2m5qvm99tv6bilfhtkjl1joad@4ax.com...

On Wed, 23 Mar 2005 10:50:22 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:


"John Fields" <jfields@austininstruments.com> wrote in message
news:8n7341pqags1l6l9htraduvcua0509euh9@4ax.com...

On Tue, 22 Mar 2005 12:50:32 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:

...

Would you increase C1 until it formed the dominant
pole in that loop?

Where do think that would be, considering where the
the previously dominant pole is (likely to be)?

How much loop gain variation would you expect to
see as the operating point changes?

---
For the answer to all of your questions, if you've taken the trouble
to download LTC's excellent simulator, run bitethedust.asc which you
can find at abse under the subject: "Bite the dust, asshole"


Quite a few points in one sentence, so I will answer them
in order, with a number to deliniate them.

1. Using simulation is not the right place to answer those
questions, especially when considering a set of topologies.
The simulator can be used to confirm (or refute) one's
understanding of a circuit, but it shares many of the pitfalls
of prototypes. It is a way of seeing how a specific
collection of components, with a specific set of parameters
and values, will behave. (And keep in mind, those parts
may correspond to no real part if the models are faulty.)
Saying "My circuit is good!" because you see something
you wanted to see out of a simulation is folly.

---
If, for some reason, you feel compelled to perform an in-depth, hand
analysis of the circuit, then by all means do it and report back to
me with what you find.


There is no point in doing such work for that circuit.


Also, if you think that simulation isn't the
way to go, then I suggest you fly your reasons by some of the folks
who make a living doing simulation and see how far you get. I'm sure
Jim Thompson, for one, will see the error of his ways and join you on
the bench with a good ol' Weller soldering gun and a roll of 30-70
solder in hand just champing at the bit to go to work on your newest
project. And, you put down simulation while in nearly the same breath
stating that you found that my circuit oscillated _during_ simulation,
LOL!!! That, AFTER you declared, pre-simulation, that there was NO
WAY my circuit would oscillate regardless of the value of capacitance
on the opamp input. Amusing how you just can't seem to keep your foot
out of your mouth...


Your "LOL" is based on a false premise, one which you
surely knew to be false many hours ago.

Nah- you're a liar, that much is clear- a total fake who dodges and
weaves in rat-like manner. The premise is quite accurate and true as it
pertains to you, fake.

As you have seen, my best prediction, the one not from a
post I already told you I had canceled and replaced, was
that your circuit "will oscillate". I predicted this with high
confidence hours before I looked at your circuit with
component values plugged in. You already know this.

Only a little incapable pussy makes a big deal out of oscillation- about
all you can understand and the simplest parameter to analyze.

Ironically, I detected the oscillation of your circuit before
you did, (unless you are a trickster), writing:
Where did the output ripple come from? I can
see no source for it in your schematic other
than an oscillation. I'm about 95% confidant
that it will oscillate until C1 becomes huge.
The only question is where the limiting occurs.
I had no need to simulate it to see that.

Your point taking is quite premature and deceptive.

Your comedy about prefering soldering over simulation
is a fantasy not supported by my words. As I stated,
both suffer from certain pitfalls that make them a poor
substitute for analysis.

Analysis you are incapable of doing- and which you dare not post to the
NG- because it is so pathetically immature.

2. I have used LTSpice for a few years for quick
and dirty work.

---
So what did you think my circuit was? Something _not_ quick and
dirty? You're a joke.


I use another simulator for other types of work.
My comment was not about your circuit.
Your proclamations are wearisome.

I bet they are- you are an aged fart on handout- not exactly the type of
life conducive to energizing anyone.

[...snip the rest of your non-informational pompous drivel...]

 

[Fred Bloggs]

Larry Brasfield wrote:

"Active8" <reply2group@ndbbm.net> wrote in message
news:1e3alo8raj6s9.dlg@ID-222894.news.individual.net...

You know what? I'd actually start reading more of your posts if
you'd just say "this won't work because..." instead of something
like "Clearly, if he knew the op-amp was banging around,..."


For me to pretend to educate Mr. Fields would require
an effort I cannot muster at this point in our history.

[Reasonable advice cut.]


I haven't yet found the circuit that you call your own in all that
noise. I doubt anyone trying to learn something here would bother.
I'm interested in seeing this circuit that allegedly trumps John's.


For the purposes I offered my circuit, I'm not making
the claim that it trumps John's. I got the idea it was for
a student who seemed to want to learn some things.

It is a simple p.o.s., and as usual, you still fail to understand what
the OP asked for: non-inverting, input 0-10V, output 0-400V. You produce
a simple minded p.o.s. with a pure resistor load, it inverts, and it
does not handle the input range. Also, the common base circuit gain is
capable of blowing the gate of the MOSFET, you still can't get through
your head that the weighted sum of two positive voltages will never be
zero at the op amp (+) input- so the loop opens for IN>0, the 2N5550
blows up at little more than 25% of the voltage stress you have applied,
the 11QB11P06 is only rated for 60V, and the choice of LT1211 makes
for an unnecessarily expensive mis-application of a single-supply op
amp. In other words , there is not damned thing right about your
so-called simple minded circuit- and you have to be a total fake. But
your circuit will not oscillate- that's one thing going for it- it will
just melt.

The only claim I make for this is that it can be easily
and simply compensated in a predictable way via
analytical methods accessible to most EE students.

About the only kind of compensation you can handle- who the hell do you
think you're fooling, windbag.

Since there is little in the way of any performance
requirement, any "trumps" proclamation would be
very premature.

Well- lacking detailed performance requirements is no excuse for all the
mistakes you made in that so-called circuit- the defects run deeper than
that.

What follows is essentially the same circuit I posted
without values yesterday. There is an added biasing
resistor to make better use of the op-amp range.

Everyone take a look at what windbag posted- totally worthless crap:

So, if you want to see it, here is the LTSpice source:
============ begin sefamp.asc ============
Version 4
SHEET 1 880 680
WIRE -208 240 -208 224
WIRE -208 352 -208 320
WIRE -144 224 -208 224
WIRE -144 352 -144 224
WIRE -128 352 -144 352
WIRE -96 192 -96 176
WIRE -80 176 -96 176
WIRE 16 176 0 176
WIRE 16 256 16 176
WIRE 16 352 -48 352
WIRE 16 352 16 288
WIRE 32 128 32 -48
WIRE 32 256 16 256
WIRE 32 288 16 288
WIRE 64 112 64 48
WIRE 64 128 32 128
WIRE 64 240 64 128
WIRE 64 320 64 304
WIRE 80 -48 32 -48
WIRE 80 48 64 48
WIRE 112 112 64 112
WIRE 112 320 64 320
WIRE 112 320 112 112
WIRE 128 176 16 176
WIRE 144 352 16 352
WIRE 192 -48 160 -48
WIRE 192 48 160 48
WIRE 192 48 192 -48
WIRE 192 272 96 272
WIRE 192 272 192 176
WIRE 208 48 192 48
WIRE 208 64 208 48
WIRE 224 272 192 272
WIRE 256 -48 256 -80
WIRE 256 48 208 48
WIRE 256 48 256 32
WIRE 256 272 224 272
WIRE 288 176 288 160
WIRE 304 160 288 160
WIRE 368 -80 256 -80
WIRE 368 -48 368 -80
WIRE 368 80 368 32
WIRE 368 112 368 80
WIRE 368 224 368 208
WIRE 368 272 336 272
WIRE 368 272 368 224
WIRE 400 224 368 224
WIRE 400 320 112 320
WIRE 400 320 400 304
WIRE 416 80 368 80
WIRE 464 80 416 80
WIRE 512 -80 368 -80
WIRE 512 -48 512 -80
WIRE 512 64 512 32
WIRE 512 288 512 160
WIRE 512 352 224 352
WIRE 512 352 512 288
WIRE 560 288 512 288
WIRE 592 288 560 288
WIRE 592 304 592 288
WIRE 592 400 592 384
FLAG 592 400 0
FLAG 208 64 0
FLAG -96 192 0
FLAG 288 176 0
FLAG -208 352 0
FLAG 560 288 out
FLAG 224 272 amp
FLAG 416 80 gate
SYMBOL res 16 160 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 192 160 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res -32 336 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL res 240 336 R90
WINDOW 0 33 101 VTop 0
WINDOW 3 32 -1 VTop 0
SYMATTR InstName R3
SYMATTR Value {-Acl * 5k}
SYMBOL npn 304 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N5550
SYMBOL pmos 464 160 M180
SYMATTR InstName M1
SYMATTR Value FQB11P06
SYMBOL res 496 -64 R0
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res 352 -64 R0
SYMATTR InstName R5
SYMATTR Value 2k
SYMBOL res 576 288 R0
SYMATTR InstName R6
SYMATTR Value 200
SYMBOL voltage -208 224 R0
WINDOW 3 -50 -38 Left 0
WINDOW 123 -58 1 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {spout / Acl }
SYMATTR Value2 AC 1
SYMBOL voltage 176 48 R90
WINDOW 0 59 84 VBottom 0
WINDOW 3 32 30 VTop 0
SYMATTR InstName V2
SYMATTR Value 11
SYMBOL voltage 64 -48 R270
WINDOW 0 -55 27 VTop 0
WINDOW 3 -32 79 VBottom 0
SYMATTR InstName V3
SYMATTR Value 11
SYMBOL voltage 256 -64 R0
SYMATTR InstName V4
SYMATTR Value 400
SYMBOL res 352 256 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL res 384 208 R0
SYMATTR InstName R8
SYMATTR Value 5k
SYMBOL Opamps\\LT1211 64 208 R0
WINDOW 0 -68 41 Right 0
WINDOW 3 -55 72 Right 0
SYMATTR InstName U1
TEXT -24 448 Left 0 !.ac oct 20 1k 50meg
TEXT 216 448 Left 0 !.step param spout LIST 50 150 250 350
TEXT -264 -24 Left 0 !.param Acl=-50
============ end sefamp.asc ============

 

[Terry Pinnell]

John Larkin <jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> wrote:

On Wed, 23 Mar 2005 22:02:50 +0100, "Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> wrote:


"Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> a écrit dans
le message de news:4241d798$0$2778$626a14ce@news.free.fr...


I wonder what it is now they've changed it's name.

Oops.
I apostrophe (French verb for 'heckle') myself before the apostrophe cop do.

"I wonder what it is now they've changed its name."


Hey, we don't like furriners that use our language better than we do.

John

Excuse me...?

--
Terry Pinnell
Hobbyist, West Sussex, UK, home of the EnglishŠ language.

 

[Larry Brasfield]

Derf transform applied.
Scurrilous subject change reverted.

"Fred Bloggs" <nospam@nospam.com> wrote in
message news:42428DDC.3020306@nospam.com...

Larry Brasfield wrote:
....
For the purposes I offered my circuit, I'm not making
the claim that it trumps John's. I got the idea it was for
a student who seemed to want to learn some things.

[derf], you still fail to understand what the OP asked for: non-inverting, input 0-10V, output 0-400V.

When I posted the ASCII form of that circuit, I wrote:
It inverts, so if your heart is set on the transfer
function you posted, you'll need to adjust.
Since you quoted that yourself in once of your compulsive
trash posts that seem to follow mine, I believe it is fair to
call your "fail to understand" assertion a lie.

You produce a simple minded p.o.s. with a pure resistor load,

The load has not been specified that I've seen. Of
course, you can only post trash instead of sharing
your divination of what the load really is.

it inverts,

You said that already. Try to settle down.

and it does not handle the input range.

True. It goes to 380V as shown. I figured the OP
could adjust it, if interested, for the load he has and
supply he may have or obtain.

Also, the common base circuit gain is capable of blowing the gate of the MOSFET,

That condition can only arise under short circuit
output conditions. Those would destroy most
parts in that output FET position very quickly,
so worrying about the gate would be an exercise
in futility and needless cost.

If the circuit was intended to be production ready,
it might have some short circuit protection. Your
trick gate protection circuit would be useful then.

you still can't get through your head that the weighted sum of two positive voltages will never be zero at the op amp (+) input-
so the loop opens for IN>0,

I understood that point when you first made it.
Since recovery time from that input is part of the
missing requirements, it is not worth worrying about.

Something you appear unable to understand is that
my objective is not to show myself capable of
designing a Fred-unassailable circuit. I would have
to be a nut case to be trying to think of dozens of
performance features and protection circuits, all
in the hope of pleasing you rather than meeting a
real requirement. By the time the circuit was fully
featured, some jerk would say it costs too much.

the 2N5550 blows up at little more than 25% of the voltage stress you have applied, the 11QB11P06 is only rated for 60V,

Very clever of you to notice. I used parts that
happen to be in the LTSpice product as released
rather than go find parts and models when the
required load capability is still unknown.

If you ran the simulation, you might notice that
the parts do not blow up there, contrary to
certain noise you have injected here earlier.

and the choice of LT1211 makes for an unnecessarily expensive mis-application of a single-supply op amp.

Oh no! A one-up circuit is too expensive!
Call the cost control police! You must be in
full rant mode, Fred, to be scraping so.

In other words , there is not damned thing right about your so-called simple minded circuit-

Oh, dear! I have failed to please the Great One!
Whatever am I to do?

and you have to be a total fake.

My paying clients who ask for more of my time are one
proof of the falsity of that claim. There are others.
Your obsession with my talent is touching, but you need
to get a grip, and take your meds.

But your circuit will not oscillate- that's one thing going for it- it will just melt.

You assume that it would be built with those
obviously underated parts. There is other evidence
that the circuit is not production ready. There are
no bypass caps! How did you miss that, Fred?

The only claim I make for this is that it can be easily
and simply compensated in a predictable way via
analytical methods accessible to most EE students.

About the only kind of compensation you can handle- [derf]

That is a baseless lie, Fred.

Since there is little in the way of any performance
requirement, any "trumps" proclamation would be
very premature.

Well- lacking detailed performance requirements is no excuse for all the mistakes you made in that so-called circuit- the defects
run deeper than that.

So you claim. I don't feel any need to be
excused by you, so I'm not concerned.

....

:

My post of 4:20 on March 23, under this post's subject,
in the sci.electronics.basics group, contains the LTSpice
source (.asc) for the circuit, without quotes.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.

 

[Fred Bloggs]

Larry Brasfield wrote:
[...snip typical redacted response from unemployable loser and fraud...]

You're going to learn how to respond to a post one of these days. You
snip, misquote, dodge, weave, and make excuses for your sorry-ass left
and right, but it's just not going to work- YOU ARE A GODDAMMED FRAUD
AND EVERY THREAD YOU ENTER WILL BECOME A SHAMBLES..You can't hide- you
tried to hide your circuit post in SEB- while I will cross-post it all
the hell over the place- you have enemies..

Re-insert snipped material:

It is a simple p.o.s., and as usual, you still fail to understand what the OP asked for: non-inverting, input 0-10V, output 0-400V. You produce a simple minded p.o.s. with a pure resistor load, it inverts, and it does not handle the input range. Also, the common base circuit gain is capable of blowing the gate of the MOSFET, you still can't get through your head that the weighted sum of two positive voltages will never be zero at the op amp (+) input- so the loop opens for IN>0, the 2N5550 blows up at little more than 25% of the voltage stress you have applied, the 11QB11P06 is only rated for 60V, and the choice of LT1211 makes for an unnecessarily expensive mis-application of a single-supply op amp. In other words , there is not damned thing right about your so-called simple minded circuit- and you have to be a total fake. But your circuit will not oscillate- that's one thing going for it- it will just melt.


The only claim I make for this is that it can be easily
and simply compensated in a predictable way via
analytical methods accessible to most EE students.

About the only kind of compensation you can handle- who the hell do you think you're fooling, windbag.


Since there is little in the way of any performance
requirement, any "trumps" proclamation would be
very premature.

Well- lacking detailed performance requirements is no excuse for all the mistakes you made in that so-called circuit- the defects run deeper than that.


What follows is essentially the same circuit I posted
without values yesterday. There is an added biasing
resistor to make better use of the op-amp range.

Everyone take a look at what windbag posted- totally worthless crap:


So, if you want to see it, here is the LTSpice source:
============ begin sefamp.asc ============
Version 4
SHEET 1 880 680
WIRE -208 240 -208 224
WIRE -208 352 -208 320
WIRE -144 224 -208 224
WIRE -144 352 -144 224
WIRE -128 352 -144 352
WIRE -96 192 -96 176
WIRE -80 176 -96 176
WIRE 16 176 0 176
WIRE 16 256 16 176
WIRE 16 352 -48 352
WIRE 16 352 16 288
WIRE 32 128 32 -48
WIRE 32 256 16 256
WIRE 32 288 16 288
WIRE 64 112 64 48
WIRE 64 128 32 128
WIRE 64 240 64 128
WIRE 64 320 64 304
WIRE 80 -48 32 -48
WIRE 80 48 64 48
WIRE 112 112 64 112
WIRE 112 320 64 320
WIRE 112 320 112 112
WIRE 128 176 16 176
WIRE 144 352 16 352
WIRE 192 -48 160 -48
WIRE 192 48 160 48
WIRE 192 48 192 -48
WIRE 192 272 96 272
WIRE 192 272 192 176
WIRE 208 48 192 48
WIRE 208 64 208 48
WIRE 224 272 192 272
WIRE 256 -48 256 -80
WIRE 256 48 208 48
WIRE 256 48 256 32
WIRE 256 272 224 272
WIRE 288 176 288 160
WIRE 304 160 288 160
WIRE 368 -80 256 -80
WIRE 368 -48 368 -80
WIRE 368 80 368 32
WIRE 368 112 368 80
WIRE 368 224 368 208
WIRE 368 272 336 272
WIRE 368 272 368 224
WIRE 400 224 368 224
WIRE 400 320 112 320
WIRE 400 320 400 304
WIRE 416 80 368 80
WIRE 464 80 416 80
WIRE 512 -80 368 -80
WIRE 512 -48 512 -80
WIRE 512 64 512 32
WIRE 512 288 512 160
WIRE 512 352 224 352
WIRE 512 352 512 288
WIRE 560 288 512 288
WIRE 592 288 560 288
WIRE 592 304 592 288
WIRE 592 400 592 384
FLAG 592 400 0
FLAG 208 64 0
FLAG -96 192 0
FLAG 288 176 0
FLAG -208 352 0
FLAG 560 288 out
FLAG 224 272 amp
FLAG 416 80 gate
SYMBOL res 16 160 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 192 160 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res -32 336 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL res 240 336 R90
WINDOW 0 33 101 VTop 0
WINDOW 3 32 -1 VTop 0
SYMATTR InstName R3
SYMATTR Value {-Acl * 5k}
SYMBOL npn 304 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N5550
SYMBOL pmos 464 160 M180
SYMATTR InstName M1
SYMATTR Value FQB11P06
SYMBOL res 496 -64 R0
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res 352 -64 R0
SYMATTR InstName R5
SYMATTR Value 2k
SYMBOL res 576 288 R0
SYMATTR InstName R6
SYMATTR Value 200
SYMBOL voltage -208 224 R0
WINDOW 3 -50 -38 Left 0
WINDOW 123 -58 1 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {spout / Acl }
SYMATTR Value2 AC 1
SYMBOL voltage 176 48 R90
WINDOW 0 59 84 VBottom 0
WINDOW 3 32 30 VTop 0
SYMATTR InstName V2
SYMATTR Value 11
SYMBOL voltage 64 -48 R270
WINDOW 0 -55 27 VTop 0
WINDOW 3 -32 79 VBottom 0
SYMATTR InstName V3
SYMATTR Value 11
SYMBOL voltage 256 -64 R0
SYMATTR InstName V4
SYMATTR Value 400
SYMBOL res 352 256 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL res 384 208 R0
SYMATTR InstName R8
SYMATTR Value 5k
SYMBOL Opamps\\LT1211 64 208 R0
WINDOW 0 -68 41 Right 0
WINDOW 3 -55 72 Right 0
SYMATTR InstName U1
TEXT -24 448 Left 0 !.ac oct 20 1k 50meg
TEXT 216 448 Left 0 !.step param spout LIST 50 150 250 350
TEXT -264 -24 Left 0 !.param Acl=-50
============ end sefamp.asc ============

 

[Jim Thompson]

On Wed, 23 Mar 2005 20:01:17 -0800, John Larkin
<jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> wrote:

[snip]

And automatic PowerPoint presentation generation for Jim.

John

I've done one PowerPoint presentation, then discovered I can do better
simply using Acrobat, using some trivial JavaScript.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Jim Thompson]

On Wed, 23 Mar 2005 20:05:09 -0800, John Larkin
<jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> wrote:

On Wed, 23 Mar 2005 11:47:05 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:


If you posted it without recognizing the oscillation for what
it is, then, at the very least, you have exhibited a level of
competence that disqualifies you from holding yourself out
as one of my technical betters.

What the hell is a "technical better"? More importantly, who the hell
cares?

John

Brasfield is upset, 'cause Genome > Brasfield ;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[John Woodgate]

I read in sci.electronics.design that Jim Thompson
<thegreatone@example.com> wrote (in
<muk5419c1j48bc5eu2940l1r2rtjr8kdkh@4ax.com&gt about 'Can somebody take a
peek at this circuit for me?', on Thu, 24 Mar 2005:

I've done one PowerPoint presentation, then discovered I can do better
simply using Acrobat, using some trivial JavaScript.

I don't find anything trivial about JavaScript, except the results of
any hour of my work on it. -(
--
Regards, John Woodgate, OOO - Own Opinions Only.
There are two sides to every question, except
'What is a Moebius strip?'
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

[Jim Thompson]

On Thu, 24 Mar 2005 15:16:42 +0000, John Woodgate
<jmw@jmwa.demon.contraspam.yuk> wrote:

I read in sci.electronics.design that Jim Thompson
thegreatone@example.com> wrote (in
muk5419c1j48bc5eu2940l1r2rtjr8kdkh@4ax.com&gt about 'Can somebody take a
peek at this circuit for me?', on Thu, 24 Mar 2005:

I've done one PowerPoint presentation, then discovered I can do better
simply using Acrobat, using some trivial JavaScript.

I don't find anything trivial about JavaScript, except the results of
any hour of my work on it. -(

To do a PowerPoint-like presentation in Adobe Acrobat requires using
"fields", show destinations, scan and name pages; and takes this
_complex_ JavaScript....

gotoNamedDest("PageName")

;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Rich Grise]

On Thu, 24 Mar 2005 10:01:44 +0000, Terry Pinnell wrote:

John Larkin <jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> wrote:

On Wed, 23 Mar 2005 22:02:50 +0100, "Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> wrote:


"Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> a écrit dans
le message de news:4241d798$0$2778$626a14ce@news.free.fr...


I wonder what it is now they've changed it's name.

Oops.
I apostrophe (French verb for 'heckle') myself before the apostrophe cop do.

"I wonder what it is now they've changed its name."


Hey, we don't like furriners that use our language better than we do.

John

Excuse me...?

You're excused. What'd you do?

;-P

 

[John Larkin]

On Thu, 24 Mar 2005 09:24:19 +0100, "Fred Bartoli"
<fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> wrote:

"John Larkin" <jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> a écrit dans
le message de news:kse441h2jvooivjqjbgm2unijng783kv2h@4ax.com...
On Wed, 23 Mar 2005 22:02:50 +0100, "Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> wrote:


"Fred Bartoli"
fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> a écrit
dans
le message de news:4241d798$0$2778$626a14ce@news.free.fr...


I wonder what it is now they've changed it's name.

Oops.
I apostrophe (French verb for 'heckle') myself before the apostrophe cop
do.

"I wonder what it is now they've changed its name."


Hey, we don't like furriners that use our language better than we do.


So let speak French. We are much more tolerant of this

ok. i apollo jazz, hand i wyl tri two doh mail beast know.

Much better. Thanks.

John