Can somebody take a peek at this circuit for me?

[Fred Bloggs]

Larry Brasfield wrote:

Demonstrating a reading comphrension problem here.
Reversable Derf transform applied.

"John Fields" <jfields@austininstruments.com> wrote in message
news:1vf14115li2mdsdlvjpgcqulo61sn1ged5@4ax.com...

On Tue, 22 Mar 2005 15:57:07 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:

"John Fields" <jfields@austininstruments.com> wrote in message
news:fg81411s2adq8t2bhtil31jgjqmhjbubua@4ax.com...

On Tue, 22 Mar 2005 12:37:39 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:

...

It cannot oscillate no matter what value you use for C1.
Study it carefully and I'm sure you can see why.

...

The post you quoted is one I canceled a couple of
minutes after hitting send. I mistakenly read your
upper MOSFET as a reversed P-channel device,
assuming, incorrectly, that you intended to produce
the 400V output first mentioned by the OP. As I
was reading your schematic, filling in the missing
polarity, it looked like a bistable latch.

...

I presume your comments apply to my post of
12:50, where I asked about loop gain shifts
and dominant poles.

...

Where did the output ripple come from? I can
see no source for it in your schematic other
than an oscillation. I'm about 95% confidant
that it will oscillate until C1 becomes huge.
The only question is where the limiting occurs.

---
Geez, I thought you said in an earlier post that there was _no way_
the circuit could oscillate, regardless of the value of C1.

Backpedaling [d1]?


Let's review the sequence of events here:
0. JF posts a schematic.
1. LB posts "cannot oscillate ... Study it carefully".
2. LB spots an error in said post and cancels it.
3. LB posts, 13 minutes after 1, about loop gain and dominant poles.
4. JF replies to something by quoting the cancelled post, 2 hours
and 32 minutes after post 3, (the correction) was posted.
5. LB replies, informing JF that post 1 cancelled, post 3 is up,
and claiming confidence that JF designed an oscillator.
6. JF replies, 1 hour and 13 minutes later, noting that posts 1 and 5
are inconsistent, suggests post 5 should be called "backpedaling".

To me, that sequence of events clearly indicates, at best, a
severe reading comprehension problem. Either that, or in
JFWorld, an error caught and fixed by the same person,
without any outside impetus, and freely acknowledged,
is to be deemed "backpedaling". The problem with that
view is that the "retreat" was already history, long before
you came up with any reply to either the canceled post
or its replacement. You've got the tense wrong.

I find it odd that you are happy to castigate me for never
voluntarily changing my mind, and then, given an instance
of that very action, latch onto it as cause for denigration.
I hope you will forgive me for not caring what you think.

Nah- the sequence of events: LB can't understand anything, LB looking
for a way to evade OP's questions about his own dumbass p.o.s. circuit,
LB now trying to create smoke screen to look busy.
Yep- LB is quite the blatant fake, phony, pseudo-intellectual p.o.s.

 

[Fred Bloggs]

Larry Brasfield wrote:

"John Fields" <jfields@austininstruments.com> wrote in message
news:emr041dnld7pmj6v7emf5bdsvng962tqgv@4ax.com...

+400V>--+-----+---D S---+----------+-------->>--+
| | G | | |
| | | [ZENER] | |
[R1] [R2] | |K | |
| | +-----+ | |
| | | | |
| +-----+ | |
| | | |
+-------------------+ Vin [R2] |
| | | | | |
| D /-|--+ | [RL]
|K G---< | | |
[REF] S \+|-------+-----+ |
| | | | | |
| | | [R3] [C1] |
| | | | | |
GND>----+-----------+-------+--------+-----+-->>--+


Use a little high-voltage FET to drive the big FET's gate. They're
cheap and it doesn't take much (damn near nothing) to drive them. Use
a micropower opamp and you can get its supply voltage from a resistor
and a low-current shunt reference tied to the 400V rail (or even just
a resistive divider) The Zener is to make sure the big MOSFET's gate
voltage never goes higher than it's supposed to, WRT to the source,
R2 R3 is the 40:1 divider, and C1 is to keep the thing from
oscillating.


What do you think the maximum output will be and
how does that compare with the "requirement"?

Would you increase C1 until it formed the dominant
pole in that loop?

Where do think that would be, considering where the
the previously dominant pole is (likely to be)?

How much loop gain variation would you expect to
see as the operating point changes?

Unbelievable p.o.s.- let's see you answer those questions.

 

[Fred Bloggs]

Larry Brasfield wrote:

Derf transform applied.

GFY, pseudo-intellectual and confused idiot- I don't bother reading your
posts until you can format a proper response.

[...snip trash without taking *any* time to read it...]

 

[Larry Brasfield]

Derf transform applied.

"Fred Bloggs" <nospam@nospam.com> wrote in
message news:42412304.7050208@nospam.com...

Larry Brasfield wrote:
Derf transform applied.

[derf] I don't bother reading your posts until you can format a proper response.

[...snip trash without taking *any* time to read it...]

That's funny, Fred. It implies that you believe my posts
are written to persuade you of something, or are mainly
intended for you at all. That would be mistaken belief.

My replies to your few posts with content are intended
to correct your errors, refer other readers to where
the issues raised have already been addressed, or
point out inconsistencies in your positions. It has
very little to do with you and everything to do with
mitigating the effect of your crap that might not quite
appear to be crap at first glance.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.

 

[Larry Brasfield]

A "Bite the dust" prophesy comes to pass.

"John Fields" <jfields@austininstruments.com> wrote in message
news:1vf14115li2mdsdlvjpgcqulo61sn1ged5@4ax.com...

On Tue, 22 Mar 2005 15:57:07 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:
"John Fields" <jfields@austininstruments.com> wrote in message
news:fg81411s2adq8t2bhtil31jgjqmhjbubua@4ax.com...
On Tue, 22 Mar 2005 12:37:39 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:
"John Fields" <jfields@austininstruments.com> wrote in message
news:emr041dnld7pmj6v7emf5bdsvng962tqgv@4ax.com...
....
+400V>--+-----+---D S---+----------+-------->>--+
| | G | | |
| | | [ZENER] | |
[R1] [R2] | |K | |
| | +-----+ | |
| | | | |
| +-----+ | |
| | | |
+-------------------+ Vin [R2] |
| | | | | |
| D /-|--+ | [RL]
|K G---< | | |
[REF] S \+|-------+-----+ |
| | | | | |
| | | [R3] [C1] |
| | | | | |
GND>----+-----------+-------+--------+-----+-->>--+


Use a little high-voltage FET to drive the big FET's gate. They're
cheap and it doesn't take much (damn near nothing) to drive them. Use
a micropower opamp and you can get its supply voltage from a resistor
and a low-current shunt reference tied to the 400V rail (or even just
a resistive divider) The Zener is to make sure the big MOSFET's gate
voltage never goes higher than it's supposed to, WRT to the source,
R2 R3 is the 40:1 divider, and C1 is to keep the thing from
oscillating.

The above quoted schematic was posted at 11:57 3/22.
After misreading the above schematic, then posting and canceling
a cryptic critique of it, I posted these questions at 12:50 :

What do you think the maximum output will be and
how does that compare with the "requirement"?

Would you increase C1 until it formed the dominant
pole in that loop?

Where do think that would be, considering where the
the previously dominant pole is (likely to be)?

How much loop gain variation would you expect to
see as the operating point changes?

As we will see, they are all pertinent and, if John Fields had
understood their import, he could have avoided the need
for the performance evaluation related below. Instead, at
14:41, he posted "Bite the dust, asshole", containing a
LTSpice schematic resembling the above in most respects.

[Referring to my mention of C1 in a post cancelled less
than 13 minutes after it was sent:]

In this case, good catch, but... the larger C1 becomes, the greater
the output ripple becomes, until it starts to look like an
oscillation.

This is the first of several indicators of the problem.

The schematic to which John refers does not have
any sources of "ripple" other than its own instability.
The word "ripple", as it is used here, is clearly an
oscillation. It occurs in the transient simulation for
the "best C1" as claimed below. The output of
the op-amp is oscillating rail to rail, spending no
more than 4% of the time in its active region. The
oscillation frequency is 1.44 KHz. The output
itself sawtooths at about 3 Vpp, although this is
better looking when viewed at 300 V fullscale.
Remember, this is the "best C1", equal to 0,
for a capacitor whose purpose as stated by the
designer "is to keep the thing from oscillating."

The circuit oscillates for the whole range of
input values as well. As can be expected, due
to the FET transconductance shifting quite a
bit with operating point, the oscillation changes
its frequency as the input is varied.

The simulator cannot find a DC solution for
an AC analysis. This, all by itself, indicates
that this may be John's first venture into the
"design" of a non-trivial feedback system,
since responsible designers of such systems
generally look carefully at AC responses.

A 1K resistor has been inserted between the
op-amp output and the common source stage's
gate. It appears to have been added for its
effect of reducing the oscillation magnitude as
viewed at the output. Of course, it adds even
more phase lag to the loop, which has more
than it needs to be an oscillator anyway.

One could read John's mention of "oscillation"
for worse (> 0) values of C1 as being either
deceptive or an indicator of extreme ignorance.

Clearly, if he knew the op-amp was banging around,
rail to rail, his use of the term "ripple" is deceptive,
especially when he indicates that the circuit can be
made to exhibit what "starts to look like an oscillation"
when a circuit value is changed.

If he was trying to be honest, then his appearance
of competence is severely damaged. It would
mean he never looked beyond the output and
was not able to realize that a 3 Vpp sawtooth
there is a bad sign for an amplifier with nothing
but DC inputs.

The best C1 is no C1, according to bitethedust.asc which
you can find on abse and which you can run if you've downloaded
LTSPICE

I'm game. It's not showing up on my newserver
in alt.binaries.schematics.electronic . Can you
either email it or state what part values and
transistors you used? Or post, the .asc, which
is ASCII, so can be pasted into a post.
---
I can, but I won't. You know where it is, so find it and fend for
yourself. Or piss off.
....
I presume your comments apply to my post of
12:50, where I asked about loop gain shifts
and dominant poles. Since you elect to not
answer that, I want to simulate your circuit
and see for myself.
---
Fine. You know where the file is, so retrieve it and have at it.

One gets the distinct idea that John would just as
soon not see his circuit in my hands. Strange for
something titled "Bite the dust, asshole". Maybe
he thought the title alone would carry the day.

Where did the output ripple come from? I can
see no source for it in your schematic other
than an oscillation. I'm about 95% confidant
that it will oscillate until C1 becomes huge.
The only question is where the limiting occurs.

The only reason for the 5% uncertainty was that I imagined
John might be able to find some set of extreme circuit values
which, given the perfectly insulating upper MOSFET gate,
would shift the loop dominant pole from the op-amp to
the common source amplifier while also greatly reducing its
transconductance. I was not sure whether he knew enough
to devise then execute that approach, or whether it could be
made to work, hence my 5% reservation.

The prophesy was: John's circuit "will oscillate".

The fact is: It oscillates for all values of C1 up to 1 Farad.

John's circuit post is aptly titled, "Bite the dust".

Now, for the benefit of the OP, I will pose some
questions, the ones which John should have asked
himself if he is going to hold himself out as somebody
who should be offering amplifier circuits to others.

1. What components and parameters set the loop gain?

2. How does the loop gain vary with frequency, both
phase and magnitude?

3. How does the answer to 2 comport with any of
several well-known stability criteria? (Nyquist,
gain margin, phase margin, no closed loop poles
too near or to right of the imaginary axis)

4. How can the answers to 2 and 3 be expected to
vary with operating point, temperature, component
variation, supply, and any expected load changes?

P.S. to John: This post will undoubtedly get the
attention of your hero, who will blither and spew
about it. You then have a choice. Either take his
"analysis" as proof that you are truly competent,
or recognize him for the kook he is and begin the
process of learning your own limitations. Perhaps
a good way to start would be to give up a few of
your carefully gleaned and hoarded AH points.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.

 

[John Woodgate]

I read in sci.electronics.design that Larry Brasfield
<donotspam_larry_brasfield@hotmail.com> wrote (in
<sf70e.29$1t1.1241@news.uswest.net&gt about 'Can somebody take a peek at
this circuit for me?', on Tue, 22 Mar 2005:

Either that, or in JFWorld, an error caught and fixed by the same
person, without any outside impetus, and freely acknowledged, is to be
deemed "backpedaling".

Your cancellation didn't appear here, but I'm not doubting that you made
it. Some messages are being delayed by 12 hours or more; only an hour
ago I received one which people had been replying to since yesterday
morning.

It's quite likely that JF, also, didn't receive your cancellation.
--
Regards, John Woodgate, OOO - Own Opinions Only.
There are two sides to every question, except
'What is a Moebius strip?'
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

[John Woodgate]

I read in sci.electronics.design that Pooh Bear
<rabbitsfriendsandrelations@hotmail.com> wrote (in
<4240DA27.186F8457@hotmail.com&gt about 'Can somebody take a peek at this
circuit for me?', on Wed, 23 Mar 2005:

Reminds me of the year almost completely wasted I spent at the
supposedly prestigious University College London.

When was this? It sounds quite like my experience at another UL college.
The only good one for electronics was Imperial, but I didn't know that
at the time.
--
Regards, John Woodgate, OOO - Own Opinions Only.
There are two sides to every question, except
'What is a Moebius strip?'
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

[Active8]

Christ on a crutch! Do you break threads so you can be on top?

 

[Fred Bartoli]

"Pooh Bear" <rabbitsfriendsandrelations@hotmail.com> a écrit dans le message
de news:4240D84B.150509C3@hotmail.com...

Leon Heller wrote:

Why not simulate it? If it simulates OK you can actually build it and
see
what happens.

Simulation regrettably doesn't simulate the fire caused by kilowatts of
dissipation in the feedback Rs !

This could be a nice add-on to EWB


--
Thanks,
Fred.

 

[John Fields]

On Wed, 23 Mar 2005 01:17:04 -0800, "Larry Brasfield"
<donotspam_larry_brasfield@hotmail.com> wrote:

A "Bite the dust" prophesy comes to pass.

---
Snipped gloat...

You may not have noticed, but Mr. Genome was kind enough to critique
my circuit without invective, and a damned fine job he did of it too.
I appreciate the effort, and my hat's off to him.

You, on the other hand... well, why bother? Let's just leave it at
that.

--
John Fields

 

[John Fields]

On Wed, 23 Mar 2005 01:36:02 GMT, "Genome" <ilike_spam@yahoo.co.uk>
wrote:

"John Fields" <jfields@austininstruments.com> wrote in message
news:6jg1415ct80cmsvqujrc60qqsbjqn2945h@4ax.com...
On Wed, 23 Mar 2005 00:18:43 GMT, "Genome" <ilike_spam@yahoo.co.uk
wrote:


John, that is piss poor. Whilst Larry might not have the bananas to
tell you why he will probably sweat buckets coming up with some
'reasons'. You have done yourself and Spice a big unfavour.

---
I'm sorry to hear that and, since I respect your opinion, I'd like
to
hear where I've gone awry.

--
John Fields

OK, not that I'll nail it but....

You drive your control mosfet through a resistor from your error
amplifier. That resistor forms a pole with the mosfets input
capacitance.

The drain of your control mosfet drives the pass mosfet. The control
mosfet acts as a current sink. Your pass mosfet has its gate
capacitance. That gives you another pole, current driving a capacitor.

At some point your system goes second order and will therefore be
unstable.

You add your compensating capacitor at the input to your error
amplifier and you drive it third order and things get worse.

Your op-amp model includes the line

Avol=1Meg GBW=10Meg Slew=10Meg

It's a first order model in itself, those poles are adding up. Then
you don't add a local loop around that op-amp and run it balls to the
wall.

If you probe the output of the op-amp in your spice model then you
will see that it's bouncing up and down.

OK, that's not exhaustive and I've not suggested any solutions but,
there you go.

---
Very nice. Thanks, I appreciate it.
---

Oh, and a pre-emptive...... Fuck off Larry.

I'm off to bed.

---
See ya.

--
John Fields

 

[John Fields]

On Wed, 23 Mar 2005 01:17:04 -0800, "Larry Brasfield"
<donotspam_larry_brasfield@hotmail.com> wrote:

The prophesy was: John's circuit "will oscillate".

---
And it did. Big deal. It's now fixed, and I can only surmise that
since you didn't have your big gums flapping something to the effect
of: "...and here's a fix that even Fields should have known about,
blah, blah, blah..."

If you can get your sorry ass over to abse and download the file you
might learn something, even though you'd never admit it.

Goodbye for now.

--
John Fields

 

[John Fields]

On Wed, 23 Mar 2005 05:29:37 -0600, John Fields
<jfields@austininstruments.com> wrote:

On Wed, 23 Mar 2005 01:17:04 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:


The prophesy was: John's circuit "will oscillate".

---
And it did. Big deal. It's now fixed, and I can only surmise that
since you didn't have your big gums flapping something to the effect
of: "...and here's a fix that even Fields should have known about,
blah, blah, blah..." , that you didn't know how to fix it.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

Added_________________/

If you can get your sorry ass over to abse and download the file you
might learn something, even though you'd never admit it.

Goodbye for now.

--
John Fields

 

[Fred Bloggs]

Larry Brasfield wrote:

Derf transform applied.

Don't bother responding until you learn how to format a proper response.
[...snip trash without taking *any* time to read it...]

 

[Fred Bloggs]

Larry Brasfield wrote:

After misreading the above schematic, then posting and canceling a
cryptic critique of it, I posted these questions at 12:50 :

You mean questions you don't know to answer....

What do you think the maximum output will be and how does that
compare with the "requirement"?

[...snip more elementary questions...]

As we will see, they are all pertinent and, if John Fields had
understood their import, he could have avoided the need for the
performance evaluation related below.

Sounds like your the emcee of circus or something- I for one won't
bother to attend- you're quite a childish poof...

[...snip nonsense it took LB long time to write in 10ms...]

This is the first of several indicators of the problem.

[...snip pedantic, obvious , and non-informational trash...]

The schematic to which John refers does not have...

Looks like you spent quite a bit of time verifying the obvious- heheh-
good, waste your time. It was obvious to quite a few people that
something would have to be seriously wrong for that circuit to be
stable- but the pseudo-intellectual that you are was not quite sure,
running a multitude of simulations, measuring waveform types, amplitudes
and frequencies, doing parameter sweeps etc...what a waste of time piss
bucket you are...LOL.

One gets the distinct idea that John would just as soon not see his
circuit in my hands. Strange for something titled "Bite the dust,
asshole". Maybe he thought the title alone would carry the day.

You have "bit the dust" because you wasted a lot of time trying to put
John down with your downloading, simulating, and writing up that
specious non-informational critique...But ya' know what? As usual there
was not a damned word about how to salvage the circuit, not a damned
word about the main contributors to oscillation, not a damned word of
*insight* about anything. You simply reveal yourself to be a dull,
uninteresting troll CAD operator.

The only reason for the 5% uncertainty was that I imagined John might
be able to find some set of extreme circuit values which, given the
perfectly insulating upper MOSFET gate, would shift the loop dominant
pole from the op-amp to the common source amplifier while also
greatly reducing its transconductance. I was not sure whether he
knew enough to devise then execute that approach, or whether it could
be made to work, hence my 5% reservation.

Nah- that's bs. You were uncertain because your experience is limited,
you do not have much intelligence to begin with, and you know all too
well that you make mistakes. Only a rank amateur and incompetent would
react the way you have to this elementary circuit- that is obvious to
all who read it. So JF has helped expose yet another blatant fraud in
your presentation of yourself. Thnx, John

[...snip a bunch of pedantic questions you can't answer and other bits
and pieces of trite garbage...]

 

[Fred Bloggs]

John Fields wrote:

On Wed, 23 Mar 2005 01:17:04 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:



The prophesy was: John's circuit "will oscillate".


---
And it did. Big deal. It's now fixed, and I can only surmise that
since you didn't have your big gums flapping something to the effect
of: "...and here's a fix that even Fields should have known about,
blah, blah, blah..."

If you can get your sorry ass over to abse and download the file you
might learn something, even though you'd never admit it.

Goodbye for now.

Right- it becoming clearer all the time, Brasfield is a little fake and
a big incompetent. Have you noticed another of troll tricks- that is the
"let's review the sequence of events" dialogue, where the deceitful
maggot, incompetent, and p.o.s. then inserts his revision of the thread
history, trying desperately to reset the scorecard and be the "winner".
No question about it, Brasfield is a little swindling fake and
fraud....notice the worm never came close to putting values in his fake
circuit, and he definitely stopped responding once the OP put him down
about- having many fundamental operating details wrong... no mention of
that in his "let's review the sequence of events" dialogue....pathetic.

 

[Fred Bloggs]

John Fields wrote:

On Tue, 22 Mar 2005 10:17:27 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:



You're welcome. I've set followups to sci.electronics.basics
because this kind of discussion is more topical there.


---
Goddam, but you're a pompous little chickenshit fuck, aren't you? Who
the hell died and left you as the arbiter of what should go where?

I know- look at the chickensh_t run!- he doesn't want his sorry-assed
sh_t excuse of a circuit shown around here- and the incredible thing is
that these juvenile punk OPs buy into his sh_t.

 

[Fred Bloggs]

Fred Bloggs wrote:

John Fields wrote:

On Tue, 22 Mar 2005 10:17:27 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:



You're welcome. I've set followups to sci.electronics.basics
because this kind of discussion is more topical there.



---
Goddam, but you're a pompous little chickenshit fuck, aren't you? Who
the hell died and left you as the arbiter of what should go where?


I know- look at the chickensh_t run!- he doesn't want his sorry-assed
sh_t excuse of a circuit shown around here- and the incredible thing is
that these juvenile punk OPs buy into his sh_t.

....second thought-looks like his little sci.electronics,basics sanctuary
is about to be invaded with some idol smashing...

 

[Winfield Hill]

Michael Noone wrote...

Hi - can somebody tell me if this circuit would work, or if it would come
even close to working?
https://netfiles.uiuc.edu/mnoone/www/Linearamplifierwithfet.jpg
The circuit is supposed to amplify a 0-10V signal to 0-400V.

Sorry, Michael, your circuit is not even close. First, you have
no load on the drain of the FET, unless you consider your feedback
resistor to be a load. Second, where do you apply the 400V supply,
to the Vss pin? Does Vss = -400V (normally Vss is taken to mean more
negative voltages (i.e. "sources of N-channel FETs) and Vdd is taken
to mean more positive voltages (drains)? No, the BSS92 is a p-type
FET, so Vss must be +400V. Oops, Third, the FET will blow its brains
out when you turn on the 400V because 1) you exceeded the +/-20V Vgs
rating, and 2) you exceeded the 240V Vds rating. Fourth, after solving
the drain-connection problem, and the excess voltage problems, you'll
find the feedback network is unstable, because it has too much loop
gain, and too much phase shift. Fifth, you'll learn FET capacitances
and load capacitances (e.g. a connecting coax cable) are a big issue,
so you'll need an active way to both pull up and pull down the output.
In general, Sixth, with MOSFETs, you'll also need a way to isolate the
opamp from driving the high gate capacitance of typical high-voltage
power MOSFETs. Even the BSS92, which is not a true high-voltage power
MOSFET, has nearly 200pF of gate capacitance at low voltages (see the
Siemens datasheet page 7).

Seventh, Spice is NOT a good way to evaluate this type of circuit,
in part because once you find a good 500V FET, and if you investigate
sufficiently, you'll find that the power MOSFET spice models are very
poor for low-current-density linear operation. They're designed for
analyzing switching performance. And most are rather poor at that.

Spice is also not a good way to study such circuits because you'll
learn very little, compared to studying MOSFET linear operation, and
applying simple analytical circuit-operation calculations. I suggest
you get a copy of our book, The Art of Electronics, and read chapter 3.
In it you'll also find an example of a high-voltage FET amp that works.


--
Thanks,
- Win

 

[Fred Bloggs]

John Fields wrote:

On Tue, 22 Mar 2005 10:17:27 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:



You're welcome. I've set followups to sci.electronics.basics
because this kind of discussion is more topical there.


---
Goddam, but you're a pompous little chickenshit fuck, aren't you? Who
the hell died and left you as the arbiter of what should go where?

Looking at SEB, the sorry-assed fake and windbag still has not responded
to the OPs criticism of his pathetic excuse for a "solution" circuit
without a single component specified. Given Brasfield's ignorance, it
may require hundreds of hours of mindless simulation of anything he
dares to specify- it should also be clear by now that the fake doesn't
have much of a knowledge base when it comes to components- if that isn't
a giveaway that he's 100% mouth with absolutely no action I don't know
what is. But he seems to be impressing members of the pompous,
pseudo-sophisticated, windbag clique of self-appointed authorities on
SED. Isn't that telling....And the fraud is most likely suckering the
juvenile punk OPs with that totally fake Socratic style- it is fake
because Socrates used it to actually steer the dialogue to a
pre-determined goal, whereas Brasfield uses it to go nowhere, just a lot
of dodging, pompous pseudo-intellectual language, used to conflate the
issues and make himself look smart to the lesser educated people. Quite
telling that zero and reject is so desperate for esteem that he stoops
to that level of abuse.