D
David Brown
Guest
On 26/10/2010 23:51, Joe Pfeiffer wrote:
sane person would do that).
ms cycle. Even with USB 2.0 (as used by some faster FTDI chips) runs on
a 0.1 ms cycle. This means that any time you need to read a port then
set some outputs based on the inputs, you have an absolute minimum of
0.2 ms latency - three orders of magnitude too high for an eprom
emulator. For proper emulation of the signal sequencing, you would need
several read-write cycles making it even worse.
and too slow here. Even using a decent small micro like an AVR, you
couldn't emulate an eeprom at more than about 1-2 MHz. And if you have
a chip that is fast enough, it is difficult to get consistent timings.
A much better idea is to use a small programmable logic device with a
ram chip and a USB connection. You don't need much - a 128 macrocell
PLD would be enough if you use an FTDI chip for the usb connection. Or
you could buy one of FTDI's modules with a Cylone FPGA - it's overkill,
but easily available and ready-made.
Rubbish, unless you are doing bare-metal programming on the PC (and noAhem A Rivet's Shot<steveo@eircom.net> writes:
On Tue, 26 Oct 2010 19:19:29 +0200
"F. Bertolazzi"<TOGLIeset@MAIUSCOLEtdd.it> wrote:
Ahem A Rivet's Shot:
These days you could probably add a set of ports to a PC, wire
them to a DIP plug and emulate the EPROM in software complete with the
timing characteristics.
I definitely don't think so. A PC must handle lots of unpredictable
interrupts that will skew the timings.
They can all be turned off.
sane person would do that).
No, it will not work - USB 1.1 (as used by most FTDI chips) runs on a 1On the other hand, using a parallel
FTDI chip...
Sure that'll work.
ms cycle. Even with USB 2.0 (as used by some faster FTDI chips) runs on
a 0.1 ms cycle. This means that any time you need to read a port then
set some outputs based on the inputs, you have an absolute minimum of
0.2 ms latency - three orders of magnitude too high for an eprom
emulator. For proper emulation of the signal sequencing, you would need
several read-write cycles making it even worse.
That's almost right - but drop the "PIC". They are horrible devices,This is definitely a project where the right way to do it would be to
have a little PIC managing low-level timing, and talking to the PC over
USB.
and too slow here. Even using a decent small micro like an AVR, you
couldn't emulate an eeprom at more than about 1-2 MHz. And if you have
a chip that is fast enough, it is difficult to get consistent timings.
A much better idea is to use a small programmable logic device with a
ram chip and a USB connection. You don't need much - a 128 macrocell
PLD would be enough if you use an FTDI chip for the usb connection. Or
you could buy one of FTDI's modules with a Cylone FPGA - it's overkill,
but easily available and ready-made.