Timer circuit help

In article <i28bq011o8jt5i1g4nvk3bphgul7p0o008@4ax.com>,
Terry Pinnell <terrypinDELETE@THESEdial.pipex.com> wrote:
kensmith@green.rahul.net (Ken Smith) wrote:

In article <spp9q0tc5s1c23vm3bh42til2l4h25qn92@4ax.com>,
Terry Pinnell <terrypinDELETE@THESEdial.pipex.com> wrote:
[....]

I'm waiting for my prototype power supply to explode in flames, so I have
a few minutes.

Slow the input way down so you are sure the circuit has done its full bit
before you take the input low again.

Not sure I follow you; don't you mean speed it up? Anyway, it's not an
issue in my simulation. And the input has to be fixed in frequency, in
order to deliver ~ 6 Hz output pulses.

Thats not the "input" as I was using the term. I was refering to the OP's
input signal.

T1 T2
----------------------------------
Input ------ ------------

--- --- ----------------------
Output ------ --- --- ------------


If you slow the input waveform down so that the time T1 to T2 is 10
seconds, you will be less confused. Currently, you have the Input going
low before the circuit is finished acting.

I quite often am, Ken, but don't think that's true here! I think you
will be less confused if you look at the simulation screenshot to
which I've been referring
http://www.terrypin.dial.pipex.com/Images/PulserUsing4020-2.gif
Ok, I'm looking at it. I assume that U1B_4 is the output that the OP
wanted.

There you see a total duration of about 8 s. That covers nearly 3 full
cycles of IN. Each has H=2s and L=1s.
Ok, that is the OP's input.

The simulated output is the above waveforms.

That's true only at certain settings of clock and IN signal. That in
turn depends on component values, which was my point about a schematic
and observed/simulated output being useful.
If the INPUT signal returns low before the OUTPUT has finished its
waveform, the output is exactly what you deserve in that case. If there
is not enough time for the required number of pulses to happen, the OUTPUT
will be cut short. There is nothing you can do about that given the OPs
requirements. The OUTPUT must be low when the INPUT is low.


--
--
kensmith@rahul.net forging knowledge
 
Ken Smith wrote:

The schematic looks right to me. It isn't as good as my circuit but I'll
explain whats going on here.
Right- the 4060 uses only one small timing capacitor and this can be
selected to be a cheap readily available temperature stable- also it has
negligible turn on asymmetry- it's definitely the better circuit. The
555 ckt is just another application for this do-everything component.
 
In article <b50cq0930cu504q7o4mhmrha8a8sgooqqu@4ax.com>,
Terry Pinnell <terrypinDELETE@THESEdial.pipex.com> wrote:
Fred Bloggs <nospam@nospam.com> wrote:



Fred Bloggs wrote:

well- not quite:
View in a fixed-width font such as Courier.

.
.
. +--------+-------------+-------------+--------+
. | | | | |
. | | | | |
. | | +-------------------------------> OUT
. | | | | | |
. | | | | | |
. | | | | +-----------------------+
. | | | | | | | |
. | | | \ | | | |
. | +----------+ | 2R/10 | | +----------+ |
. | | VDD | | \ | | | VDD | |
. | | | | / | | | | |
. | | | | | | | | | |
. IN>--+--|RST OUT|----+------|>|-----+ +--|RST OUT| |
. | | | | | | | | | |
. | | LMC555 | \ +---+ | \ | LMC555 | |
. | | | R | | | 1.5R | | |
. | | | \ - | | \ | DIS|---+
. | | | / v | | / | |
. | | | | - | | | | |
. | | THR|----+---+-------+ +-----|THR |
. +--+ | | | | | | |
. | | | TRG|----+ +----------+-----|TRG |
. \ | | | | | | | | |
. R/10 | | | | | | | | |
. \ | | GND | === | \ === | GND |
. / | +----------+ |C | R/10 |C +----------+
. | | | | | \ | |
. | +-|<|----|---------|---+ / | |
. | | | | | |
. GND>-+-----------+---------+-------+------+-----------+
.
.
.
.
. 1.4 x RC= 1/6 => R=120K C=1uF
.
. Then R/10=12K and 2R/10=24K and 1.5R=180K
.
. All diodes 1N914A
.
.
Are you sure about that schematic? Is this the 'dual 555 chopped ramp
pulse counter' circuit you describe in your more recent post
news:41A343E4.1070203@nospam.com ? In that you say "...the first 555
is a standard 6Hz astable...", but that LH 555 above doesn't look like
a standard to me. For example, where is the upper resistor, from
Discharge (pin 7) to Vcc? But even if I add that, so far I've been
unable to get it simulating.
The schematic looks right to me. It isn't as good as my circuit but I'll
explain whats going on here.


Both 555s work like this:

If you pull "RST" low, "Q" goes low and "DIS" shorts to ground. The
overrides all other inputs.


If you pull "TRG" below 1/3 VCC, the "Q" goes high and the "DIS" turns
off.


If you pull "THR" above 2/3 VCC, the "Q" goes low and the "DIS" turns on.

Take a look at just the left 555. Ignore the diodes for the minute.
Notice that "Q" feeds back to both "TRG" and "THR" via an RC delay.

When "Q" is high the RC will charge up towards 2/3 VCC. At that point
"THR" passes 2/3 VCC and Q goes low. For a while the RC will discharge
down towards 1/3 VCC. At that point "TRG" goes below 1/3 VCC so "Q" goes
high again.

Now consider what you can do by hooking the "DIS" of another 555 to the
capacitor. The "DIS" can force the capacitor to remain low inspite of the
current through the resistor. This will stop the oscillation and force
the "Q" to remain high.


Now look at the right 555. Its "TRG" and "THR" are hooked to a capacitor.
This capacitor is charged up through a resistor and diode in series from
the "Q" of the left 555. Only when the "Q" of the left 555 is high does
the capacitor charge up.

When the "THR" of the left 555 passes 2/3Vcc the "Q" goes low and the
"DIS" turns on. At this point the left 555 stops the oscillations of the
right 555.





--
--
kensmith@rahul.net forging knowledge
 
In article <41A6269E.7090608@nospam.com>,
Fred Bloggs <nospam@nospam.com> wrote:
Ken Smith wrote:



The schematic looks right to me. It isn't as good as my circuit but I'll
explain whats going on here.

Right- the 4060 uses only one small timing capacitor and this can be
selected to be a cheap readily available temperature stable- also it has
negligible turn on asymmetry- it's definitely the better circuit. The
555 ckt is just another application for this do-everything component.

Well yeah but more importantly, I designed it so obviously it has to be
the better design.

The 555 circuit is more educational so it is a very good design to discuss
with people who are just learning. The 4060 circuit is so simple that it
teaches very little.


--
--
kensmith@rahul.net forging knowledge
 
In article <bdhcq0h44lamsrsca08gi2hmn4s9poaf6e@4ax.com>,
Terry Pinnell <terrypinDELETE@THESEdial.pipex.com> wrote:
[...]

Thanks for stepping me through that. But I'm darned if I can get it
simulating with CM. I've either slipped up somewhere in the schematic,
or neither of CM's tricky 555 models are obliging. I'm packing it in
for now. Here's my schematic: spot the mistakes!

If CM vexes you so, perhaps you should stop using it.

http://www.terrypin.dial.pipex.com/Images/PulserFB-NOSIM.gif

IIRC, the VCC of the 555s is also connected to the INPUT in freds version.
This is haw he ensures the right startup conditions.


--
--
kensmith@rahul.net forging knowledge
 
Fred Bloggs <nospam@nospam.com> wrote:

Ken Smith wrote:
In article <bdhcq0h44lamsrsca08gi2hmn4s9poaf6e@4ax.com>,
Terry Pinnell <terrypinDELETE@THESEdial.pipex.com> wrote:
[...]


Thanks for stepping me through that. But I'm darned if I can get it
simulating with CM. I've either slipped up somewhere in the schematic,
or neither of CM's tricky 555 models are obliging. I'm packing it in
for now. Here's my schematic: spot the mistakes!



If CM vexes you so, perhaps you should stop using it.


http://www.terrypin.dial.pipex.com/Images/PulserFB-NOSIM.gif



IIRC, the VCC of the 555s is also connected to the INPUT in freds version.
This is haw he ensures the right startup conditions.



Well- he has that R5/R3 diode part screwed up, shunting C1 with R3-
guess that's my fault too...
That's the one! Thank you. Now gives the requisite output, 3 pulses.

--
Terry Pinnell
Hobbyist, West Sussex, UK
 
In article <41A74F19.3040100@nospam.com>,
Fred Bloggs <nospam@nospam.com> wrote:
[...]
As you see, a minor flaw in this clever circuit is the usual
inconsistency in a 555 astable's first pulse;

The OFF times are identical, and the difference in ON times is
imperceptible.
Besides, it is really-really easy to fix. See my reply to his post.


Arguably more serious, the circuit is intolerant about cap values. It
fails if the difference in values between C1 and C2 is above about
13%.

Once again- more of your pseudo-analysis that you can't make any sense
of- the two-packs of metal film or X7R ceramics at RS rarely differ by
more than 5%.
Besides, if you use 5% capacitors, 13% isn't going to happen even with
mixed batches.


--
--
kensmith@rahul.net forging knowledge
 
On Sat, 20 Nov 2004 17:40:08 GMT, Ken Moffett <KLMoffett@mn.rr.com>
wrote:

Terry Pinnell wrote:

"petrus bitbyter" <p.kralt@reducespamforchello.nl> wrote:

A 555 is a timer and it can only be used for timing in this problem i.e.
producing a 12Hz clock. Except for the 555 you will need about six other 12V
(CMOS) packages to complete a full functioning circuit.

Seven chips? Far too complex, as you see from my 3-chip solution just
posted!

--
Terry Pinnell
Hobbyist, West Sussex, UK

Seven chipps?....three chips?.... I did it with one 4093 Quad Schmidt
NAND. I'll post it on alt.binaries.schematics.electronic
---
According to what the OP posted:

Input:
____________________________
_____| |___........

Output:
_ _ ____________________
_____| |_| |_| |___........

^ 3-4 pulses 50% duty cycle ~6 Hz


I don't think your circuit will work because it's not guaranteed to
stop during the high portion of an output pulse.

--
John Fields
 
Terry Pinnell wrote:
Fred Bloggs <nospam@nospam.com> wrote:



Terry Pinnell wrote:


Are you sure about that schematic? Is this the 'dual 555 chopped ramp
pulse counter' circuit you describe in your more recent post
news:41A343E4.1070203@nospam.com ? In that you say "...the first 555
is a standard 6Hz astable...", but that LH 555 above doesn't look like
a standard to me. For example, where is the upper resistor, from
Discharge (pin 7) to Vcc? But even if I add that, so far I've been
unable to get it simulating.


Why don't you surprise yourself and enter the schematic as originally
shown without your changes. The standard CMOS 555 50% astable does not
use the DIS pin for discharge.


Firstly, as I said, I only changed it after failing to get your
version working.
I find that amazing because my quick simulation worked immediately-
using the TLC555.

Secondly, I can point to a dozen sources which contradict you. For
example, the datasheet at
http://www.semiconductors.philips.com/acrobat_download/datasheets/ICM7555_ICM7555I_ICM7555C_1.pdf
shows the 'standard astable' configuration. It's the one I've used for
years, and the Discharge pin *is* used.

But I see you are now specifying "50%" (which I accept is arguably
implicit in the requirement, but wasn't obvious to me from your
earlier post: "...the first 555 is a standard 6Hz astable..."). So I
hope we can agree that at best it's a matter of subjective opinion. I
would say the standard for a *close* to 50/50 astable is the
'standard' configuration virtually all the datasheets describe, i.e.
like the Philips one above, using a low upper R. Therefore I suppose
what you call 'standard' I would call 'special', namely the version
that doesn't use pin 7, and which has the merit of delivering
*exactly* 50/50. But if that is indeed the one you mean, shouldn't
your circuit have a resistor from OUT to Vcc?

Anyway, all that's a side issue. As I said, using your 'special
standard', I cannot get it working. I've stared at it a lot, and it
*seems* to correctly represent your ASCII drawing. (That's the latest
of the three you posted, correcting your earlier mistakes.) But I'll
take a harder look and see if I can find any slips. I'll publish it as
well if I get time after dinner.
Well- you go ahead and assume a position of superiority if that helps
your ego- and try to avoid thinking about the fact that you would NEVER-
and I mean NEVER- conceive of this simple circuit in a MILLION YEARS.
Keep studying it - and just maybe-in a few weeks time- it will be become
clear to you.
 
On 21 Nov 2004 08:08:20 -0800, sprintracer@gmail.com (Robo) wrote:

cbarn24050@aol.com (CBarn24050) wrote in message news:<20041120040014.08392.00000914@mb-m04.aol.com>...

Easy enough with 555, but you will need 2 of them. The modern way is to use a
micro, as you will need to learn how to use them eventually you might as well
start now.


You guys are right, I need to learn micros (for my next project :) ).
Any good sites sites with programmer plans and software? Anyone
have preference for either PICs or AVRs?
---
I like Freescale (Motorola...)

http://www.freescale.com/webapp/sps/site/homepage.jsp?nodeId=016246

--
John Fields
 
John Fields <jfields@austininstruments.com> wrote:

On Sat, 20 Nov 2004 17:40:08 GMT, Ken Moffett <KLMoffett@mn.rr.com
wrote:

Terry Pinnell wrote:

"petrus bitbyter" <p.kralt@reducespamforchello.nl> wrote:

A 555 is a timer and it can only be used for timing in this problem i.e.
producing a 12Hz clock. Except for the 555 you will need about six other 12V
(CMOS) packages to complete a full functioning circuit.

Seven chips? Far too complex, as you see from my 3-chip solution just
posted!

--
Terry Pinnell
Hobbyist, West Sussex, UK

Seven chipps?....three chips?.... I did it with one 4093 Quad Schmidt
NAND. I'll post it on alt.binaries.schematics.electronic

---
According to what the OP posted:

Input:
____________________________
_____| |___........

Output:
_ _ ____________________
_____| |_| |_| |___........

^ 3-4 pulses 50% duty cycle ~6 Hz


I don't think your circuit will work because it's not guaranteed to
stop during the high portion of an output pulse.
I got around to drawing and simulating Ken Moffett's circuit this
afternoon. It doesn't seem to suffer the flaw you raised above,
although it does produce 'erratic' pulses at some settings.

http://www.terrypin.dial.pipex.com/Images/Pulser-KF-1.gif

--
Terry Pinnell
Hobbyist, West Sussex, UK
 
Ken Smith wrote:
In article <bdhcq0h44lamsrsca08gi2hmn4s9poaf6e@4ax.com>,
Terry Pinnell <terrypinDELETE@THESEdial.pipex.com> wrote:
[...]


Thanks for stepping me through that. But I'm darned if I can get it
simulating with CM. I've either slipped up somewhere in the schematic,
or neither of CM's tricky 555 models are obliging. I'm packing it in
for now. Here's my schematic: spot the mistakes!



If CM vexes you so, perhaps you should stop using it.


http://www.terrypin.dial.pipex.com/Images/PulserFB-NOSIM.gif



IIRC, the VCC of the 555s is also connected to the INPUT in freds version.
This is haw he ensures the right startup conditions.
Well- he has that R5/R3 diode part screwed up, shunting C1 with R3-
guess that's my fault too...
 

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