J
John Larkin
Guest
On Sun, 7 May 2023 08:00:22 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:
I wonder how real that is. The grounds around the chip aren\'t really
zero ohms to pcb ground.
<langwadt@fonz.dk> wrote:
søndag den 7. maj 2023 kl. 01.16.17 UTC+2 skrev Phil Hobbs:
On 2023-05-06 16:55, John Larkin wrote:
On Sat, 6 May 2023 13:18:18 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:
lørdag den 6. maj 2023 kl. 21.52.56 UTC+2 skrev John Larkin:
On Sat, 6 May 2023 10:22:38 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:
lørdag den 6. maj 2023 kl. 17.56.04 UTC+2 skrev John Larkin:
On Sat, 6 May 2023 16:25:19 +0100, l...@poppyrecords.invalid.invalid
(Liz Tuddenham) wrote:
John Larkin <jla...@highlandSNIPMEtechnology.com> wrote:
Imagine a chassis with up to eight plugin boards. The chassis has a
pair of PWM controlled fans.
https://www.dropbox.com/s/8ubv5if7cbnsjzn/P940-8_front.jpg?raw=1
Each board will have a thermistor to sense board temperature. If any
board thinks it\'s too hot, it asks the fan controller to jog the fan
speeds up a notch. If nobody requests more air, the controller jogs
them down. That will work.
But I have a board with eight channels that can each get hot. There\'s
no place on the board that represents the worst-channel temperature. I
only have two available ADC channels so I can\'t use eight thermistors.
But thermistors are radically nonlinear. If I parallel four
thermistors into each ADC channel, the hottest of the four will
dominate. That should work well enough.
Some sort of diode thing might select the hottest thermistor, but
paralleling is easy.
Use 1N4148 (or equivalent) diodes in parallel and a constant feed of
1mA; the hottest one is the only one you are interested in and that one
will determine the voltage drop across the whole circuit. I did exactly
this with the thermal protection of a large amplifier where each output
transistor had its own heatsink.
That would behave similar to the parallel thermistors. The diode drops
would be about -2 mV per degree c and the current per diode would be
about 60 mV per decade. The result is a weighted temperature average.
Thanks for the suggestion. We have lots of single and dual
surface-mount diodes. Dual would double the signal.
maybe scan by grounding each diode in turn with an FPGA output?
Version 4
SHEET 1 920 820
WIRE 192 16 32 16
WIRE 464 16 272 16
WIRE 640 16 464 16
WIRE 848 16 640 16
WIRE 32 32 32 16
WIRE 272 48 272 16
WIRE 464 48 464 16
WIRE 640 48 640 16
WIRE 272 192 272 112
WIRE 464 192 464 112
WIRE 640 192 640 112
WIRE 272 304 272 272
WIRE 464 304 464 272
WIRE 464 304 272 304
WIRE 640 304 640 272
WIRE 640 304 464 304
FLAG 32 112 0
FLAG 272 304 0
FLAG 848 16 Vout
SYMBOL diode 256 48 R0
WINDOW 123 22 83 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMATTR Value2 temp={T}
SYMBOL res 176 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 50k
SYMBOL voltage 32 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL diode 448 48 R0
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL voltage 272 176 R0
WINDOW 3 -5 161 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(3 0 0 1u 1u 1m 3m)
SYMBOL diode 624 48 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL voltage 464 176 R0
WINDOW 3 -5 161 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(3 0 1m 1u 1u 1m 3m)
SYMBOL voltage 640 176 R0
WINDOW 3 -5 161 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(3 0 2m 1u 1u 1m 3m)
TEXT -2 296 Left 2 !.tran 0 10m 1u
TEXT 208 -200 Left 2 !.step param T 25 100 5
LT Spice aborts that, \"unknown syntax\" error.
weird, I just tried it and it works here
https://imgur.com/a/ZKWEVur
Found it. There were three strange \"blank\" lines at the end of the
.asc that it didn\'t like.
That\'s sneaky, using the diodes as their own mux.
In the early \'90s, I built a diffraction-based sensor as an online
monitor for post-exposure bake in semiconductor lithography that worked
like that. It had seven 1 x 3 inch solar cells arranged in a cone (like
a poker hand, but 360 degrees).
All the cathodes were connected to a TIA together, and the anodes were
grounded one at a time, using a zero-power PAL with tri-state outputs.
(A PALCE22V10Z, iirc.) It had to be 3-state, because a logic high would
have forward-biased the solar cells. The photocurrent was pretty small,
so even a 1990 CMOS output resistance was negligible.
A normal PAL might not have worked, even in 3-state, because their low
output levels weren\'t that well controlled.
Lasse\'s suggestion is a bit different because the selected diode is
forward-biased, so a totem-pole output would be OK as long as it goes to
0V accurately enough.
Dunno about FPGAs--do their outputs really go to ground like that?
here\'s the plot of the Artix7 LVCMOS33 pull down from the ibis file (min/max/typ)
https://imgur.com/a/qFTQwNg
I wonder how real that is. The grounds around the chip aren\'t really
zero ohms to pcb ground.