Quotient Sync Filter Better Than Lock In

[Ace0f_5pades]

On Aug 5, 11:53 pm, N0S...@daqarta.com (Bob Masta) wrote:

On Tue, 4 Aug 2009 19:13:32 -0700 (PDT), Bret

Cahill <BretCah...@peoplepc.com> wrote:

A lot of conventional lock in applications only sample part of _one_
cycle _anyway_.

Huh?  All the lock-ins I have seen use the full
cycle... that's the referene frequency.  The time
constant controls the number of cycles used.

The phase-locked amplifier with reference multiplication is better
both on signal recovery (gain) and noise rejection.

The "aquisition time" of a conventional lock in is much too long in
many situations.

I'm beginning to wonder if maybe you are confusing
two different aspects of lock-in amps.
"Acquisition time" includes the time for the
phase-locked loop in the lock-in to lock to the
signal. The time constant controls the S/N
improvement.

PLL lock time is totally unneeded if you already
have the reference signal in sin/cos phases.
I don't know the current situation, but for years
lock-in makers seemed wedded to the idea of only
using the PLL to generate the reference.  Even
when they provided a voltage-controlled reference,
it was a simple oscillator that fed into the PLL
to get sin/cos, instead of just controlling the
PLL VCO directly. Duh!  

So, if you are dismayed by long lock-in
acquisition times from a lock-in simulator, maybe
things aren't as bad as you think.  Maybe they are
just dutifully including PLL lock time in the
simulation.

Best regards,

Bob Masta

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See the way I look at it is, if you use summation convergence of its
simple root along two processing line, then isn't the signal sampling
needed reduce by the square factor thereof?, and since there are four
edges, you can reduce the sampling by a further 4 times. or have the
same sampling time, and achieve an extremely high signal definition.

and since any transition time in the clocking signal = 0 ; the result
of instantiating two processing lines into 1 coherent perfect
(limit "iff" (sync_difference >transition_max) is true) instantaneous
transition square wave.

do you see what I mean Bret?

 

[Ace0f_5pades]

On Aug 6, 10:51 am, Ace0f_5pades <m4de...@hotmail.com> wrote:

On Aug 5, 11:53 pm, N0S...@daqarta.com (Bob Masta) wrote:



On Tue, 4 Aug 2009 19:13:32 -0700 (PDT), Bret

Cahill <BretCah...@peoplepc.com> wrote:

A lot of conventional lock in applications only sample part of _one_
cycle _anyway_.

Huh?  All the lock-ins I have seen use the full
cycle... that's the referene frequency.  The time
constant controls the number of cycles used.

The phase-locked amplifier with reference multiplication is better
both on signal recovery (gain) and noise rejection.

The "aquisition time" of a conventional lock in is much too long in
many situations.

I'm beginning to wonder if maybe you are confusing
two different aspects of lock-in amps.
"Acquisition time" includes the time for the
phase-locked loop in the lock-in to lock to the
signal. The time constant controls the S/N
improvement.

PLL lock time is totally unneeded if you already
have the reference signal in sin/cos phases.
I don't know the current situation, but for years
lock-in makers seemed wedded to the idea of only
using the PLL to generate the reference.  Even
when they provided a voltage-controlled reference,
it was a simple oscillator that fed into the PLL
to get sin/cos, instead of just controlling the
PLL VCO directly. Duh!  

So, if you are dismayed by long lock-in
acquisition times from a lock-in simulator, maybe
things aren't as bad as you think.  Maybe they are
just dutifully including PLL lock time in the
simulation.

Best regards,

Bob Masta

              DAQARTA  v4.51
   Data AcQuisition And Real-Time Analysis
             www.daqarta.com
Scope, Spectrum, Spectrogram, Sound Level Meter
           FREE Signal Generator
        Science with your sound card!

See the way I look at it is, if you use summation convergence of its
simple root along two processing line, then isn't the signal sampling
needed reduce by the square factor thereof?, and since there are four
edges, you can reduce the sampling by a further 4 times.  or have the
same sampling time, and achieve an extremely high signal definition.

and since any transition time in the clocking signal = 0 ; the result
of instantiating two processing lines into 1 coherent perfect
(limit "iff" (sync_difference >transition_max) is true)
 instantaneous-transition**edit** square wave.

do you see what I mean Bret?

this may be the case @the cost of a few extra processing protocols

 

[Bret Cahill]

In reality there is noise and dividing AC signals won't work because
the denominator will approach zero with noise in the numerator.  The
quotient then becomes undefined, +/- infinity.  In fact, the quotient
would become undefined at 0 / 0 even without any noise.

Instead of sampling away from the zero intersections, as initially
suggested as a solution, rectify both signals along with their noise
components _then_ divide.

It sounds like you are looking for a single constant value
from two signals, the proportionality constant.  In that
case, instead of the mean of the quotient, best approximation
of the value is the weighted average

integral( W * X/Y)/integral(W)

where W is a positive definite weight function equal to 1/sigma-
squared
of the X/Y value; in the case of white noise,
X +/- dX  and Y +/- dY
this comes to
W =  ( X**2 Y**2 dX**2  + X**4 dY**2)/ Y**6

The error squared term is probably what kills the quotient sync filter
for high noise levels.

At noise levels < the signal it should work.

After rectification or multipling both signals by the ref, the
denominator and maybe the numerator can be smoothed just enough to
always be a certain amount above zero.

After division the quotient of the signal will be mostly DC. Little
more than the noise needs to be smoothed after that.

I'm not aware of any important uses of a lock-in amplifier
that use less than one cycle of the reference signal; all the
filtering theorems apply only to single or multiple cycles of
the reference.  You can track/hold at every downgoing zero
crossing if you want to eliminate the 2* F ripple, but
an integrator will swamp it after a few hundred cycles regardless.