Guest
On Thu, 5 Sep 2019 13:03:21 -0400, bitrex <user@example.net> wrote:
Neither mercury delay lines nor later on core do not care, if it is
data or instruction. After all, a core memory read is actually
read/modify/write cycle. Only when using true (E/P)ROMs in which the
chips are programmed outside the computer and the program is 'loaded'
by inserting these chips into sockets, there are some benefit but of
course this can be don also in von neumans.
There are some advantages of using separate address spaces, one is
that since the same address can appear twice, you may save up to one
address bit at he cost of separate instructions for different address
spaces. Also the word length for D and I space can be different e.g.
the I-space might be 13 bits to better suite the instruction set with
D-space of 8 or 16 bits.
Unfortunately different word length also makes loading constants from
I space to D space becomes harder needing special instructions,
possibly with sign or zero extend.
If you intend to load programs from secondary storage, such as disks,
at least the program loader must be able to write to I-space. The same
applies of course to implementing virtual memory paging, which becomes
nastier with dissimilar word lengths.
von neumann architecture was a compromise to make computation cheaper
with the vacuum tubes and relays available at the time that has
persisted to the present day
Neither mercury delay lines nor later on core do not care, if it is
data or instruction. After all, a core memory read is actually
read/modify/write cycle. Only when using true (E/P)ROMs in which the
chips are programmed outside the computer and the program is 'loaded'
by inserting these chips into sockets, there are some benefit but of
course this can be don also in von neumans.
There are some advantages of using separate address spaces, one is
that since the same address can appear twice, you may save up to one
address bit at he cost of separate instructions for different address
spaces. Also the word length for D and I space can be different e.g.
the I-space might be 13 bits to better suite the instruction set with
D-space of 8 or 16 bits.
Unfortunately different word length also makes loading constants from
I space to D space becomes harder needing special instructions,
possibly with sign or zero extend.
If you intend to load programs from secondary storage, such as disks,
at least the program loader must be able to write to I-space. The same
applies of course to implementing virtual memory paging, which becomes
nastier with dissimilar word lengths.