J
John Larkin
Guest
On Thu, 5 Sep 2019 10:45:24 -0700 (PDT), j.ponte@student.utwente.nl
wrote:
Floating gate on the first jfet?
wrote:
Floating gate on the first jfet?
P
piglet
Guest
On 05/09/2019 18:51, j.ponte@student.utwente.nl wrote:
Thanks. This new drawing will help, I think you also missed the 22Meg
gate bias resistor on the first fet, the resistor (I can't see the
value) on the 2nd bjt emitter to ground, and the C & R on the 2nd fet gate.
The uA709/LM709 was my first op-amp and usually went around with a
compensation 1.5k and couple-nF series that are on the board but not in
your sketches. You probably don't need to copy them unless for completeness.
piglet
Thanks. This new drawing will help, I think you also missed the 22Meg
gate bias resistor on the first fet, the resistor (I can't see the
value) on the 2nd bjt emitter to ground, and the C & R on the 2nd fet gate.
The uA709/LM709 was my first op-amp and usually went around with a
compensation 1.5k and couple-nF series that are on the board but not in
your sketches. You probably don't need to copy them unless for completeness.
piglet
P
piglet
Guest
On 05/09/2019 19:28, piglet wrote:
I had another look at the teardown photos and I think the resistor from
the 2nd stage bipolar npn emitter to ground that didn't get it's colors
written on the first sketch is "red, vio, gold, silver" which would be
2.7ohm and makes sense since you want to feedback only a tiny fraction.
BTW thanks for drawing the resistors on the new drawing the US way - I
have always preferred zigzags myself!
piglet
I had another look at the teardown photos and I think the resistor from
the 2nd stage bipolar npn emitter to ground that didn't get it's colors
written on the first sketch is "red, vio, gold, silver" which would be
2.7ohm and makes sense since you want to feedback only a tiny fraction.
BTW thanks for drawing the resistors on the new drawing the US way - I
have always preferred zigzags myself!
piglet
G
George Herold
Guest
On Thursday, September 5, 2019 at 1:45:29 PM UTC-4, j.p...@student.utwente.nl wrote:
And thanks for the schematic.
Hey if you are into analog electronics and haven't read it yet the Jim Williams
collection, "Analog circuit design, art science and personalities" Is a fun
read. I think it has the P2 story by B. Pease that piglet mentioned up thread.
George H.
Same here... windows and chrome.
And thanks for the schematic.
Hey if you are into analog electronics and haven't read it yet the Jim Williams
collection, "Analog circuit design, art science and personalities" Is a fun
read. I think it has the P2 story by B. Pease that piglet mentioned up thread.
George H.
S
Steve Wilson
Guest
piglet <erichpwagner@hotmail.com> wrote:
A brilliant piece of sleuthing. I have to concede.
You are helped by the fact there is no other device like the AD310/311 in
the AD catalog. I would have expected a ceramic baseplate for better
rigidity and resistance to humidity, but I guess what looks like an early
version of FR-4 worked well enough to avoid the expense.
Your analysis has to be one of the highest level I have seen on this
newsgroup. Congratulations. I'm impressed.
Thanks
A brilliant piece of sleuthing. I have to concede.
You are helped by the fact there is no other device like the AD310/311 in
the AD catalog. I would have expected a ceramic baseplate for better
rigidity and resistance to humidity, but I guess what looks like an early
version of FR-4 worked well enough to avoid the expense.
Your analysis has to be one of the highest level I have seen on this
newsgroup. Congratulations. I'm impressed.
Thanks
S
Steve Wilson
Guest
j.ponte@student.utwente.nl wrote:
Thanks. Already conceded.
Thanks. Already conceded.
P
piglet
Guest
On 05/09/2019 10:33 pm, Steve Wilson wrote:
Yes, FR4 (or G10 or whatever) is fine when the hi-Z stuff is all on
teflon standoffs and doesn't touch the FR4
Thanks very much Steve, credit should go the carefully taken teardown
photos and schematic sketch.
piglet
Yes, FR4 (or G10 or whatever) is fine when the hi-Z stuff is all on
teflon standoffs and doesn't touch the FR4
Thanks very much Steve, credit should go the carefully taken teardown
photos and schematic sketch.
piglet
Guest
On Thursday, September 5, 2019 at 11:33:07 PM UTC+2, Steve Wilson wrote:
Wow, thanks! That's nice to hear.
>Hey if you are into analog electronics and haven't read it yet the Jim Williams
collection, "Analog circuit design, art science and personalities" Is a fun
read. I think it has the P2 story by B. Pease that piglet mentioned up thread.
Analog is absolutely my hobby and career path. I've read/scanned the book, I liked it quite a lot.
Bob Pease has an article on a single-transistor varactor-based opamp.
https://www.electronicdesign.com/analog/whats-all-one-transistor-op-amp-stuff-anyhow
His apprentice did a later piece on it which does include (unbroken) images: https://www.electronicdesign.com/analog/what-s-all-varactor-input-amplifier-stuff-anyway
I never did get around to designing one of those. I never fully understood how it works either. The varactor tank couples some signal into the base if there's a dc input, but how could that ever have a large enough influence to make a reasonable amount of gain?
Wow, thanks! That's nice to hear.
>Hey if you are into analog electronics and haven't read it yet the Jim Williams
collection, "Analog circuit design, art science and personalities" Is a fun
read. I think it has the P2 story by B. Pease that piglet mentioned up thread.
Analog is absolutely my hobby and career path. I've read/scanned the book, I liked it quite a lot.
Bob Pease has an article on a single-transistor varactor-based opamp.
https://www.electronicdesign.com/analog/whats-all-one-transistor-op-amp-stuff-anyhow
His apprentice did a later piece on it which does include (unbroken) images: https://www.electronicdesign.com/analog/what-s-all-varactor-input-amplifier-stuff-anyway
I never did get around to designing one of those. I never fully understood how it works either. The varactor tank couples some signal into the base if there's a dc input, but how could that ever have a large enough influence to make a reasonable amount of gain?
S
Steve Wilson
Guest
j.ponte@student.utwente.nl wrote:
Yes. I mentioned up thread the link is
<http://s1.nonlinear.ir/epublish/book/Analog_Circuit_Design_Art_Science_and_P
ersonalities_0750696400.pdf>
If you have not tried LTspice yet, it is invaluable. It has a steep learning
curve but there are plenty of examples all over the web and YouTube. Run into
a problem? Just google it. The trick is how to phrase the search. Check out
the Wiki at
http://ltwiki.org/index.php5?title=Main_Page
Interesting article. Someone needs to do a simple varactor front end in
LTspice that shows how it works.
Yes. I mentioned up thread the link is
<http://s1.nonlinear.ir/epublish/book/Analog_Circuit_Design_Art_Science_and_P
ersonalities_0750696400.pdf>
If you have not tried LTspice yet, it is invaluable. It has a steep learning
curve but there are plenty of examples all over the web and YouTube. Run into
a problem? Just google it. The trick is how to phrase the search. Check out
the Wiki at
http://ltwiki.org/index.php5?title=Main_Page
Interesting article. Someone needs to do a simple varactor front end in
LTspice that shows how it works.
G
George Herold
Guest
On Friday, September 6, 2019 at 6:46:02 PM UTC-4, Steve Wilson wrote:
Ahh why spice? (D = delta, the change in)
and - is goes to)
so DV-DC-DI, as the bridge unbalances,
DI depends on the modulation freq.
Well that's my thinking, and then synchronous detection with the
fet. Is the fet demodulator a V= +1, 0 thing, rather than
V= +1, -1?
We use this capacitance difference sensor, which has a similar front
end, but doesn't use magnetics, and a bridge, but a diode ring de-modulator
(there's a ton of leakage in the diode ring, and you learn about CMRR. :^)
George H.
George H.
Ahh why spice? (D = delta, the change in)
and - is goes to)
so DV-DC-DI, as the bridge unbalances,
DI depends on the modulation freq.
Well that's my thinking, and then synchronous detection with the
fet. Is the fet demodulator a V= +1, 0 thing, rather than
V= +1, -1?
We use this capacitance difference sensor, which has a similar front
end, but doesn't use magnetics, and a bridge, but a diode ring de-modulator
(there's a ton of leakage in the diode ring, and you learn about CMRR. :^)
George H.
George H.
Guest
Now I'm wondering if perhaps it uses the fact that it's running fast w.r.t. the input signal changes to have the amplitude decay or increase fast, relatively speaking, by pushing the loop gain slightly above or below the Barkhausion gain criterion.
I guess in that case the gain is mostly limited by the ratio between the oscillation frequency and the desired speed of operation (how slow the output filter is).
Guest
On Saturday, September 7, 2019 at 12:46:02 AM UTC+2, Steve Wilson wrote:
Yes, I used it as an undergrad. I still use it at home, although mostly as a way to store simulateable schematics and check my intuition. Good stuff.
I collect LTspice functions that aren't in the help file and other tricks. So far my favorite are the AKO command and using VCCS/ICVS as time-variable resistors.
If you're referring to how the bridge produces an error signal, it's quite simple. An applied voltage shifts both varactors along their C-V curves and that unbalances the bridge, just like e.g. a strain-gauge based wheatstone bridge except with an AC stimulus. The cute thing is that the AC stimulus is generated by the two windings that make up half the bridge.
Then the conversion gain is just the dC/dV slope of the varactors.
I think the simplest way to look at it is as an AM-modulator where the input is the "data signal" and the stimulus the carrier.
What I don't entirely understand about that single-transistor unit is how it makes any gain. It seems to phase-sensitively feed the AC signal out of the bridge back into the base of the transistor by using the quasi-DC input error. But why are those 330 Ohm resistors there?
I guess the change in collector voltage comes from some (presumably relatively subtle) change in oscillation amplitude due to the signal injection at the base, causing a change in Ic which modulates the IR drop of the collector resistor.
It seems extremely finicky to me, not like something that has a nice design approach.
Yes I think so. Chopping the + or - part of the waveform gives the phase sensitivity, you just lose 6dB of gain.
That sounds interesting. The diode ring acts like a set of chopper switches? Can you say a bit more about it?
Yes, I used it as an undergrad. I still use it at home, although mostly as a way to store simulateable schematics and check my intuition. Good stuff.
I collect LTspice functions that aren't in the help file and other tricks. So far my favorite are the AKO command and using VCCS/ICVS as time-variable resistors.
If you're referring to how the bridge produces an error signal, it's quite simple. An applied voltage shifts both varactors along their C-V curves and that unbalances the bridge, just like e.g. a strain-gauge based wheatstone bridge except with an AC stimulus. The cute thing is that the AC stimulus is generated by the two windings that make up half the bridge.
Then the conversion gain is just the dC/dV slope of the varactors.
I think the simplest way to look at it is as an AM-modulator where the input is the "data signal" and the stimulus the carrier.
What I don't entirely understand about that single-transistor unit is how it makes any gain. It seems to phase-sensitively feed the AC signal out of the bridge back into the base of the transistor by using the quasi-DC input error. But why are those 330 Ohm resistors there?
I guess the change in collector voltage comes from some (presumably relatively subtle) change in oscillation amplitude due to the signal injection at the base, causing a change in Ic which modulates the IR drop of the collector resistor.
It seems extremely finicky to me, not like something that has a nice design approach.
Yes I think so. Chopping the + or - part of the waveform gives the phase sensitivity, you just lose 6dB of gain.
That sounds interesting. The diode ring acts like a set of chopper switches? Can you say a bit more about it?
P
Phil Hobbs
Guest
On 9/7/19 6:06 AM, j.ponte@student.utwente.nl wrote:
I haven't looked at it yet, but it sounds like a riff off the usual
transformer-based differential capacitive position gauge. You can get
down to picometer displacement sensitivities if you don't mind waiting a
bit.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510
http://electrooptical.net
http://hobbs-eo.com
I haven't looked at it yet, but it sounds like a riff off the usual
transformer-based differential capacitive position gauge. You can get
down to picometer displacement sensitivities if you don't mind waiting a
bit.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510
http://electrooptical.net
http://hobbs-eo.com
Guest
On Saturday, September 7, 2019 at 4:49:29 PM UTC+2, Steve Wilson wrote:
Interesting, the beta seems to take an absolute nosedive below about 8nA. Pretty much the entire input current is the difference between the base currents. Is that large base current physical? I always thought low-end beta roll-off was mostly junction leakage.
I assume you would be able to get very close to the saturation current of the BJTs: the drive amplitude is only 4 thermal voltages at room temperature, so Ic would be about 6.4x higher than Is.
THat does sound like it would be the exact same setup, yes.
Interesting, the beta seems to take an absolute nosedive below about 8nA. Pretty much the entire input current is the difference between the base currents. Is that large base current physical? I always thought low-end beta roll-off was mostly junction leakage.
I assume you would be able to get very close to the saturation current of the BJTs: the drive amplitude is only 4 thermal voltages at room temperature, so Ic would be about 6.4x higher than Is.
THat does sound like it would be the exact same setup, yes.
P
piglet
Guest
On 07/09/2019 15:49, Steve Wilson wrote:
When used with overrall feedback of course the input voltage will be
essentially zero.
piglet
When used with overrall feedback of course the input voltage will be
essentially zero.
piglet
S
Steve Wilson
Guest
j.ponte@student.utwente.nl wrote:
I went ahead and made a bridge using bipolar transistor per your schematic.
It appears the input DC signal turns on either transistor as it sweeps from
- to + 200mV.
The input current is the current when the junction is forward biased. It is
in nA, not in the pA level. That is hardly electrometer (1e-14) level.
Here are the LTspice files. Please let me know if you find something wrong.
Version 4
SHEET 1 1204 680
WIRE 432 -16 352 -16
WIRE 512 -16 432 -16
WIRE 608 -16 512 -16
WIRE 432 16 432 -16
WIRE 608 16 608 -16
WIRE 352 64 352 -16
WIRE 368 64 352 64
WIRE 80 160 32 160
WIRE 208 160 80 160
WIRE 352 160 288 160
WIRE 400 160 352 160
WIRE 432 160 432 112
WIRE 432 160 400 160
WIRE 608 160 608 96
WIRE 656 160 608 160
WIRE 688 160 656 160
WIRE 720 160 688 160
WIRE 832 160 800 160
WIRE 688 176 688 160
WIRE 832 176 832 160
WIRE 32 192 32 160
WIRE 432 208 432 160
WIRE 608 224 608 160
WIRE 352 256 352 160
WIRE 368 256 352 256
WIRE 688 256 688 240
WIRE 32 288 32 272
WIRE 432 320 432 304
WIRE 512 320 432 320
WIRE 608 320 608 304
WIRE 608 320 512 320
FLAG 832 176 0
FLAG 400 160 Q1E
FLAG 512 -16 Q1C
FLAG 512 320 Q2E
FLAG 32 288 0
FLAG 80 160 Vin
FLAG 688 256 0
FLAG 656 160 R2C1
SYMBOL res 304 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 608 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(-50m 50m 0 1u 1u 4u 10u)
SYMBOL voltage 608 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(-50m 50m 0 1u 1u 4u 10u)
SYMBOL voltage 32 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(-0.2 0.2 0 10m 0 0 0 1)
SYMBOL res 816 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL cap 672 176 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL npn 368 16 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 368 208 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
TEXT 408 -104 Left 2 !.tran 0 10m 0
TEXT 408 -136 Left 2 ;'AD310 Bipolar Bridge
[Transient Analysis]
{
Npanes: 2
{
traces: 1 {524290,0,"V(vin)"}
X: ('m',0,0,0.001,0.01)
Y[0]: ('m',0,-0.24,0.04,0.24)
Y[1]: ('u',1,1e+308,2e-007,-1e+308)
Volts: ('m',0,0,0,-0.24,0.04,0.24)
Log: 0 0 0
GridStyle: 1
},
{
traces: 1 {34603012,0,"I(R1)"}
X: ('m',0,0,0.001,0.01)
Y[0]: ('n',0,-7e-008,1e-008,7e-008)
Y[1]: ('u',0,1e+308,6e-006,-1e+308)
Amps: ('n',0,0,0,-7e-008,1e-008,7e-008)
Log: 0 0 0
GridStyle: 1
}
}
I went ahead and made a bridge using bipolar transistor per your schematic.
It appears the input DC signal turns on either transistor as it sweeps from
- to + 200mV.
The input current is the current when the junction is forward biased. It is
in nA, not in the pA level. That is hardly electrometer (1e-14) level.
Here are the LTspice files. Please let me know if you find something wrong.
Version 4
SHEET 1 1204 680
WIRE 432 -16 352 -16
WIRE 512 -16 432 -16
WIRE 608 -16 512 -16
WIRE 432 16 432 -16
WIRE 608 16 608 -16
WIRE 352 64 352 -16
WIRE 368 64 352 64
WIRE 80 160 32 160
WIRE 208 160 80 160
WIRE 352 160 288 160
WIRE 400 160 352 160
WIRE 432 160 432 112
WIRE 432 160 400 160
WIRE 608 160 608 96
WIRE 656 160 608 160
WIRE 688 160 656 160
WIRE 720 160 688 160
WIRE 832 160 800 160
WIRE 688 176 688 160
WIRE 832 176 832 160
WIRE 32 192 32 160
WIRE 432 208 432 160
WIRE 608 224 608 160
WIRE 352 256 352 160
WIRE 368 256 352 256
WIRE 688 256 688 240
WIRE 32 288 32 272
WIRE 432 320 432 304
WIRE 512 320 432 320
WIRE 608 320 608 304
WIRE 608 320 512 320
FLAG 832 176 0
FLAG 400 160 Q1E
FLAG 512 -16 Q1C
FLAG 512 320 Q2E
FLAG 32 288 0
FLAG 80 160 Vin
FLAG 688 256 0
FLAG 656 160 R2C1
SYMBOL res 304 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 608 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(-50m 50m 0 1u 1u 4u 10u)
SYMBOL voltage 608 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(-50m 50m 0 1u 1u 4u 10u)
SYMBOL voltage 32 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(-0.2 0.2 0 10m 0 0 0 1)
SYMBOL res 816 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL cap 672 176 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL npn 368 16 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 368 208 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
TEXT 408 -104 Left 2 !.tran 0 10m 0
TEXT 408 -136 Left 2 ;'AD310 Bipolar Bridge
[Transient Analysis]
{
Npanes: 2
{
traces: 1 {524290,0,"V(vin)"}
X: ('m',0,0,0.001,0.01)
Y[0]: ('m',0,-0.24,0.04,0.24)
Y[1]: ('u',1,1e+308,2e-007,-1e+308)
Volts: ('m',0,0,0,-0.24,0.04,0.24)
Log: 0 0 0
GridStyle: 1
},
{
traces: 1 {34603012,0,"I(R1)"}
X: ('m',0,0,0.001,0.01)
Y[0]: ('n',0,-7e-008,1e-008,7e-008)
Y[1]: ('u',0,1e+308,6e-006,-1e+308)
Amps: ('n',0,0,0,-7e-008,1e-008,7e-008)
Log: 0 0 0
GridStyle: 1
}
}
Guest
On Saturday, September 7, 2019 at 5:40:05 PM UTC+2, piglet wrote:
Yes that's a crucial point.
What's bothering me is that about 650pA still flows in the simulation when the bridge is in balance. That's odd, either Is is ~100pA or there is leakage somewhere.
Yes that's a crucial point.
What's bothering me is that about 650pA still flows in the simulation when the bridge is in balance. That's odd, either Is is ~100pA or there is leakage somewhere.
P
piglet
Guest
On 07/09/2019 16:45, j.ponte@student.utwente.nl wrote:
You need to sit your computer on teflon standoffs
piglet
You need to sit your computer on teflon standoffs
piglet
Guest
On Saturday, September 7, 2019 at 6:05:33 PM UTC+2, piglet wrote:
Of course, how could I have forgotten :^)
On 07/09/2019 16:45, j.ponte@student.utwente.nl wrote:
On Saturday, September 7, 2019 at 5:40:05 PM UTC+2, piglet wrote:
On 07/09/2019 15:49, Steve Wilson wrote:
It appears the input DC signal turns on either transistor as it sweeps from
- to + 200mV.
The input current is the current when the junction is forward biased. It is
in nA, not in the pA level. That is hardly electrometer (1e-14) level.
When used with overrall feedback of course the input voltage will be
essentially zero.
piglet
Yes that's a crucial point.
What's bothering me is that about 650pA still flows in the simulation when the bridge is in balance. That's odd, either Is is ~100pA or there is leakage somewhere.
You need to sit your computer on teflon standoffs
piglet
Of course, how could I have forgotten :^)
S
Steve Wilson
Guest
piglet <erichpwagner@hotmail.com> wrote:
The feedback in the op's schematic does not affect the input current to the
bridge.
The feedback in the op's schematic does not affect the input current to the
bridge.