On Sun, 6 Nov 2022 16:56:02 +0000, piglet <erichpwagner@hotmail.com
wrote:
On 06/11/2022 15:03, Fred Bloggs wrote:
On Sunday, November 6, 2022 at 9:22:33 AM UTC-5, Lamont Cranston wrote:
On Sunday, November 6, 2022 at 7:22:24 AM UTC-6, Fred Bloggs wrote:
On Saturday, November 5, 2022 at 8:59:49 PM UTC-4, Lamont Cranston wrote:
Years ago on this group, someone worked this circuit out for me and I have finally built it. It has two problems. The input impedance is about 30k? not 500M?, and it rolls of way to early.
I may have created the problems, I don\'t have the FET and transistor recommended, 2N4416 and MMBTH10. I used a BF256C and a MPSH10 through hole parts. Although I doubt that created the low input impedance.
https://www.dropbox.com/s/kdwhcxmbk53ugqm/Dagmar%27s%20Fast%20high%20Imp%20amp%20with%20voltage%20labelsand%20RF%20voltages.jpg?dl=0
Anyone care to tell me why such low input impedance and how to make the frequency flat to 30MHz?
Mikek
You have something in the drain of T1 introducing excessive negative feedback on the gate drive. That\'s only way to explain the combination low input impedance and low frequency gain rolloff. If you can\'t do better with your layout, install a high frequency decoupling capacitor at T1 drain to ground there.
I installed a small cap right at the drain to ground, no change.
I\'m posting a picture of the PCB, to learn, not for harassment.Tempted to shrink the the picture, but no.
Note: I have changed semi conductors about 6 times.
https://www.dropbox.com/s/w8psnbud9b6z2se/PCB.jpg?dl=0
I have had the A, B, and C dc voltages vary over the various T1, Q2 changes, as I write I get A=2.4, B= 6.5 and C=5.8.
My first dc measurements were A=1.48 B=8.55 and C=7.83. I have also had A=1.0, B= 5.24, and C=4.63. (A is altered by the 10M? meter impedance.)
This doesn\'t have much effect on Gain.
Mikek
Okay I was afraid of that. It\'s intrinsic to your FET/ construction, assuming your signal source is 50R or even remotely close. Looking at your circuit board, it looks like you may have significant coupling capacitance shunts to ac ground all over the place. The most damaging ones will be at high impedance nodes. That will do it.
Good point. If the pcb is double sided with vast ground plane then the
strays to ground might explain all. Perhaps Lamont/Mikek can try peeling
off a section of groundplane under the gate nodes and measure if there
is an improvement.
piglet
At 30 MHz, capacitance to the backside copper won\'t matter. At a
couple GHz, trace impedances might matter some.
It might benefit from vias from top to bottom ground. I like 2-56
screws, which are good ground lugs too.
The 2N3644 is an PNP-type. So it is wrong.
On 06/11/2022 17:48, John Larkin wrote:
On Sun, 6 Nov 2022 16:56:02 +0000, piglet <erichpwagner@hotmail.com
wrote:
On 06/11/2022 15:03, Fred Bloggs wrote:
On Sunday, November 6, 2022 at 9:22:33 AM UTC-5, Lamont Cranston wrote:
On Sunday, November 6, 2022 at 7:22:24 AM UTC-6, Fred Bloggs wrote:
On Saturday, November 5, 2022 at 8:59:49 PM UTC-4, Lamont Cranston wrote:
Years ago on this group, someone worked this circuit out for me and I have finally built it. It has two problems. The input impedance is about 30k? not 500M?, and it rolls of way to early.
I may have created the problems, I don\'t have the FET and transistor recommended, 2N4416 and MMBTH10. I used a BF256C and a MPSH10 through hole parts. Although I doubt that created the low input impedance.
https://www.dropbox.com/s/kdwhcxmbk53ugqm/Dagmar%27s%20Fast%20high%20Imp%20amp%20with%20voltage%20labelsand%20RF%20voltages.jpg?dl=0
Anyone care to tell me why such low input impedance and how to make the frequency flat to 30MHz?
Mikek
You have something in the drain of T1 introducing excessive negative feedback on the gate drive. That\'s only way to explain the combination low input impedance and low frequency gain rolloff. If you can\'t do better with your layout, install a high frequency decoupling capacitor at T1 drain to ground there.
I installed a small cap right at the drain to ground, no change.
I\'m posting a picture of the PCB, to learn, not for harassment.
Note: I have changed semi conductors about 6 times.
https://www.dropbox.com/s/w8psnbud9b6z2se/PCB.jpg?dl=0
I have had the A, B, and C dc voltages vary over the various T1, Q2 changes, as I write I get A=2.4, B= 6.5 and C=5.8.
My first dc measurements were A=1.48 B=8.55 and C=7.83. I have also had A=1.0, B= 5.24, and C=4.63. (A is altered by the 10M? meter impedance.)
This doesn\'t have much effect on Gain.
Mikek
Okay I was afraid of that. It\'s intrinsic to your FET/ construction, assuming your signal source is 50R or even remotely close. Looking at your circuit board, it looks like you may have significant coupling capacitance shunts to ac ground all over the place. The most damaging ones will be at high impedance nodes. That will do it.
Good point. If the pcb is double sided with vast ground plane then the
strays to ground might explain all. Perhaps Lamont/Mikek can try peeling
off a section of groundplane under the gate nodes and measure if there
is an improvement.
piglet
At 30 MHz, capacitance to the backside copper won\'t matter. At a
couple GHz, trace impedances might matter some.
It might benefit from vias from top to bottom ground. I like 2-56
screws, which are good ground lugs too.
Yes but OP wants the normally incompatible mix of high impedence and
high frequency. Even 0.15pF is going to get Zin down to 30k at 30MHz and
even a 0.1 inch by 0.1 inch pad over a ground plane is going to exceed that.
piglet