GreenPAK speed test...

[Ricketty C]

On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:

lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.

--

Rick C.

-+ Get 1,000 miles of free Supercharging
-+ Tesla referral code - https://ts.la/richard11209

 

[Lasse Langwadt Christensen]

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:

On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting..

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.

yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

 

[boB]

On Sat, 29 Aug 2020 10:15:59 -0700, jlarkin@highlandsniptechnology.com
wrote:

On Sat, 29 Aug 2020 19:04:03 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

bitrex wrote:

https://www.dialog-semiconductor.com/products/slg46120

What are its applications?

Best regards, Piotr

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

A small ARM with a bunch of *good* analog i/o might be interesting.

An ARM processor with some extra programmable logic would be
interesting too.

In my case, programmable code won\'t help. These Silegos (Silicon
Lego) are just perfect ! And they have some things like comparators,
etc. All I need them for is just the programmable logic gates and
counters/delays. Being re-programmable is nice and I am making use
of this but not necessary. I would be using it even without that
feature.

I my products I am using them to create dead-time for FET drive as
well as synchronous rectification logic. Maybe a couple other little
tasks too. Still have to use 2 of them but the size amd being around
40 cents each makes it very useful.

Much smaller than the Xylinx CPLD I was using and less expensive.
Really nice little devices.

 

[Ricketty C]

On Saturday, August 29, 2020 at 5:27:27 PM UTC-4, Lasse Langwadt Christensen wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

I found similar info on the ARM web site without the restriction to Xilinx parts, but I could not find out how to get it. I\'m sure there are many qualifications. Ts & Cs.

--

Rick C.

+- Get 1,000 miles of free Supercharging
+- Tesla referral code - https://ts.la/richard11209

 

[boB]

On Sat, 29 Aug 2020 14:27:20 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

How fast will that FPGA programmed as an ARM Cortex M3 run and how
much will it cost ? Seems to me that a 20,000+ LUT FPGA is not
going to be cheap ? Compared to just buying an ARM processor of the
same complexity at least.

 

[Lasse Langwadt Christensen]

søndag den 30. august 2020 kl. 00.39.05 UTC+2 skrev boB:

On Sat, 29 Aug 2020 14:27:20 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf


How fast will that FPGA programmed as an ARM Cortex M3 run and how
much will it cost ? Seems to me that a 20,000+ LUT FPGA is not
going to be cheap ? Compared to just buying an ARM processor of the
same complexity at least.

yeh you have to have some special need to put it in the fpga when you
can buy an MCU with more memory and preformance for a fraction of the price

 

[Lasse Langwadt Christensen]

søndag den 30. august 2020 kl. 00.27.48 UTC+2 skrev Ricketty C:

On Saturday, August 29, 2020 at 5:27:27 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

I found similar info on the ARM web site without the restriction to Xilinx parts, but I could not find out how to get it. I\'m sure there are many qualifications. Ts & Cs.

You have been able to get the cores for evaluation and design from ARM
for a long time, so you didn\'t need to get a license and pay until you
actually use it

as I understand it they have then made a deal with Xilinx that long as
it is used in a Xilinx fpga a license is included

 

[Ricketty C]

On Saturday, August 29, 2020 at 6:50:46 PM UTC-4, Lasse Langwadt Christensen wrote:

søndag den 30. august 2020 kl. 00.39.05 UTC+2 skrev boB:
On Sat, 29 Aug 2020 14:27:20 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses.. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf


How fast will that FPGA programmed as an ARM Cortex M3 run and how
much will it cost ? Seems to me that a 20,000+ LUT FPGA is not
going to be cheap ? Compared to just buying an ARM processor of the
same complexity at least.

yeh you have to have some special need to put it in the fpga when you
can buy an MCU with more memory and preformance for a fraction of the price

I don\'t know why people get this backwards so often. You must have a special need to want a processor when you have a perfectly good FPGA.

Actually, an FPGA contains many, many tiny multiplexers connecting many, many tiny bits of RAM in contrast to a processor which has the power of the humongous multiplexer manipulating very large blocks of RAM and Flash. So the processor has to run very, very fast to create virtual connections between the many portions of memory. The FPGA in contrast has wires connected by routing FETs that can be used to connect the tiny multiplexers and bits of RAM as selected by the multiplexers.

While the processor can do many slow tasks by switching between them with its humongous multiplexer selecting which task to emulate now, the FPGA is actually processing each task in parallel using much simpler resources for each task, fast or slow, it doesn\'t care.

Which is better...? usually the one we are more familiar with. People often talk as if it is silly to design something in an FPGA that doesn\'t require high speed or some other feature that makes it impossible to do in an MCU.. I look at problems from the other perspective, I only put in an MCU the parts that are awkward to do in an FPGA.

In the board I sell by the thousands (making lots of money in the process) there was nothing that could not be done in the FPGA, so no MCU needed. Of course it is a daughter board in a bigger system with lots of processors running operating systems virtualizing other operating systems... and then they have bigger FPGAs than mine to do the real work.

--

Rick C.

++ Get 1,000 miles of free Supercharging
++ Tesla referral code - https://ts.la/richard11209

 

[Ricketty C]

On Saturday, August 29, 2020 at 6:56:22 PM UTC-4, Lasse Langwadt Christensen wrote:

søndag den 30. august 2020 kl. 00.27.48 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 5:27:27 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too.. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

I found similar info on the ARM web site without the restriction to Xilinx parts, but I could not find out how to get it. I\'m sure there are many qualifications. Ts & Cs.


You have been able to get the cores for evaluation and design from ARM
for a long time, so you didn\'t need to get a license and pay until you
actually use it

as I understand it they have then made a deal with Xilinx that long as
it is used in a Xilinx fpga a license is included

So no T&C to read, review by lawyers and sign? Bet there is. Just from Xilinx rather than ARM.

I read a lawyer on the Internet telling people to NOT read the T&C for websites. Then you can have a defense based on that, not that there is any guarantee that it will work for you. But as soon as you acknowledge that you were aware of the terms, you lose that possibility. Maryland and Virginia (and many other states) have passed laws saying these \"contracts\" are enforceable. I think they should not do that. It\'s not at all practical for a person to know the Ts & Cs of very web site they visit. What if you were required to sign a contact, or more analogously, you automatically signed whenever you stepped foot in door of a retail establishment? I think people would not be at all happy. But when surfing the Internet from our living rooms we feel safer and don\'t challenge such silly laws.

Then when something goes awry, we are stuck.

Sheeple.

--

Rick C.

--- Get 1,000 miles of free Supercharging
--- Tesla referral code - https://ts.la/richard11209

 

[boB]

On Sat, 29 Aug 2020 16:58:10 -0700 (PDT), Ricketty C
<gnuarm.deletethisbit@gmail.com> wrote:

On Saturday, August 29, 2020 at 6:50:46 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.39.05 UTC+2 skrev boB:
On Sat, 29 Aug 2020 14:27:20 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf


How fast will that FPGA programmed as an ARM Cortex M3 run and how
much will it cost ? Seems to me that a 20,000+ LUT FPGA is not
going to be cheap ? Compared to just buying an ARM processor of the
same complexity at least.

yeh you have to have some special need to put it in the fpga when you
can buy an MCU with more memory and preformance for a fraction of the price

I don\'t know why people get this backwards so often. You must have a special need to want a processor when you have a perfectly good FPGA.

Actually, an FPGA contains many, many tiny multiplexers connecting many, many tiny bits of RAM in contrast to a processor which has the power of the humongous multiplexer manipulating very large blocks of RAM and Flash. So the processor has to run very, very fast to create virtual connections between the many portions of memory. The FPGA in contrast has wires connected by routing FETs that can be used to connect the tiny multiplexers and bits of RAM as selected by the multiplexers.

While the processor can do many slow tasks by switching between them with its humongous multiplexer selecting which task to emulate now, the FPGA is actually processing each task in parallel using much simpler resources for each task, fast or slow, it doesn\'t care.

Which is better...? usually the one we are more familiar with. People often talk as if it is silly to design something in an FPGA that doesn\'t require high speed or some other feature that makes it impossible to do in an MCU. I look at problems from the other perspective, I only put in an MCU the parts that are awkward to do in an FPGA.

In the board I sell by the thousands (making lots of money in the process) there was nothing that could not be done in the FPGA, so no MCU needed. Of course it is a daughter board in a bigger system with lots of processors running operating systems virtualizing other operating systems... and then they have bigger FPGAs than mine to do the real work.

So, what does your board do ?

What is it ?

 

[Lasse Langwadt Christensen]

søndag den 30. august 2020 kl. 01.58.15 UTC+2 skrev Ricketty C:

On Saturday, August 29, 2020 at 6:50:46 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.39.05 UTC+2 skrev boB:
On Sat, 29 Aug 2020 14:27:20 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf


How fast will that FPGA programmed as an ARM Cortex M3 run and how
much will it cost ? Seems to me that a 20,000+ LUT FPGA is not
going to be cheap ? Compared to just buying an ARM processor of the
same complexity at least.

yeh you have to have some special need to put it in the fpga when you
can buy an MCU with more memory and preformance for a fraction of the price

I don\'t know why people get this backwards so often. You must have a special need to want a processor when you have a perfectly good FPGA.

and vice versa

Actually, an FPGA contains many, many tiny multiplexers connecting many, many tiny bits of RAM in contrast to a processor which has the power of the humongous multiplexer manipulating very large blocks of RAM and Flash. So the processor has to run very, very fast to create virtual connections between the many portions of memory. The FPGA in contrast has wires connected by routing FETs that can be used to connect the tiny multiplexers and bits of RAM as selected by the multiplexers.

While the processor can do many slow tasks by switching between them with its humongous multiplexer selecting which task to emulate now, the FPGA is actually processing each task in parallel using much simpler resources for each task, fast or slow, it doesn\'t care.

sure, but do you want to write something like a UI or a language interpreter
in rtl?

and if you need memory it is going to be much cheaper in an MCU

Which is better...? usually the one we are more familiar with. People often talk as if it is silly to design something in an FPGA that doesn\'t require high speed or some other feature that makes it impossible to do in an MCU. I look at problems from the other perspective, I only put in an MCU the parts that are awkward to do in an FPGA.

In the board I sell by the thousands (making lots of money in the process) there was nothing that could not be done in the FPGA, so no MCU needed. Of course it is a daughter board in a bigger system with lots of processors running operating systems virtualizing other operating systems... and then they have bigger FPGAs than mine to do the real work.

I don\'t know what your board does, maybe an FPGA is the perfect fit

 

[Lasse Langwadt Christensen]

søndag den 30. august 2020 kl. 02.05.33 UTC+2 skrev Ricketty C:

On Saturday, August 29, 2020 at 6:56:22 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.27.48 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 5:27:27 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

I found similar info on the ARM web site without the restriction to Xilinx parts, but I could not find out how to get it. I\'m sure there are many qualifications. Ts & Cs.


You have been able to get the cores for evaluation and design from ARM
for a long time, so you didn\'t need to get a license and pay until you
actually use it

as I understand it they have then made a deal with Xilinx that long as
it is used in a Xilinx fpga a license is included

So no T&C to read, review by lawyers and sign? Bet there is. Just from Xilinx rather than ARM.

why would it be any different than if you bought a Zynq that has a hardcore
ARM cpu? the license is included with the chip

 

[Ricketty C]

On Saturday, August 29, 2020 at 9:55:46 PM UTC-4, boB wrote:

On Sat, 29 Aug 2020 16:58:10 -0700 (PDT), Ricketty C
gnuarm.deletethisbit@gmail.com> wrote:

On Saturday, August 29, 2020 at 6:50:46 PM UTC-4, Lasse Langwadt Christensen wrote:

yeh you have to have some special need to put it in the fpga when you
can buy an MCU with more memory and preformance for a fraction of the price

I don\'t know why people get this backwards so often. You must have a special need to want a processor when you have a perfectly good FPGA.

Actually, an FPGA contains many, many tiny multiplexers connecting many, many tiny bits of RAM in contrast to a processor which has the power of the humongous multiplexer manipulating very large blocks of RAM and Flash. So the processor has to run very, very fast to create virtual connections between the many portions of memory. The FPGA in contrast has wires connected by routing FETs that can be used to connect the tiny multiplexers and bits of RAM as selected by the multiplexers.

While the processor can do many slow tasks by switching between them with its humongous multiplexer selecting which task to emulate now, the FPGA is actually processing each task in parallel using much simpler resources for each task, fast or slow, it doesn\'t care.

Which is better...? usually the one we are more familiar with. People often talk as if it is silly to design something in an FPGA that doesn\'t require high speed or some other feature that makes it impossible to do in an MCU. I look at problems from the other perspective, I only put in an MCU the parts that are awkward to do in an FPGA.

In the board I sell by the thousands (making lots of money in the process) there was nothing that could not be done in the FPGA, so no MCU needed. Of course it is a daughter board in a bigger system with lots of processors running operating systems virtualizing other operating systems... and then they have bigger FPGAs than mine to do the real work.



So, what does your board do ?

What is it ?

It is an interface for audio and digital signals to networking equipment. There are two interfaces that can\'t be done in a CPU because they are custom. One is a control interface that is similar to SPI, but optimized for speed, so unique (two data lines for example). The other is a high speed data interface (high being a relative term) which has several options for clocking.

The internal logic uses a 16 bit stereo CODEC and combines the resulting data with a digital stream into packets that can be received at the other end and turned back into the data and time synchronized audio. The original incantation of this board was targeted to carrying IRIG B-120 time codes as digital bits rather than audio. When the synchronized data mode was added the time code was just carried as audio since higher data rates were going to happen from the data.

I believe nearly none of the units sold are used in this manner (US military testing missiles). They are mostly sold to bring audio into the network such as phone calls, intercoms, etc.

When my customer discusses the marketing of these units, it seems it is a segment of networking that is being ignored by most vendors. My boards piggy back on serial comms boards. They call this circuit to packet, CTP. Many vendors no longer have product to solve these problems. My customer uses this product to gain leverage in winning contracts that require this capability even if these units are only a small share of the dollar amount.

Works for me!

--

Rick C.

--+ Get 1,000 miles of free Supercharging
--+ Tesla referral code - https://ts.la/richard11209

 

[Ricketty C]

On Saturday, August 29, 2020 at 10:25:18 PM UTC-4, Lasse Langwadt Christensen wrote:

søndag den 30. august 2020 kl. 01.58.15 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 6:50:46 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.39.05 UTC+2 skrev boB:
On Sat, 29 Aug 2020 14:27:20 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla....@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device..

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf


How fast will that FPGA programmed as an ARM Cortex M3 run and how
much will it cost ? Seems to me that a 20,000+ LUT FPGA is not
going to be cheap ? Compared to just buying an ARM processor of the
same complexity at least.

yeh you have to have some special need to put it in the fpga when you
can buy an MCU with more memory and preformance for a fraction of the price

I don\'t know why people get this backwards so often. You must have a special need to want a processor when you have a perfectly good FPGA.

and vice versa


Actually, an FPGA contains many, many tiny multiplexers connecting many, many tiny bits of RAM in contrast to a processor which has the power of the humongous multiplexer manipulating very large blocks of RAM and Flash. So the processor has to run very, very fast to create virtual connections between the many portions of memory. The FPGA in contrast has wires connected by routing FETs that can be used to connect the tiny multiplexers and bits of RAM as selected by the multiplexers.

While the processor can do many slow tasks by switching between them with its humongous multiplexer selecting which task to emulate now, the FPGA is actually processing each task in parallel using much simpler resources for each task, fast or slow, it doesn\'t care.


sure, but do you want to write something like a UI or a language interpreter
in rtl?

In this vent device the alarms are based on UI settings. To be able to say this is all hardware the UI will be controlled by the FPGA. So yes, an HDL UI is no big deal.

What are you thinking of that would be a big deal in HDL?


> and if you need memory it is going to be much cheaper in an MCU

All memory in a device is free once the device is selected. Why would it be more expensive in an FPGA???

Which is better...? usually the one we are more familiar with. People often talk as if it is silly to design something in an FPGA that doesn\'t require high speed or some other feature that makes it impossible to do in an MCU. I look at problems from the other perspective, I only put in an MCU the parts that are awkward to do in an FPGA.

In the board I sell by the thousands (making lots of money in the process) there was nothing that could not be done in the FPGA, so no MCU needed. Of course it is a daughter board in a bigger system with lots of processors running operating systems virtualizing other operating systems... and then they have bigger FPGAs than mine to do the real work.


I don\'t know what your board does, maybe an FPGA is the perfect fit

It was absolutely. But you fail to understand my point. Many, many designs can be done in FPGAs with no more trouble than in processors. But people who use processors are used to thinking in the messy, complex techniques of making a sequentially executing machine appear to execute many processes at the same time.

This is a bias based on familiarity. I would have though the same way 20 years ago. Now that I have done some more complex designs in FPGAs I realize it really isn\'t harder necessarily and can be easier since FPGA tools are optimized for simulation. Working in simulation allows so much to be verified without turning on power to a board. I think people underestimate that as well.

I realize now I\'m not going to win any converts by talking about it. People will keep using the tools they were taught. Now that they know the complex rules of making processors appear to process in parallel, there is little incentive to change their thinking. So they will continue to fight the same fights over and over.

Ok

--

Rick C.

-+- Get 1,000 miles of free Supercharging
-+- Tesla referral code - https://ts.la/richard11209

 

[Ricketty C]

On Saturday, August 29, 2020 at 10:31:21 PM UTC-4, Lasse Langwadt Christensen wrote:

søndag den 30. august 2020 kl. 02.05.33 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 6:56:22 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.27.48 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 5:27:27 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla....@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family..
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

I found similar info on the ARM web site without the restriction to Xilinx parts, but I could not find out how to get it. I\'m sure there are many qualifications. Ts & Cs.


You have been able to get the cores for evaluation and design from ARM
for a long time, so you didn\'t need to get a license and pay until you
actually use it

as I understand it they have then made a deal with Xilinx that long as
it is used in a Xilinx fpga a license is included

So no T&C to read, review by lawyers and sign? Bet there is. Just from Xilinx rather than ARM.


why would it be any different than if you bought a Zynq that has a hardcore
ARM cpu? the license is included with the chip

No, there is no license to sign to use a Zynq. Are you telling me you have to sign paperwork or click on the web page link that acknowledges you agree to the contract to use a Zynq?

I had a GPS that required acknowledgement of the contract to make it work. Otherwise I\'ve never seen that, web pages excepted. Digikey makes me agree to something with each new tab I open. Silly.


Rick C.

-++ Get 1,000 miles of free Supercharging
-++ Tesla referral code - https://ts.la/richard11209

 

[boB]

On Sat, 29 Aug 2020 22:23:29 -0700 (PDT), Ricketty C
<gnuarm.deletethisbit@gmail.com> wrote:

On Saturday, August 29, 2020 at 10:25:18 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 01.58.15 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 6:50:46 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.39.05 UTC+2 skrev boB:
On Sat, 29 Aug 2020 14:27:20 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf


How fast will that FPGA programmed as an ARM Cortex M3 run and how
much will it cost ? Seems to me that a 20,000+ LUT FPGA is not
going to be cheap ? Compared to just buying an ARM processor of the
same complexity at least.

yeh you have to have some special need to put it in the fpga when you
can buy an MCU with more memory and preformance for a fraction of the price

I don\'t know why people get this backwards so often. You must have a special need to want a processor when you have a perfectly good FPGA.

and vice versa


Actually, an FPGA contains many, many tiny multiplexers connecting many, many tiny bits of RAM in contrast to a processor which has the power of the humongous multiplexer manipulating very large blocks of RAM and Flash. So the processor has to run very, very fast to create virtual connections between the many portions of memory. The FPGA in contrast has wires connected by routing FETs that can be used to connect the tiny multiplexers and bits of RAM as selected by the multiplexers.

While the processor can do many slow tasks by switching between them with its humongous multiplexer selecting which task to emulate now, the FPGA is actually processing each task in parallel using much simpler resources for each task, fast or slow, it doesn\'t care.


sure, but do you want to write something like a UI or a language interpreter
in rtl?

In this vent device the alarms are based on UI settings. To be able to say this is all hardware the UI will be controlled by the FPGA. So yes, an HDL UI is no big deal.

What are you thinking of that would be a big deal in HDL?


and if you need memory it is going to be much cheaper in an MCU

All memory in a device is free once the device is selected. Why would it be more expensive in an FPGA???


Which is better...? usually the one we are more familiar with. People often talk as if it is silly to design something in an FPGA that doesn\'t require high speed or some other feature that makes it impossible to do in an MCU. I look at problems from the other perspective, I only put in an MCU the parts that are awkward to do in an FPGA.

In the board I sell by the thousands (making lots of money in the process) there was nothing that could not be done in the FPGA, so no MCU needed. Of course it is a daughter board in a bigger system with lots of processors running operating systems virtualizing other operating systems... and then they have bigger FPGAs than mine to do the real work.


I don\'t know what your board does, maybe an FPGA is the perfect fit

It was absolutely. But you fail to understand my point. Many, many designs can be done in FPGAs with no more trouble than in processors. But people who use processors are used to thinking in the messy, complex techniques of making a sequentially executing machine appear to execute many processes at the same time.

This is a bias based on familiarity. I would have though the same way 20 years ago. Now that I have done some more complex designs in FPGAs I realize it really isn\'t harder necessarily and can be easier since FPGA tools are optimized for simulation. Working in simulation allows so much to be verified without turning on power to a board. I think people underestimate that as well.

I realize now I\'m not going to win any converts by talking about it. People will keep using the tools they were taught. Now that they know the complex rules of making processors appear to process in parallel, there is little incentive to change their thinking. So they will continue to fight the same fights over and over.

Ok

I have thought of using an FPGA for what I do (power electronics,
inverters, chargers, etc with communications) but I thought the cost
of an FPGA that had enough gates would be way too expensive. I use a
fairly fast ARM processor (180MHz) and only these Greenpaks (a small
and inexpensive FPGA) which was necessary for the fast stuff. The
processor and Greenpaks cost less than $5.

Of course there are all the other additions that cannot be done with
either an FPGA or a processor or combination of both. All the power
stuff, drivers, aux power etc.

BUT, some of the other companies that make microinverters etc do use
FPGAs rather than microprocessors.

I can see that getting in that \"mode\" of thought would definitely be
a different mind-set at least to start with. I would like to
understand that method better but for now, the processor is working
well.

 

[boB]

On Sat, 29 Aug 2020 22:27:25 -0700 (PDT), Ricketty C
<gnuarm.deletethisbit@gmail.com> wrote:

On Saturday, August 29, 2020 at 10:31:21 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 02.05.33 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 6:56:22 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.27.48 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 5:27:27 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

I found similar info on the ARM web site without the restriction to Xilinx parts, but I could not find out how to get it. I\'m sure there are many qualifications. Ts & Cs.


You have been able to get the cores for evaluation and design from ARM
for a long time, so you didn\'t need to get a license and pay until you
actually use it

as I understand it they have then made a deal with Xilinx that long as
it is used in a Xilinx fpga a license is included

So no T&C to read, review by lawyers and sign? Bet there is. Just from Xilinx rather than ARM.


why would it be any different than if you bought a Zynq that has a hardcore
ARM cpu? the license is included with the chip

No, there is no license to sign to use a Zynq. Are you telling me you have to sign paperwork or click on the web page link that acknowledges you agree to the contract to use a Zynq?

I had a GPS that required acknowledgement of the contract to make it work. Otherwise I\'ve never seen that, web pages excepted. Digikey makes me agree to something with each new tab I open. Silly.


Rick C.

-++ Get 1,000 miles of free Supercharging
-++ Tesla referral code - https://ts.la/richard11209

I\'m not sure why anyone would need to put an ARM processor on an FPGA
instead of just using an ARM processor and a less expensive and
complicated FPGA in addition to the ARM processor, if it would work.

I can see if being useful maybe if that FPGA would allow the ARM core
to run at an equivelant clock of sever gigaHz maybe.

You might set me straight on how much better an ARM micro running
sequenced code on an FPGA would be if that were the only thing being
done in that FPGA. Not talking about parallel operations but maybe
there is something to that in addition ?

 

[Ricketty C]

On Sunday, August 30, 2020 at 3:26:38 AM UTC-4, boB wrote:

On Sat, 29 Aug 2020 22:23:29 -0700 (PDT), Ricketty C
gnuarm.deletethisbit@gmail.com> wrote:

On Saturday, August 29, 2020 at 10:25:18 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 01.58.15 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 6:50:46 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.39.05 UTC+2 skrev boB:
On Sat, 29 Aug 2020 14:27:20 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf


How fast will that FPGA programmed as an ARM Cortex M3 run and how
much will it cost ? Seems to me that a 20,000+ LUT FPGA is not
going to be cheap ? Compared to just buying an ARM processor of the
same complexity at least.

yeh you have to have some special need to put it in the fpga when you
can buy an MCU with more memory and preformance for a fraction of the price

I don\'t know why people get this backwards so often. You must have a special need to want a processor when you have a perfectly good FPGA.

and vice versa


Actually, an FPGA contains many, many tiny multiplexers connecting many, many tiny bits of RAM in contrast to a processor which has the power of the humongous multiplexer manipulating very large blocks of RAM and Flash.. So the processor has to run very, very fast to create virtual connections between the many portions of memory. The FPGA in contrast has wires connected by routing FETs that can be used to connect the tiny multiplexers and bits of RAM as selected by the multiplexers.

While the processor can do many slow tasks by switching between them with its humongous multiplexer selecting which task to emulate now, the FPGA is actually processing each task in parallel using much simpler resources for each task, fast or slow, it doesn\'t care.


sure, but do you want to write something like a UI or a language interpreter
in rtl?

In this vent device the alarms are based on UI settings. To be able to say this is all hardware the UI will be controlled by the FPGA. So yes, an HDL UI is no big deal.

What are you thinking of that would be a big deal in HDL?


and if you need memory it is going to be much cheaper in an MCU

All memory in a device is free once the device is selected. Why would it be more expensive in an FPGA???


Which is better...? usually the one we are more familiar with. People often talk as if it is silly to design something in an FPGA that doesn\'t require high speed or some other feature that makes it impossible to do in an MCU. I look at problems from the other perspective, I only put in an MCU the parts that are awkward to do in an FPGA.

In the board I sell by the thousands (making lots of money in the process) there was nothing that could not be done in the FPGA, so no MCU needed. Of course it is a daughter board in a bigger system with lots of processors running operating systems virtualizing other operating systems... and then they have bigger FPGAs than mine to do the real work.


I don\'t know what your board does, maybe an FPGA is the perfect fit

It was absolutely. But you fail to understand my point. Many, many designs can be done in FPGAs with no more trouble than in processors. But people who use processors are used to thinking in the messy, complex techniques of making a sequentially executing machine appear to execute many processes at the same time.

This is a bias based on familiarity. I would have though the same way 20 years ago. Now that I have done some more complex designs in FPGAs I realize it really isn\'t harder necessarily and can be easier since FPGA tools are optimized for simulation. Working in simulation allows so much to be verified without turning on power to a board. I think people underestimate that as well.

I realize now I\'m not going to win any converts by talking about it. People will keep using the tools they were taught. Now that they know the complex rules of making processors appear to process in parallel, there is little incentive to change their thinking. So they will continue to fight the same fights over and over.

Ok


I have thought of using an FPGA for what I do (power electronics,
inverters, chargers, etc with communications) but I thought the cost
of an FPGA that had enough gates would be way too expensive. I use a
fairly fast ARM processor (180MHz) and only these Greenpaks (a small
and inexpensive FPGA) which was necessary for the fast stuff. The
processor and Greenpaks cost less than $5.

Of course there are all the other additions that cannot be done with
either an FPGA or a processor or combination of both. All the power
stuff, drivers, aux power etc.

BUT, some of the other companies that make microinverters etc do use
FPGAs rather than microprocessors.

I can see that getting in that \"mode\" of thought would definitely be
a different mind-set at least to start with. I would like to
understand that method better but for now, the processor is working
well.

I would be using a $2 FPGA on my current project, but the part I want to use doesn\'t have LVDS receivers. I can add comparators or use a different part from a different maker with lots of I/O and LVDS inputs. The other part is from Gowin a new company, so I\'m trying to do all my homework on them and the using the parts.

If you have any real volume, you can get an FPGA company to quote you pricing which will be much better than distribution offers. Not sure why that is, but that\'s the way it is with FPGAs.

Many FPGAs have multipliers/DSP modules capable of running at 100\'s of MHz. For most apps a multiplier can be shared via multiplexing or depending on your app it can work from on chip memory. A coworker did that once in a design with fast and slow portions. The slow portion had lots of complex logic and arithmetic, so the \"ALU\" was shared to do several calcs. The fast parts were more logic oriented. This was test gear dealing with ATM packets.

Control loops should be a breeze with math running nearly as fast as analog signals. lol

It helps if you understand logic rather than just banging code I think. But my opinion may be prejudiced by my own experiences.

I think part of my success in FPGAs is that I follow the rules of small modules that are tested before integrating. In VHDL it creates a lot of typing, but in the end development is faster because mistakes are caught earlier where you can find them more easily. But it takes some thought to know where the demons are more likely.

--

Rick C.

+-- Get 1,000 miles of free Supercharging
+-- Tesla referral code - https://ts.la/richard11209

 

[Ricketty C]

On Sunday, August 30, 2020 at 3:30:46 AM UTC-4, boB wrote:

On Sat, 29 Aug 2020 22:27:25 -0700 (PDT), Ricketty C
gnuarm.deletethisbit@gmail.com> wrote:

On Saturday, August 29, 2020 at 10:31:21 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 02.05.33 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 6:56:22 PM UTC-4, Lasse Langwadt Christensen wrote:
søndag den 30. august 2020 kl. 00.27.48 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 5:27:27 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 23.13.05 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 4:44:24 PM UTC-4, Lasse Langwadt Christensen wrote:
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code

M1 perhaps? That\'s the core from ARM that is intended for such uses. Looks like they also have M3 for FPGAs as well, they even mention using them for \"free\" which I assume means evaluation.


yes M1 is M0 optimized for FPGA

as far as I can tell it is really free for use in Xilinx FPGAs

\"
Free to use on FPGA
Free use on FPGA for Cortex-M1 and Cortex-M3
For prototyping, research and commercial use
\"

https://www.xilinx.com/publications/events/developer-forum/2018-frankfurt/bringing-the-benefits-of-cortex-m-processors-to-fpga.pdf

I found similar info on the ARM web site without the restriction to Xilinx parts, but I could not find out how to get it. I\'m sure there are many qualifications. Ts & Cs.


You have been able to get the cores for evaluation and design from ARM
for a long time, so you didn\'t need to get a license and pay until you
actually use it

as I understand it they have then made a deal with Xilinx that long as
it is used in a Xilinx fpga a license is included

So no T&C to read, review by lawyers and sign? Bet there is. Just from Xilinx rather than ARM.


why would it be any different than if you bought a Zynq that has a hardcore
ARM cpu? the license is included with the chip

No, there is no license to sign to use a Zynq. Are you telling me you have to sign paperwork or click on the web page link that acknowledges you agree to the contract to use a Zynq?

I had a GPS that required acknowledgement of the contract to make it work. Otherwise I\'ve never seen that, web pages excepted. Digikey makes me agree to something with each new tab I open. Silly.


Rick C.

-++ Get 1,000 miles of free Supercharging
-++ Tesla referral code - https://ts.la/richard11209


I\'m not sure why anyone would need to put an ARM processor on an FPGA
instead of just using an ARM processor and a less expensive and
complicated FPGA in addition to the ARM processor, if it would work.

I can see if being useful maybe if that FPGA would allow the ARM core
to run at an equivelant clock of sever gigaHz maybe.

You might set me straight on how much better an ARM micro running
sequenced code on an FPGA would be if that were the only thing being
done in that FPGA. Not talking about parallel operations but maybe
there is something to that in addition ?

If it\'s a soft core, the ARM would likely run slower in an FPGA unless the bottle neck in the ARM chip were something like Flash. In general an FPGA will run more slowly than any manner of dedicated chip. The routing adds delay to every path. FPGAs can be fast simply because they can be tailored to the task rather than executing general code to do what you want. Think of a processor with one instruction, your task. Maybe that\'s not a good analogy. But FPGAs aren\'t faster than processors, just more targeted so less wasted time doing things that aren\'t accomplishing the task, like fetching instructions.

For me it\'s not about speed. I just prefer the simplicity of coding the hardware to do what you need directly rather than thinking of what the processor is capable of or how the language is going to generate code to do the task. With HDL, if you describe the hardware properly, it will give you exactly what you ask for. That\'s way it\'s a Hardware Description Language.

--

Rick C.

+-+ Get 1,000 miles of free Supercharging
+-+ Tesla referral code - https://ts.la/richard11209

 

[Tom Gardner]

On 30/08/20 08:30, boB wrote:

I\'m not sure why anyone would need to put an ARM processor on an FPGA
instead of just using an ARM processor and a less expensive and
complicated FPGA in addition to the ARM processor, if it would work.

I can see if being useful maybe if that FPGA would allow the ARM core
to run at an equivelant clock of sever gigaHz maybe.

Tight and fast processor-hardware integration.
Tool-chain integration of programmable logic, logic/processor
interfaces, and and software interfaces.
Board area.

FFI, see the Xilinx Zynq devices.

Whether those advantages apply to softcore processors is left
as an exercise for the student