GreenPAK speed test...

B

bitrex

Guest
Usin a four stage Johnson ring counter from 4 \"D\" flip flops and some
simple 1 gate 4-input combinatorial logic tapped off the flop to several
outputs I ran a speed test on a programmed GreenPAK SLG46120V. The data
sheets and information I have are cagey about how fast you can clock
them reliably as it depends somewhat on the complexity of the design.

<https://www.dialog-semiconductor.com/products/slg46120>

For this circuit I get at 3.3 volts, about 40 MHz before it starts
malfunctioning. At 5 volts it works OK up to almost 100 MHz. Faster than
I was expecting. Power consumption rose from about 2 mA at quiescent to
7-8 mA at 5 volts Vdd, max clock.
 
On 8/28/2020 5:30 PM, bitrex wrote:
Usin a four stage Johnson ring counter from 4 \"D\" flip flops and some
simple 1 gate 4-input combinatorial logic tapped off the flop to several
outputs I ran a speed test on a programmed GreenPAK SLG46120V. The data
sheets and information I have are cagey about how fast you can clock
them reliably as it depends somewhat on the complexity of the design.

https://www.dialog-semiconductor.com/products/slg46120

For this circuit I get at 3.3 volts, about 40 MHz before it starts
malfunctioning. At 5 volts it works OK up to almost 100 MHz. Faster than
I was expecting. Power consumption rose from about 2 mA at quiescent to
7-8 mA at 5 volts Vdd, max clock.

Current consumption rather
 
On 8/28/2020 5:30 PM, bitrex wrote:
Usin a four stage Johnson ring counter from 4 \"D\" flip flops and some
simple 1 gate 4-input combinatorial logic tapped off the flop to several
outputs I ran a speed test on a programmed GreenPAK SLG46120V. The data
sheets and information I have are cagey about how fast you can clock
them reliably as it depends somewhat on the complexity of the design.

https://www.dialog-semiconductor.com/products/slg46120

For this circuit I get at 3.3 volts, about 40 MHz before it starts
malfunctioning. At 5 volts it works OK up to almost 100 MHz. Faster than
I was expecting. Power consumption rose from about 2 mA at quiescent to
7-8 mA at 5 volts Vdd, max clock.

The current consumption seems high, there may be some extra load on it
in my test setup or something\'s turned on in the chip I\'m not using so
don\'t quote me on that :)
 
On Fri, 28 Aug 2020 17:47:15 -0400, bitrex <user@example.net> wrote:

On 8/28/2020 5:30 PM, bitrex wrote:
Usin a four stage Johnson ring counter from 4 \"D\" flip flops and some
simple 1 gate 4-input combinatorial logic tapped off the flop to several
outputs I ran a speed test on a programmed GreenPAK SLG46120V. The data
sheets and information I have are cagey about how fast you can clock
them reliably as it depends somewhat on the complexity of the design.

https://www.dialog-semiconductor.com/products/slg46120

For this circuit I get at 3.3 volts, about 40 MHz before it starts
malfunctioning. At 5 volts it works OK up to almost 100 MHz. Faster than
I was expecting. Power consumption rose from about 2 mA at quiescent to
7-8 mA at 5 volts Vdd, max clock.

The current consumption seems high, there may be some extra load on it
in my test setup or something\'s turned on in the chip I\'m not using so
don\'t quote me on that :)

This is great news ! I use these also. i was kind of led to believe
by Silego/Dialog that they could work past 20 MHz or so but no
hard limit. I run a clock up to about 12 MHz maximum but this
is great information to know !

Thanks !
 
bitrex wrote:

> <https://www.dialog-semiconductor.com/products/slg46120>

What are its applications?

Best regards, Piotr
 
On Sat, 29 Aug 2020 19:04:03 +0200, Piotr Wyderski
<peter.pan@neverland.mil> wrote:

bitrex wrote:

https://www.dialog-semiconductor.com/products/slg46120

What are its applications?

Best regards, Piotr

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

A small ARM with a bunch of *good* analog i/o might be interesting.



--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard
 
On 8/29/2020 3:20 AM, boB wrote:
On Fri, 28 Aug 2020 17:47:15 -0400, bitrex <user@example.net> wrote:

On 8/28/2020 5:30 PM, bitrex wrote:
Usin a four stage Johnson ring counter from 4 \"D\" flip flops and some
simple 1 gate 4-input combinatorial logic tapped off the flop to several
outputs I ran a speed test on a programmed GreenPAK SLG46120V. The data
sheets and information I have are cagey about how fast you can clock
them reliably as it depends somewhat on the complexity of the design.

https://www.dialog-semiconductor.com/products/slg46120

For this circuit I get at 3.3 volts, about 40 MHz before it starts
malfunctioning. At 5 volts it works OK up to almost 100 MHz. Faster than
I was expecting. Power consumption rose from about 2 mA at quiescent to
7-8 mA at 5 volts Vdd, max clock.

The current consumption seems high, there may be some extra load on it
in my test setup or something\'s turned on in the chip I\'m not using so
don\'t quote me on that :)

This is great news ! I use these also. i was kind of led to believe
by Silego/Dialog that they could work past 20 MHz or so but no
hard limit. I run a clock up to about 12 MHz maximum but this
is great information to know !

Thanks !

Mind you this is not slaving the internal PLL clock to external clock, I
don\'t know how fast that will lock haven\'t tested. This is directly
injecting external clock to the logic via an input pin which you can do.

Whether it works at a given speed would also depend on the complexity of
the logic and I doubt a device with an asynchronous state machine can
clock that fast. But for just arrays of gates I expect it would be
equivalent to a discrete circuit built with VHC logic, maybe? maybe not
quite that fast. Gate propagation delays on the order of 10n, not 100n,
within an order of magnitude.
 
On 8/29/2020 1:15 PM, jlarkin@highlandsniptechnology.com wrote:
On Sat, 29 Aug 2020 19:04:03 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

bitrex wrote:

https://www.dialog-semiconductor.com/products/slg46120

What are its applications?

Best regards, Piotr

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

A small ARM with a bunch of *good* analog i/o might be interesting.

An interesting feature of these (haven\'t tried it yet) is that you can
snapshot different configurations in the editor to a text file, store a
snapshot in a uP memory, send it to the chip over I2C and it
re-configures the array.

They\'re OTP in the sense that the configuration you burn it in is the
one it powers up in. But once it\'s running the hardware can be
re-configured on-the-fly by sending a set of differences over I2C.
 
On 8/29/2020 1:15 PM, jlarkin@highlandsniptechnology.com wrote:
On Sat, 29 Aug 2020 19:04:03 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

bitrex wrote:

https://www.dialog-semiconductor.com/products/slg46120

What are its applications?

Best regards, Piotr

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

A small ARM with a bunch of *good* analog i/o might be interesting.

Also some come with integrated power MOSFETs so you can roll your own
one-chip converter designs.
 
On Saturday, August 29, 2020 at 1:16:08 PM UTC-4, jla...@highlandsniptechnology.com wrote:
On Sat, 29 Aug 2020 19:04:03 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

bitrex wrote:

https://www.dialog-semiconductor.com/products/slg46120

What are its applications?

Best regards, Piotr

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

A small ARM with a bunch of *good* analog i/o might be interesting.

An ARM with \"good\" analog is a semiconductor contradiction. Microsemi has a combination of FPGA, ARM and analog, but is it good enough? I know it\'s pricey, ~$50 I believe.

The Greenpak devices are a bit more like an assortment of several analog parts and a PLD... not even a good PLD, but they do have some timers/counters and such to augment the random logic I believe.

I think this device has legs to continue in the market place. Their niche is low cost, high volume where a $1 part can replace $1.50 of other parts.

Someone correct me if I am wrong, but their production model is that you develop the design and they produce it for you rather than you programming them on board or in a programmer yourself. I guess they can do it a lot cheaper than you can. But you still have to burn parts for prototyping. Does that have to be in a programmer or can it be done on the board? I looked at them a couple of times, but don\'t recall the details.

Ah, I read a message ahead and Bitrex says they can be programmed via I2C it seems. Cool

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209
 
jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

> A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr
 
On Saturday, August 29, 2020 at 1:56:56 PM UTC-4, bitrex wrote:
On 8/29/2020 1:15 PM, jlarkin@highlandsniptechnology.com wrote:
On Sat, 29 Aug 2020 19:04:03 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

bitrex wrote:

https://www.dialog-semiconductor.com/products/slg46120

What are its applications?

Best regards, Piotr

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

A small ARM with a bunch of *good* analog i/o might be interesting.




Also some come with integrated power MOSFETs so you can roll your own
one-chip converter designs.

Correct me if I\'m wrong, but the MOSFET isn\'t controlled analog. It\'s on or off. I looked at these to be part of a current limiter to charge a supercap and it just wouldn\'t do it. Or maybe it was something else. I just don\'t recall. Only a small number of devices have the MOSFETs. Maybe it was a voltage limitation. I do recall somehow they\'ve worked around the diode leaking current in the reverse direction through the parasitic diode.

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209
 
lørdag den 29. august 2020 kl. 20.38.36 UTC+2 skrev Piotr Wyderski:
jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

yeh, if they can do something like a STSPIN32F0 for a dollar
 
Ricketty C wrote:

> An ARM with \"good\" analog is a semiconductor contradiction. Microsemi has a combination of FPGA, ARM and analog, but is it good enough? I know it\'s pricey, ~$50 I believe.

Interesting; what are those?

> The Greenpak devices are a bit more like an assortment of several analog parts and a PLD... not even a good PLD, but they do have some timers/counters and such to augment the random logic I believe.

OK, but still, what can you do with two comparators and several LUTs? I
understand the cost/PCB real estate saving argument, and the I2C
programming is great, but let\'s put it aside and focus solely on the
capabilities. The device is just too small to be seriously useful. Can
you provide me with some clever applications?

Speaking of wish lists, I would like to have an SRAM-only FPGA directly
programmable by the I2C interface from a master device. Or an MCU like
that. 10 years of FLASH retention time is not enough if the device is
supposed to spend 20+ years on a shelf as a spare unit. The master can
keep a combined config file in an external FRAM or in a FLASH with a
voting logic. One can apply this solution at most once in a design; the
cost of building all the slave units like that would be prohibitive.

Best regards, Piotr
 
On 8/29/2020 2:41 PM, Ricketty C wrote:
On Saturday, August 29, 2020 at 1:56:56 PM UTC-4, bitrex wrote:
On 8/29/2020 1:15 PM, jlarkin@highlandsniptechnology.com wrote:
On Sat, 29 Aug 2020 19:04:03 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

bitrex wrote:

https://www.dialog-semiconductor.com/products/slg46120

What are its applications?

Best regards, Piotr

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

A small ARM with a bunch of *good* analog i/o might be interesting.




Also some come with integrated power MOSFETs so you can roll your own
one-chip converter designs.

Correct me if I\'m wrong, but the MOSFET isn\'t controlled analog. It\'s on or off. I looked at these to be part of a current limiter to charge a supercap and it just wouldn\'t do it. Or maybe it was something else. I just don\'t recall. Only a small number of devices have the MOSFETs. Maybe it was a voltage limitation. I do recall somehow they\'ve worked around the diode leaking current in the reverse direction through the parasitic diode.

Ya pretty sure you\'re right, it\'s power-conversion oriented. It\'s
finally a digital chip; boy it would be great to have a bunch of op-amps
and passives and FETs on a chip you could wire up to do whatever. I
don\'t think we\'re there yet, not at 50 cent in quantity at least.
 
On Saturday, August 29, 2020 at 2:38:36 PM UTC-4, Piotr Wyderski wrote:
jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

On the project I\'m working much of what the ARM is doing is moving into the FPGA. There is no reason why it can\'t all be done in the FPGA really. But the justification is to put the alarms in \"hardware\" which will be easier to validate... or not. It\'s not me saying that, it\'s the lead.

99% of the functioning is measuring parameters and controlling a motor along with a UI. None of this is too hard for an FPGA. There may be some requirements to track events and record a log. That would be done better in the MCU. For now the motor control loop is all in the MCU and that is really the lion\'s share of the work. But a state machine is a state machine... I\'m just sayin\'

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209
 
lørdag den 29. august 2020 kl. 20.41.21 UTC+2 skrev Ricketty C:
On Saturday, August 29, 2020 at 1:56:56 PM UTC-4, bitrex wrote:
On 8/29/2020 1:15 PM, jlarkin@highlandsniptechnology.com wrote:
On Sat, 29 Aug 2020 19:04:03 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

bitrex wrote:

https://www.dialog-semiconductor.com/products/slg46120

What are its applications?

Best regards, Piotr

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

A small ARM with a bunch of *good* analog i/o might be interesting.




Also some come with integrated power MOSFETs so you can roll your own
one-chip converter designs.

Correct me if I\'m wrong, but the MOSFET isn\'t controlled analog. It\'s on or off. I looked at these to be part of a current limiter to charge a supercap and it just wouldn\'t

just add an inductor do it as a buck, that also avoids dumping all that energy
in the part


do it. Or maybe it was something else. I just don\'t recall. Only a small number of devices have the MOSFETs. Maybe it was a voltage limitation. I do recall somehow they\'ve worked around the diode leaking current in the reverse direction through the parasitic diode.

back-to-back mosfets ?
 
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
<peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.



--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard
 
On Saturday, August 29, 2020 at 3:57:41 PM UTC-4, jla...@highlandsniptechnology.com wrote:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL.

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

https://www.gowinsemi.com/en/product/detail/1/

--

Rick C.

-- Get 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209
 
lørdag den 29. august 2020 kl. 21.57.41 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 29 Aug 2020 20:38:31 +0200, Piotr Wyderski
peter.pan@neverland.mil> wrote:

jlarkin@highlandsniptechnology.com wrote:

There have been many programmable mixed-type (analog+digital) chips
over the years, but they don\'t seem to survive. Probably because they
don\'t do analog or digital very well.

Some of them are very interesting, e.g. the PSOC5LP family.
Unfortunately, its maximum IO frequency is 33MHz and it has only one PLL..

A small ARM with a bunch of *good* analog i/o might be interesting.

The ARM would need to host some programmable hardware LUTs to compete
with even this small mixed-type device. It escapes me why the MCUs with
even ~100 LUTs either do not exist at all at the lower end or are as
huge as Cyclone V/ZYNQ. If the signal frequency is ~50MHz, the MCU has
simply no chance to react. One needs to deploy an FPGA, which bumps up
the overengineering factor by two orders of magnitude. I see a lot of
applications for a mix of an ARM and a 1kLUT MACHXO3 device.

Best regards, Piotr

I think there are some SOCs (modest FPGA plus a small ARM) in the $20
range now.

We\'ll be seeing smallish FPGAs with a soft RISC-V core soon too. Soft
cores have been pretty bad up to now. Program space will still be a
restriction, but maybe a small FPGA with a megabyte of RAM or flash
and soft RISC-V would be a good product.

I believe Xilinx has a soft cortex M0/M3 that is free to use in their FPGAs

I\'ve seen several MB RAM in an SO8 package with a 133MHz QSPI interface,
that might be fast enough for some code
 

Welcome to EDABoard.com

Sponsor

Back
Top