M
Mike Monett
Guest
Joerg <notthisjoergsch@removethispacbell.net> wrote:
max current while both FETs are on.
Say the cross conduction current was a rectangular pulse, and you
wanted to limit the current spike to 1A from your 12V supply. If the
conduction overlap was 40ns, a rough calculation give an inductance
of
L = E * dt / di
= 12 * 40e-9 / 1
= 480nH
If you knew the actual pulse shape, a simulation in LTspice would
give a more accurate value. But it would be lower than the above
calculation.
A value this small would have little or no effect on the operation
at 100KHz. But limiting the current spike would greatly reduce EMI
to the rest of the circuit.
Best Regards,
Mike Monett
[...]Jon Slaughter wrote:
You could also put a small inductor in the positive leg to limit theFS---FDD8424H---Dual N & P Channel half-bridge 40V@20A 54mOhm.pdf
Thanks, Jon. Although they conduct already quite well between 2-3V
Vgs so there'll still be considerable cross conduction. I am
operating at 12V. Maybe I'll place zeners in the gate drive to
burn off some drive level.
max current while both FETs are on.
Say the cross conduction current was a rectangular pulse, and you
wanted to limit the current spike to 1A from your 12V supply. If the
conduction overlap was 40ns, a rough calculation give an inductance
of
L = E * dt / di
= 12 * 40e-9 / 1
= 480nH
If you knew the actual pulse shape, a simulation in LTspice would
give a more accurate value. But it would be lower than the above
calculation.
A value this small would have little or no effect on the operation
at 100KHz. But limiting the current spike would greatly reduce EMI
to the rest of the circuit.
Best Regards,
Mike Monett