Driver to drive?

[Kevin Aylward]

wrote in message news:5tq8dc98q4a44dqvr4ku90chmf5sjkj4nu@4ax.com...

On Thu, 23 Mar 2017 15:49:28 -0400, "Michael A. Terrell"
<mike.terrell@earthlink.net> wrote:

Kevin Aylward wrote:
"Cursitor Doom" wrote in message newsaruc8$b5u$4@dont-email.me...

On Mon, 20 Mar 2017 20:23:37 -0400, krw wrote:

It's obvious you're illiterate.

no point in reading further

I feel I should at this point apologise for the remarks made by my
fellow
countryman, Kev. He and the poster "tabbypurr" are both singularly ill-
informed on this issue. Their ignorance is only matched by their
indefatigable ability to repeat the same dogma over and over and over
again. You will never win an argument against them; they simply won't
listen to reason. Do yourself a big favour and mark the thread "ignore"
in your newsreader. You'll save yourself from a huge amount of wasted
time.

I appreciate the support.

I did find the word "illiterate" somewhat amusing in as much as that it
is typically the "intellectuals" that present the reasoned arguments on
ethical issues rather than the redneck southerners.


I would rather have a 'redneck' on my side in a fight, than an
'ineffectual' intellectual.

Kevin is just another leftist bigot.

ROTFLMAO

I guess you and the rest of the world has a different definition of bigot
and leftist.

Maybe one one day you will be able to present an argument other than an
ad-hominem attack, but I doubt it.

-- Kevin Aylward
http://www.anasoft.co.uk - SuperSpice
http://www.kevinaylward.co.uk/ee/index.html

 

On Friday, March 24, 2017 at 2:08:33 PM UTC-4, amdx wrote:

On 3/24/2017 11:40 AM, dagmargoodboat@yahoo.com wrote:
On Friday, March 24, 2017 at 10:13:18 AM UTC-4, amdx wrote:
On 3/24/2017 8:44 AM, amdx wrote:
On 3/23/2017 11:58 PM, amdx wrote:
On 3/23/2017 6:48 PM, dagmargoodboat@yahoo.com wrote:
On Thursday, March 23, 2017 at 2:52:11 PM UTC-4, amdx wrote:

OK, The circuit is built, I haven't tested it. I'm testing just the
circuit just the circuit posted.
I want to know how to drive the input.
Say I connect a 9 inch piece of RG58, that's 19pf, is that to much?
I want to drive it with a 50 ohm sig/gen.
Can I terminate the RG58 with 50 ohms or do I need to feed the RG58
with
a high impedance? Maybe a series 1Mohm.
I don't see how to separate the sig/gen cable from the input cable.
May I just need to connect it to the LC and see what I get.
Thank, Mikek


How about one step at a time? First, calibrate your input cap:

C1
.---. 0.3pF
| ~ |--------||----+----> A
'---' |
10V --- C2
--- 100pF
|
==
Measure V(A), calculate (don't forget to add your measuring instrument's
c.in to C2).


Easier said than done.
I have a pretty good capacitance tester. I made a .3pf cap :-/
and used an 82pf cap plus the probe, together they measured 106.7pf.
I applied 16Vpp and measured 0.06Vpp at A.
16 / 0.06 = 266.6 The voltage ratio is 266.6.
106.7 / 266.6 = 0.4
That makes my cap look like 0.4pf

Yes.

I measured the capacitance of a 6" x 8" piece (48sq in) of the PCB I
make my caps from, it measured 990 pf. 990 / 48 = 20.63pf per sq in.
My cap is 1/8" diameter or 0.01227 sq in.
So, 1sq in / 0.01227 sq in = 81.53
20.62pf/sq in / 81.53 = 0.253pf per 1/8" dia.
So fringing and lead to lead capacitance, I'm in the ballpark, just not
sure what field.
If you have any suggestions, I'm willing.
Way past my bedtime, good night.
Mikek

You're close enough for our purposes. The first measurement may be being
affected by stray capacitances, dunno. In the end all we'll care about
(when you use this thing) is getting 100mV out for 100mV in.

PS. PCB is Rogers Duroid 5880, I could not find a capacitance per sq in
number online.


I got out my better probe (Tek 6122 11pf) and made curly cues for the
probe tip.
Here's a picture of the tightened up circuit.
https://www.dropbox.com/s/sixe91dvxs40f1z/P1010193.JPG?dl=0


The new total capacitance, probe plus 82pf cap is 94pf. (measured)
16Vpp input, V(A) is 0.068Vpp. Then 16/0.068 = 235.3
235.3 / 94 = 2.5pf.

No, that should be 94pF * (.068V / 16V) = 0.4 pF.

This is a tighter measurement and also agrees with my calculation of
0.253 that I calculated for the pcb capacitance per sq in.
Rather than fight with a new piece of pcb material just slightly over
1/8" in diameter.
I'm going to go with a new value input cap of 0.25pf.
If you see this as a bad idea, let me know and I'll fumble around
and make a larger cap. I used a 1/8' paper punch to make this cap,
I could use a 1/4" and grind it down, but it's a chore.

It looks to me like your input cap is good, and 0.4pF. No need to change
it.

Now for the next measurement.
Is this with a T1 in the completed circuit?
Or, do I add the probe + 82pf back in to get a ratio?
Ya, I'm now confused.

Yes, it's time to use your calibrated in the completed, working circuit..
We'll want to measure the a.c. signal at the FET source first, then the
FET's drain.

I think we might want the voltage at the gate, but I
think that would be an impossible measurement. ie putting 11pf
probe across a 0.3pf cap ?
Thanks, Mikek



Ok, I tried this, out of circuit, just the FET.



T1 |--
.---. 0.3pF |
| ~ |--------||------>|--.
'---' | T1.s = 0.06Vpp
16Vpp |
|---probe tip
82pf –--
--- 12pf
|---probe ground
|
---
///

So, 16Vpp / 0.6Vpp = 266.6
266.6 / 94 = 2.84pf
2.84pf - 0.3pf = 2.54pf for the Cgs.
I think that's to low, I thought it was 5pf,
but I'm looking for your thoughts.

Thanks Mikek

Sorry, I wasn't clear enough. We're measuring in-circuit.

To check the effective input capacitance we want to know the attenuation
of the input a.c. voltage, as measured at point (A).

Rationale: The input voltage will be divided across your 0.40pF input
capacitor and the circuit's input capacitance:

Ccoupling
0.40pF .. .. ..
Vin >---||----:--+--o V(A)
: |
: --- Ceff
: ---
: |
: ==> > '.. .. ..

We can't measure at the gate--that's too high impedance--so we're measuring
at FET T1's source terminal, point (A).

If 63% of the voltage is lost across the 0.40pF series cap, then the
effective input capacitance is dropping 37%, which means the series
cap is 63% of the total reactance and Ceff is 37% of the total reactance.

More formally, Ceff = 0.40pF * (Vin - V(A)) / V(A).

(We're trying to measure Ceff.)

You can measure Vac at the FET source on the original circuit for comparison,
too. That's a good way to assess the relative performance of the new circuit
vs. the original (after correcting for any differences in the input coupling
caps, of course.)

(Kleijer said his input division ratio was 17:1, indicating his circuit's
input capacitance (Ceff) was 16 units, and his coupling cap was 1 unit of
capacitance, or Ceff = 16 x Ccoupling.)

We want to know the a.c. voltage @ (B) just to gauge how well our drain
portion of the bootstrap is working. The closer Vac(B) is to Vac(A), the
better we're doing. 1:1 would be ideal. 0.9 would be okay, less than 0.9
indicates a problem.

Here's the circuit, for reference, with probe points (A) and (B) marked:

(Remember, I'm showing a boot-strapped coax on the input, but we're not
using that yet. We want to keep the comparisons apples-to-apples, and
change only one thing at a time.)

+12V +12V
-+- -+-
| |
| [22k] R5
Q1 \| |
BC547B |---+-------.
.<| | |
| | |
(B)| [47k] R6 |
(shield) T1 |--' | |
----- BF256C | === |
----------||-+----->|--. |
---+- .4pF| (A)| Vdd --- C2
| | | -+- ---100n
| | | | |
| R1 [10M] | |/ Q2 |
| | +---| BC547B |
| | | |>. |
| | R3 [470] | |
| | | | | C3
| | | | | 100n
| +----||---+-----+-------+-----||---> to ampl.
| | C1 | |
| R2 [10M] 100pF R4 [470] --- C4
| | | --- 100n
| === === |
| |
'------------------------------+
|
Cin ~200fF [2.2k] R7
|
==> > HTH,
James Arthur


I'll need to read through this another time or two, as of yet,
I don't understand where I got that math messed up,

Here:
> >> 235.3 / 94 = 2.5pf.

You divided a ratio by 94pF -- that's the goof. You should've divided 94pF
by the ratio.

But I will figure it
out.

If you have two caps and the voltage is evenly divided, the caps are equal.
If you have two caps and one has 2/3rds the voltage and the other has
1/3rd, then one of the capacitances is twice as large as the other. And so on.

You applied 16V and got out 0.068V. That means one capacitance had 0.068V
across it, and the other had (16V - 0.68V). So the ratio of the capacitances
is, to be technically accurate, 0.068V / (16V - 0.068V) = 1:234.

That means the 94pF test capacitance is 234 times larger than your coupling
cap.

It's the reactance that divides the voltage here. The larger the
capacitance, the *lower* its reactance.

I need to complete my enclosure and get power and input/outputs installed.
Should I test this with the BNC connector in place and connected or
just a wire connected to my 0.4pf input cap?

You mean you want to hang a 2 or 3 pF BNC on the .2pF node we're measuring?
Don't add the BNC yet! Test this circuit like you use the other unit so we
can get a decent comparison first.

After we get all that working, THEN we'll adding the BNC, and try to
cancel its extra capacitance by driving its shield.

One step at a time.

I need to finish up a honey do, the bedroom fan got slow and hummed
loudly. I'm replacing it.
Mikek

Cheers,
James Arthur

 

[rickman]

On 3/24/2017 8:00 AM, amdx wrote:

On 3/24/2017 12:13 AM, rickman wrote:
On 3/24/2017 12:58 AM, amdx wrote:

PS. PCB is Rogers Duroid 5880, I could not find a capacitance per sq in
number online.

Don't they give a dielectric constant? That is important in RF work as
it impacts signal speed, impedance, etc. From that you can calculate
the capacitance (ignoring fringe effects).

Yes the dielectric constant is 2.20. I don't know how to figure the
capacitance from that, so it was easier to measure it than search out
how to calculate it.

Very simple formula

Eo k A
C = --------
d

C is capacitance in Farads,
Eo is permittivity of free space, Eo = 8.854x10-12 F/m,
k is relative permittivity a.k.a. dielectric constant of medium = 2.2,
A is area of plates in meters,
d is distance between plates in meters

Bob's your uncle.

I'm not familiar with calculating fringe effects, but it's hard to
imagine
there wouldn't be a simple way to figure that out for a pair of round
disks
separated by a dielectric. But I don't know for sure, even this might
best be done
with a 3D field solver. lol

Over my pay grade.

Also over your budget. But someone who uses one at work could solve it
for you. But like I said, for two round plates, this should have been
reduced to a formula somewhere. The smaller the plates and the closer
together, the larger the fringe effects will be (I think, maybe smaller
plates and farther apart mean larger fringe effect).

I think the parasitic capacitance of the other parts of the circuit
would be in this same ballpark, so I don't know how you would be able to
get close to the true value other than by measuring.


I thought of a different way physically to connect this up for
measurement, basically just tightening up the circuit. It should
eliminate the 60 Hz I had on the measurement, and maybe eliminate
some parasitic capacitance.

Tightening up the circuit? Are you using wrenches or a screwdriver?
You mean make it smaller?

The only part of the circuit that matters is the input resistors and the
gate of T1. I'm pretty sure the rest of the circuit will only have much
smaller secondary effects on the input capacitance. All that should be
mitigated by the low value of the series cap. But the leads coming to
the cap have capacitance too, just less. But this cap is so small even
the capacitance of the leads can be significant. That's the tradeoff,
make the cap smaller and the parasitics are larger in comparison. Make
the cap larger and it is less of a divider presenting a larger
capacitance to your circuit.

I will say I am impressed with what you have done so far. As Edison
said, "invention is 1% inspiration and 99% perspiration".

Let's not get carried away, all I did was build someone else's circuit.
Now that I'm mostly retired, I get a chance to do these things. The
real stumbling block is getting off the computer and doing them.
By the time I check my email, read the usenet groups check stock
futures, check my homepage, read a financial guru's page, check a
crystal radio forum and read another financial forum, 4 hours are gone
from my day. OK, going to the bench now. Well, after I check the market
futures!

I think you are following in Kleijer's footsteps and doing a great job.
That's my point. You are doing the perspiration part to extend
Kleijer's amp design.

I read your other two posts. I think you did a good job with the cap,
but I'm not sure you can measure the T1 gate capacitance that way.
Won't the value vary with the bias point? As the gate voltage varies
the width of the depletion zone varies and so the capacitance. So I
think you should calculate that capacitance, or maybe not worry about it
since it is going to be reduced greatly by the bootstrapping circuit.
Actually, the data sheet I have for the BF256C includes a graph of input
capacitance vs. gate-source voltage. Can't you read it from there?

--

Rick C

 

[Joerg]

On 2017-03-20 02:06, Tauno Voipio wrote:

On 19.3.17 15:20, amdx wrote:
On 3/14/2017 11:18 PM, billbowden wrote:
Which is a better design. Suppose you have a 6 inch length of PVC pipe
with
numerous turns of wire that has an inductance of say 200uH. Now
suppose you
use the same (6 inch) piece of PVC with a ferrite rod in the core with
considerably fewer turns of wire. Which one would capture the most
signal
at the AM Broadcast frequencies (500K to 2 Megs) and produce the
greatest
signal output? Would it be more ferrite, or more wire?


I'll run the experiment.

Do you want it tuned?

If not, I have no way to measure the signals of my local stations.
I need the resonance peaking to see the signal.

What diameter PVC?

I have 1/2" OD polystyrene that will allow a little closer coupling
between the ferrite and the wire. 400 turns #28 = 203uh air core.

I have 1/2" CPVC. actual OD. 0.615"
290 turns #28 = 200uh air core


I have 1/2 PVC, actual OD. 0.832. 175 turns #28 = 205uh air core.

Pick one.

I'll also wind one with less turns and use my best Q rod that is 8" long
x 0.375" diameter.

I will check three frequencies, 590Khz, 1290kHz and 1430Khz.

I made a post last night of the wrong experiment (6"dia not 6" long)
It has not shown up this morning, so I'll repeat my measurement method.

To measure the signal I have a very high input impedance amp with a
gain of 1.
I use the amp to drive a scope (ch 2) set at 50mV/div. I took the
channel 2 output from the back of the scope to drive a Boonton 92BD RF
millivolt meter. I use the scope to compare the visual to audio from a
portable radio to know where I am tuned.
Modulation causes a bit of amplitude bounce, but I do a visual average.

Let me know what you want.
Mikek


---
This email has been checked for viruses by Avast antivirus software.
https://www.avast.com/antivirus



Please do not use PVC as RF insulation or support pieces.
It is lossy to extremely lossy at RF.

Plasticized PVC ain't stellar but not horrid.

http://g3ynh.info/zdocs/comps/part_6.html

Or do they add a lot of vispipuuro into the mix in Finland?

--
Regards, Joerg

http://www.analogconsultants.com/

 

On Friday, March 24, 2017 at 4:42:21 PM UTC-4, dagmarg...@yahoo.com wrote:

On Friday, March 24, 2017 at 2:08:33 PM UTC-4, amdx wrote:
On 3/24/2017 11:40 AM, dagmargoodboat@yahoo.com wrote:
On Friday, March 24, 2017 at 10:13:18 AM UTC-4, amdx wrote:
On 3/24/2017 8:44 AM, amdx wrote:
On 3/23/2017 11:58 PM, amdx wrote:
On 3/23/2017 6:48 PM, dagmargoodboat@yahoo.com wrote:
On Thursday, March 23, 2017 at 2:52:11 PM UTC-4, amdx wrote:

OK, The circuit is built, I haven't tested it. I'm testing just the
circuit just the circuit posted.
I want to know how to drive the input.
Say I connect a 9 inch piece of RG58, that's 19pf, is that to much?
I want to drive it with a 50 ohm sig/gen.
Can I terminate the RG58 with 50 ohms or do I need to feed the RG58
with
a high impedance? Maybe a series 1Mohm.
I don't see how to separate the sig/gen cable from the input cable.
May I just need to connect it to the LC and see what I get.
Thank, Mikek


How about one step at a time? First, calibrate your input cap:

C1
.---. 0.3pF
| ~ |--------||----+----> A
'---' |
10V --- C2
--- 100pF
|
==
Measure V(A), calculate (don't forget to add your measuring instrument's
c.in to C2).


Easier said than done.
I have a pretty good capacitance tester. I made a .3pf cap :-/
and used an 82pf cap plus the probe, together they measured 106.7pf.
I applied 16Vpp and measured 0.06Vpp at A.
16 / 0.06 = 266.6 The voltage ratio is 266.6.
106.7 / 266.6 = 0.4
That makes my cap look like 0.4pf

Yes.

I measured the capacitance of a 6" x 8" piece (48sq in) of the PCB I
make my caps from, it measured 990 pf. 990 / 48 = 20.63pf per sq in.
My cap is 1/8" diameter or 0.01227 sq in.
So, 1sq in / 0.01227 sq in = 81.53
20.62pf/sq in / 81.53 = 0.253pf per 1/8" dia.
So fringing and lead to lead capacitance, I'm in the ballpark, just not
sure what field.
If you have any suggestions, I'm willing.
Way past my bedtime, good night.
Mikek

You're close enough for our purposes. The first measurement may be being
affected by stray capacitances, dunno. In the end all we'll care about
(when you use this thing) is getting 100mV out for 100mV in.

PS. PCB is Rogers Duroid 5880, I could not find a capacitance per sq in
number online.


I got out my better probe (Tek 6122 11pf) and made curly cues for the
probe tip.
Here's a picture of the tightened up circuit.
https://www.dropbox.com/s/sixe91dvxs40f1z/P1010193.JPG?dl=0


The new total capacitance, probe plus 82pf cap is 94pf. (measured)
16Vpp input, V(A) is 0.068Vpp. Then 16/0.068 = 235.3
235.3 / 94 = 2.5pf.

No, that should be 94pF * (.068V / 16V) = 0.4 pF.

This is a tighter measurement and also agrees with my calculation of
0.253 that I calculated for the pcb capacitance per sq in.
Rather than fight with a new piece of pcb material just slightly over
1/8" in diameter.
I'm going to go with a new value input cap of 0.25pf.
If you see this as a bad idea, let me know and I'll fumble around
and make a larger cap. I used a 1/8' paper punch to make this cap,
I could use a 1/4" and grind it down, but it's a chore.

It looks to me like your input cap is good, and 0.4pF. No need to change
it.

Now for the next measurement.
Is this with a T1 in the completed circuit?
Or, do I add the probe + 82pf back in to get a ratio?
Ya, I'm now confused.

Yes, it's time to use your calibrated in the completed, working circuit.
We'll want to measure the a.c. signal at the FET source first, then the
FET's drain.

I think we might want the voltage at the gate, but I
think that would be an impossible measurement. ie putting 11pf
probe across a 0.3pf cap ?
Thanks, Mikek



Ok, I tried this, out of circuit, just the FET.



T1 |--
.---. 0.3pF |
| ~ |--------||------>|--.
'---' | T1.s = 0.06Vpp
16Vpp |
|---probe tip
82pf –--
--- 12pf
|---probe ground
|
---
///

So, 16Vpp / 0.6Vpp = 266.6
266.6 / 94 = 2.84pf
2.84pf - 0.3pf = 2.54pf for the Cgs.
I think that's to low, I thought it was 5pf,
but I'm looking for your thoughts.

Thanks Mikek

Sorry, I wasn't clear enough. We're measuring in-circuit.

To check the effective input capacitance we want to know the attenuation
of the input a.c. voltage, as measured at point (A).

Rationale: The input voltage will be divided across your 0.40pF input
capacitor and the circuit's input capacitance:

Ccoupling
0.40pF .. .. ..
Vin >---||----:--+--o V(A)
: |
: --- Ceff
: ---
: |
: ==> > > '.. .. ..

We can't measure at the gate--that's too high impedance--so we're measuring
at FET T1's source terminal, point (A).

If 63% of the voltage is lost across the 0.40pF series cap, then the
effective input capacitance is dropping 37%, which means the series
cap is 63% of the total reactance and Ceff is 37% of the total reactance.

More formally, Ceff = 0.40pF * (Vin - V(A)) / V(A).

(We're trying to measure Ceff.)

You can measure Vac at the FET source on the original circuit for comparison,
too. That's a good way to assess the relative performance of the new circuit
vs. the original (after correcting for any differences in the input coupling
caps, of course.)

(Kleijer said his input division ratio was 17:1, indicating his circuit's
input capacitance (Ceff) was 16 units, and his coupling cap was 1 unit of
capacitance, or Ceff = 16 x Ccoupling.)

We want to know the a.c. voltage @ (B) just to gauge how well our drain
portion of the bootstrap is working. The closer Vac(B) is to Vac(A), the
better we're doing. 1:1 would be ideal. 0.9 would be okay, less than 0.9
indicates a problem.

Here's the circuit, for reference, with probe points (A) and (B) marked:

(Remember, I'm showing a boot-strapped coax on the input, but we're not
using that yet. We want to keep the comparisons apples-to-apples, and
change only one thing at a time.)

+12V +12V
-+- -+-
| |
| [22k] R5
Q1 \| |
BC547B |---+-------.
.<| | |
| | |
(B)| [47k] R6 |
(shield) T1 |--' | |
----- BF256C | === |
----------||-+----->|--. |
---+- .4pF| (A)| Vdd --- C2
| | | -+- ---100n
| | | | |
| R1 [10M] | |/ Q2 |
| | +---| BC547B |
| | | |>. |
| | R3 [470] | |
| | | | | C3
| | | | | 100n
| +----||---+-----+-------+-----||---> to ampl.
| | C1 | |
| R2 [10M] 100pF R4 [470] --- C4
| | | --- 100n
| === === |
| |
'------------------------------+
|
Cin ~200fF [2.2k] R7
|
==> > > HTH,
James Arthur


I'll need to read through this another time or two, as of yet,
I don't understand where I got that math messed up,

Here:
235.3 / 94 = 2.5pf.

You divided a ratio by 94pF -- that's the goof. You should've divided 94pF
by the ratio.

But I will figure it
out.

If you have two caps and the voltage is evenly divided, the caps are equal.
If you have two caps and one has 2/3rds the voltage and the other has
1/3rd, then one of the capacitances is twice as large as the other. And so on.

You applied 16V and got out 0.068V. That means one capacitance had 0.068V
across it, and the other had (16V - 0.68V). So the ratio of the capacitances
is, to be technically accurate, 0.068V / (16V - 0.068V) = 1:234.

That means the 94pF test capacitance is 234 times larger than your coupling
cap.

It's the reactance that divides the voltage here. The larger the
capacitance, the *lower* its reactance.


I need to complete my enclosure and get power and input/outputs installed.
Should I test this with the BNC connector in place and connected or
just a wire connected to my 0.4pf input cap?

You mean you want to hang a 2 or 3 pF BNC on the .2pF node we're measuring?
Don't add the BNC yet! Test this circuit like you use the other unit so we
can get a decent comparison first.

After we get all that working, THEN we'll adding the BNC, and try to

s/adding/try adding/

cancel its extra capacitance by driving its shield.

One step at a time.

Cheers,
James

 

[rickman]

On 3/24/2017 1:14 PM, Joerg wrote:

On 2017-03-20 02:06, Tauno Voipio wrote:
On 19.3.17 15:20, amdx wrote:
On 3/14/2017 11:18 PM, billbowden wrote:
Which is a better design. Suppose you have a 6 inch length of PVC pipe
with
numerous turns of wire that has an inductance of say 200uH. Now
suppose you
use the same (6 inch) piece of PVC with a ferrite rod in the core with
considerably fewer turns of wire. Which one would capture the most
signal
at the AM Broadcast frequencies (500K to 2 Megs) and produce the
greatest
signal output? Would it be more ferrite, or more wire?


I'll run the experiment.

Do you want it tuned?

If not, I have no way to measure the signals of my local stations.
I need the resonance peaking to see the signal.

What diameter PVC?

I have 1/2" OD polystyrene that will allow a little closer coupling
between the ferrite and the wire. 400 turns #28 = 203uh air core.

I have 1/2" CPVC. actual OD. 0.615"
290 turns #28 = 200uh air core


I have 1/2 PVC, actual OD. 0.832. 175 turns #28 = 205uh air core.

Pick one.

I'll also wind one with less turns and use my best Q rod that is 8" long
x 0.375" diameter.

I will check three frequencies, 590Khz, 1290kHz and 1430Khz.

I made a post last night of the wrong experiment (6"dia not 6" long)
It has not shown up this morning, so I'll repeat my measurement method.

To measure the signal I have a very high input impedance amp with a
gain of 1.
I use the amp to drive a scope (ch 2) set at 50mV/div. I took the
channel 2 output from the back of the scope to drive a Boonton 92BD RF
millivolt meter. I use the scope to compare the visual to audio from a
portable radio to know where I am tuned.
Modulation causes a bit of amplitude bounce, but I do a visual average.

Let me know what you want.


Please do not use PVC as RF insulation or support pieces.
It is lossy to extremely lossy at RF.


Plasticized PVC ain't stellar but not horrid.

http://g3ynh.info/zdocs/comps/part_6.html

Or do they add a lot of vispipuuro into the mix in Finland?

Are you reading the same page? It says PVC Tanδ is 0.04 - 0.14 at 1
MHz. That is in no way acceptable for the sort of high Q circuits that
are being discussed. That's comparable to wood, 0.059.

This page even lists PVC in the "Lossy" group as defined by Tanδ ≥ 0.01.

--

Rick C

 

[amdx]

On 3/24/2017 11:40 AM, dagmargoodboat@yahoo.com wrote:

On Friday, March 24, 2017 at 10:13:18 AM UTC-4, amdx wrote:
On 3/24/2017 8:44 AM, amdx wrote:
On 3/23/2017 11:58 PM, amdx wrote:
On 3/23/2017 6:48 PM, dagmargoodboat@yahoo.com wrote:
On Thursday, March 23, 2017 at 2:52:11 PM UTC-4, amdx wrote:

OK, The circuit is built, I haven't tested it. I'm testing just the
circuit just the circuit posted.
I want to know how to drive the input.
Say I connect a 9 inch piece of RG58, that's 19pf, is that to much?
I want to drive it with a 50 ohm sig/gen.
Can I terminate the RG58 with 50 ohms or do I need to feed the RG58
with
a high impedance? Maybe a series 1Mohm.
I don't see how to separate the sig/gen cable from the input cable.
May I just need to connect it to the LC and see what I get.
Thank, Mikek


How about one step at a time? First, calibrate your input cap:

C1
.---. 0.3pF
| ~ |--------||----+----> A
'---' |
10V --- C2
--- 100pF
|
===

Measure V(A), calculate (don't forget to add your measuring instrument's
c.in to C2).


Easier said than done.
I have a pretty good capacitance tester. I made a .3pf cap :-/
and used an 82pf cap plus the probe, together they measured 106.7pf.
I applied 16Vpp and measured 0.06Vpp at A.
16 / 0.06 = 266.6 The voltage ratio is 266.6.
106.7 / 266.6 = 0.4
That makes my cap look like 0.4pf

Yes.

I measured the capacitance of a 6" x 8" piece (48sq in) of the PCB I
make my caps from, it measured 990 pf. 990 / 48 = 20.63pf per sq in.
My cap is 1/8" diameter or 0.01227 sq in.
So, 1sq in / 0.01227 sq in = 81.53
20.62pf/sq in / 81.53 = 0.253pf per 1/8" dia.
So fringing and lead to lead capacitance, I'm in the ballpark, just not
sure what field.
If you have any suggestions, I'm willing.
Way past my bedtime, good night.
Mikek

You're close enough for our purposes. The first measurement may be being
affected by stray capacitances, dunno. In the end all we'll care about
(when you use this thing) is getting 100mV out for 100mV in.

PS. PCB is Rogers Duroid 5880, I could not find a capacitance per sq in
number online.


I got out my better probe (Tek 6122 11pf) and made curly cues for the
probe tip.
Here's a picture of the tightened up circuit.
https://www.dropbox.com/s/sixe91dvxs40f1z/P1010193.JPG?dl=0


The new total capacitance, probe plus 82pf cap is 94pf. (measured)
16Vpp input, V(A) is 0.068Vpp. Then 16/0.068 = 235.3
235.3 / 94 = 2.5pf.

No, that should be 94pF * (.068V / 16V) = 0.4 pF.

This is a tighter measurement and also agrees with my calculation of
0.253 that I calculated for the pcb capacitance per sq in.
Rather than fight with a new piece of pcb material just slightly over
1/8" in diameter.
I'm going to go with a new value input cap of 0.25pf.
If you see this as a bad idea, let me know and I'll fumble around
and make a larger cap. I used a 1/8' paper punch to make this cap,
I could use a 1/4" and grind it down, but it's a chore.

It looks to me like your input cap is good, and 0.4pF. No need to change
it.

Now for the next measurement.
Is this with a T1 in the completed circuit?
Or, do I add the probe + 82pf back in to get a ratio?
Ya, I'm now confused.

Yes, it's time to use your calibrated in the completed, working circuit.
We'll want to measure the a.c. signal at the FET source first, then the
FET's drain.

I think we might want the voltage at the gate, but I
think that would be an impossible measurement. ie putting 11pf
probe across a 0.3pf cap ?
Thanks, Mikek



Ok, I tried this, out of circuit, just the FET.



T1 |--
.---. 0.3pF |
| ~ |--------||------>|--.
'---' | T1.s = 0.06Vpp
16Vpp |
|---probe tip
82pf –--
--- 12pf
|---probe ground
|
---
///

So, 16Vpp / 0.6Vpp = 266.6
266.6 / 94 = 2.84pf
2.84pf - 0.3pf = 2.54pf for the Cgs.
I think that's to low, I thought it was 5pf,
but I'm looking for your thoughts.

Thanks Mikek

Sorry, I wasn't clear enough. We're measuring in-circuit.

To check the effective input capacitance we want to know the attenuation
of the input a.c. voltage, as measured at point (A).

Rationale: The input voltage will be divided across your 0.40pF input
capacitor and the circuit's input capacitance:

Ccoupling
0.40pF .. .. ..
Vin >---||----:--+--o V(A)
: |
: --- Ceff
: ---
: |
: ===
'.. .. ..

We can't measure at the gate--that's too high impedance--so we're measuring
at FET T1's source terminal, point (A).

If 63% of the voltage is lost across the 0.40pF series cap, then the
effective input capacitance is dropping 37%, which means the series
cap is 63% of the total reactance and Ceff is 37% of the total reactance.

More formally, Ceff = 0.40pF * (Vin - V(A)) / V(A).

(We're trying to measure Ceff.)

You can measure Vac at the FET source on the original circuit for comparison,
too. That's a good way to assess the relative performance of the new circuit
vs. the original (after correcting for any differences in the input coupling
caps, of course.)

(Kleijer said his input division ratio was 17:1, indicating his circuit's
input capacitance (Ceff) was 16 units, and his coupling cap was 1 unit of
capacitance, or Ceff = 16 x Ccoupling.)

We want to know the a.c. voltage @ (B) just to gauge how well our drain
portion of the bootstrap is working. The closer Vac(B) is to Vac(A), the
better we're doing. 1:1 would be ideal. 0.9 would be okay, less than 0.9
indicates a problem.

Here's the circuit, for reference, with probe points (A) and (B) marked:

(Remember, I'm showing a boot-strapped coax on the input, but we're not
using that yet. We want to keep the comparisons apples-to-apples, and
change only one thing at a time.)

+12V +12V
-+- -+-
| |
| [22k] R5
Q1 \| |
BC547B |---+-------.
.<| | |
| | |
(B)| [47k] R6 |
(shield) T1 |--' | |
----- BF256C | === |
----------||-+----->|--. |
---+- .4pF| (A)| Vdd --- C2
| | | -+- ---100n
| | | | |
| R1 [10M] | |/ Q2 |
| | +---| BC547B |
| | | |>. |
| | R3 [470] | |
| | | | | C3
| | | | | 100n
| +----||---+-----+-------+-----||---> to ampl.
| | C1 | |
| R2 [10M] 100pF R4 [470] --- C4
| | | --- 100n
| === === |
| |
'------------------------------+
|
Cin ~200fF [2.2k] R7
|
===
HTH,
James Arthur

I'll need to read through this another time or two, as of yet,
I don't understand where I got that math messed up, But I will figure it
out.
I need to complete my enclosure and get power and input/outputs installed.
Should I test this with the BNC connector in place and connected or
just a wire connected to my 0.4pf input cap?
I need to finish up a honey do, the bedroom fan got slow and hummed
loudly. I'm replacing it.
Mikek

---
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[Tauno Voipio]

On 24.3.17 19:14, Joerg wrote:

On 2017-03-20 02:06, Tauno Voipio wrote:
On 19.3.17 15:20, amdx wrote:
On 3/14/2017 11:18 PM, billbowden wrote:
Which is a better design. Suppose you have a 6 inch length of PVC pipe
with
numerous turns of wire that has an inductance of say 200uH. Now
suppose you
use the same (6 inch) piece of PVC with a ferrite rod in the core with
considerably fewer turns of wire. Which one would capture the most
signal
at the AM Broadcast frequencies (500K to 2 Megs) and produce the
greatest
signal output? Would it be more ferrite, or more wire?


I'll run the experiment.

Do you want it tuned?

If not, I have no way to measure the signals of my local stations.
I need the resonance peaking to see the signal.

What diameter PVC?

I have 1/2" OD polystyrene that will allow a little closer coupling
between the ferrite and the wire. 400 turns #28 = 203uh air core.

I have 1/2" CPVC. actual OD. 0.615"
290 turns #28 = 200uh air core


I have 1/2 PVC, actual OD. 0.832. 175 turns #28 = 205uh air core.

Pick one.

I'll also wind one with less turns and use my best Q rod that is 8" long
x 0.375" diameter.

I will check three frequencies, 590Khz, 1290kHz and 1430Khz.

I made a post last night of the wrong experiment (6"dia not 6" long)
It has not shown up this morning, so I'll repeat my measurement method.

To measure the signal I have a very high input impedance amp with a
gain of 1.
I use the amp to drive a scope (ch 2) set at 50mV/div. I took the
channel 2 output from the back of the scope to drive a Boonton 92BD RF
millivolt meter. I use the scope to compare the visual to audio from a
portable radio to know where I am tuned.
Modulation causes a bit of amplitude bounce, but I do a visual average.

Let me know what you want.
Mikek


---
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Please do not use PVC as RF insulation or support pieces.
It is lossy to extremely lossy at RF.


Plasticized PVC ain't stellar but not horrid.

http://g3ynh.info/zdocs/comps/part_6.html

Or do they add a lot of vispipuuro into the mix in Finland?

No, but there are many different mixes, none really good. Maybe
there is mämmi in the mix ...

--

-Tauno

 

[Cursitor Doom]

On Fri, 24 Mar 2017 04:58:23 -0700, tabbypurr wrote:

> You're wasting your time with him.

You don't know our Kev. He's not wasting his time one bit.

I'm all for sensible discussion but
once k & CD resort to stupid bs I don't see the point.

I haven't kept up with this thread and I don't know exactly what krw has
said, but I personally do maintain there is a perfectly solid case for
the death penalty when:

a) The crime is especially reprehensible
b) The identity of the perpetrator is beyond all question (not merely
"beyond reasonable doubt")
c) The mental capacity of the perpetrator was not impaired at the time

If that's what you call "stupid bs" then there's really nothing more I
can be bothered to say on the subject.

 

[Cursitor Doom]

On Fri, 24 Mar 2017 15:31:03 +0000, Kevin Aylward wrote:

Of course, assuming the allegations are true, then the crimes are
horrendous, and would certainly warrant life in prison, with no
possibility of parole

A most costly decision. Do you have any idea how much it costs to
incarcerate a prisoner in that category for that length of time? We have
an overcrowding crisis right now because the system is clogged up by 'bed-
blockers' who could easily be removed at zero further cost to the
taxpayer.

 

[amdx]

On 3/24/2017 11:47 AM, rickman wrote:

On 3/24/2017 8:00 AM, amdx wrote:
On 3/24/2017 12:13 AM, rickman wrote:
On 3/24/2017 12:58 AM, amdx wrote:

PS. PCB is Rogers Duroid 5880, I could not find a capacitance per sq in
number online.

Don't they give a dielectric constant? That is important in RF work as
it impacts signal speed, impedance, etc. From that you can calculate
the capacitance (ignoring fringe effects).

Yes the dielectric constant is 2.20. I don't know how to figure the
capacitance from that, so it was easier to measure it than search out
how to calculate it.

Very simple formula

Eo k A
C = --------
d

C is capacitance in Farads,
Eo is permittivity of free space, Eo = 8.854x10-12 F/m,
k is relative permittivity a.k.a. dielectric constant of medium = 2.2,
A is area of plates in meters,
d is distance between plates in meters

Bob's your uncle.


I'm not familiar with calculating fringe effects, but it's hard to
imagine
there wouldn't be a simple way to figure that out for a pair of round
disks
separated by a dielectric. But I don't know for sure, even this might
best be done
with a 3D field solver. lol

Over my pay grade.

Also over your budget. But someone who uses one at work could solve it
for you. But like I said, for two round plates, this should have been
reduced to a formula somewhere. The smaller the plates and the closer
together, the larger the fringe effects will be (I think, maybe smaller
plates and farther apart mean larger fringe effect).


I think the parasitic capacitance of the other parts of the circuit
would be in this same ballpark, so I don't know how you would be able to
get close to the true value other than by measuring.


I thought of a different way physically to connect this up for
measurement, basically just tightening up the circuit. It should
eliminate the 60 Hz I had on the measurement, and maybe eliminate
some parasitic capacitance.

Tightening up the circuit? Are you using wrenches or a screwdriver? You
mean make it smaller?

I thought you might say something about the way I connected the scope,
this makes a huge difference over running a 6" ground lead. Ringing
your circuit is often caused by the ground lead.

https://www.dropbox.com/s/sixe91dvxs40f1z/P1010193.JPG?dl=0

The only part of the circuit that matters is the input resistors and the
gate of T1. I'm pretty sure the rest of the circuit will only have much
smaller secondary effects on the input capacitance. All that should be
mitigated by the low value of the series cap. But the leads coming to
the cap have capacitance too, just less. But this cap is so small even
the capacitance of the leads can be significant. That's the tradeoff,
make the cap smaller and the parasitics are larger in comparison. Make
the cap larger and it is less of a divider presenting a larger
capacitance to your circuit.


I will say I am impressed with what you have done so far. As Edison
said, "invention is 1% inspiration and 99% perspiration".

Let's not get carried away, all I did was build someone else's circuit.
Now that I'm mostly retired, I get a chance to do these things. The
real stumbling block is getting off the computer and doing them.
By the time I check my email, read the usenet groups check stock
futures, check my homepage, read a financial guru's page, check a
crystal radio forum and read another financial forum, 4 hours are gone
from my day. OK, going to the bench now. Well, after I check the market
futures!

I think you are following in Kleijer's footsteps and doing a great job.
That's my point. You are doing the perspiration part to extend
Kleijer's amp design.

I read your other two posts. I think you did a good job with the cap,
but I'm not sure you can measure the T1 gate capacitance that way. Won't
the value vary with the bias point?

Probably.

As the gate voltage varies the

width of the depletion zone varies and so the capacitance. So I think
you should calculate that capacitance, or maybe not worry about it since
it is going to be reduced greatly by the bootstrapping circuit.
Actually, the data sheet I have for the BF256C includes a graph of input
capacitance vs. gate-source voltage. Can't you read it from there?

Post a link to that graph.
Thanks, Mikek



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[Joerg]

On 2017-03-24 10:59, rickman wrote:

On 3/24/2017 1:14 PM, Joerg wrote:
On 2017-03-20 02:06, Tauno Voipio wrote:

[...]

Please do not use PVC as RF insulation or support pieces.
It is lossy to extremely lossy at RF.


Plasticized PVC ain't stellar but not horrid.

http://g3ynh.info/zdocs/comps/part_6.html

Or do they add a lot of vispipuuro into the mix in Finland?

Are you reading the same page? It says PVC Tanδ is 0.04 - 0.14 at 1
MHz. That is in no way acceptable for the sort of high Q circuits that
are being discussed. That's comparable to wood, 0.059.

This page even lists PVC in the "Lossy" group as defined by Tanδ ≥ 0.01.

The losses in ferrite rods are nothing to sneeze at in comparison. I
have used both in ham radio a lot when I was young. I built kilowatt
level RF power amps, impedance matching boxes and similar gear. Ferrite
rods in transmitters sometimes became so hot that you could barely touch
them while inductors wound on some random piece of PVC pipe remained
cool. I don't remember the PVC type other than that it was remnants they
sold for pennies in the plumbing department so that was very likely well
plasticized.

My comeuppance happened when I made a wideband and thus tapered-wound
inductor on PVC pipe that was very long and I was concerned that it
might snap off during transport. Fielddays, contests and such often
required transport. So I took some allthread all the way to the top, big
washer, cinched it down good and called it a day. HUGE mistake. It
started to glow and melt the PVC. Luckily next to an open window as this
stuff can potentially kill.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[rickman]

On 3/24/2017 4:13 PM, amdx wrote:

On 3/24/2017 11:47 AM, rickman wrote:
On 3/24/2017 8:00 AM, amdx wrote:
On 3/24/2017 12:13 AM, rickman wrote:
On 3/24/2017 12:58 AM, amdx wrote:

PS. PCB is Rogers Duroid 5880, I could not find a capacitance per
sq in
number online.

Don't they give a dielectric constant? That is important in RF work as
it impacts signal speed, impedance, etc. From that you can calculate
the capacitance (ignoring fringe effects).

Yes the dielectric constant is 2.20. I don't know how to figure the
capacitance from that, so it was easier to measure it than search out
how to calculate it.

Very simple formula

Eo k A
C = --------
d

C is capacitance in Farads,
Eo is permittivity of free space, Eo = 8.854x10-12 F/m,
k is relative permittivity a.k.a. dielectric constant of medium = 2.2,
A is area of plates in meters,
d is distance between plates in meters

Bob's your uncle.


I'm not familiar with calculating fringe effects, but it's hard to
imagine
there wouldn't be a simple way to figure that out for a pair of round
disks
separated by a dielectric. But I don't know for sure, even this might
best be done
with a 3D field solver. lol

Over my pay grade.

Also over your budget. But someone who uses one at work could solve it
for you. But like I said, for two round plates, this should have been
reduced to a formula somewhere. The smaller the plates and the closer
together, the larger the fringe effects will be (I think, maybe smaller
plates and farther apart mean larger fringe effect).


I think the parasitic capacitance of the other parts of the circuit
would be in this same ballpark, so I don't know how you would be
able to
get close to the true value other than by measuring.


I thought of a different way physically to connect this up for
measurement, basically just tightening up the circuit. It should
eliminate the 60 Hz I had on the measurement, and maybe eliminate
some parasitic capacitance.

Tightening up the circuit? Are you using wrenches or a screwdriver? You
mean make it smaller?



I thought you might say something about the way I connected the scope,
this makes a huge difference over running a 6" ground lead. Ringing
your circuit is often caused by the ground lead.
https://www.dropbox.com/s/sixe91dvxs40f1z/P1010193.JPG?dl=0

Yes, I've used similar probes on high speed digital circuits because of
the ringing caused by long ground leads. But long I mean 3". Back in
the day we used ground leads that plugged into the scope rather than the
probe, lol.

The only part of the circuit that matters is the input resistors and the
gate of T1. I'm pretty sure the rest of the circuit will only have much
smaller secondary effects on the input capacitance. All that should be
mitigated by the low value of the series cap. But the leads coming to
the cap have capacitance too, just less. But this cap is so small even
the capacitance of the leads can be significant. That's the tradeoff,
make the cap smaller and the parasitics are larger in comparison. Make
the cap larger and it is less of a divider presenting a larger
capacitance to your circuit.


I will say I am impressed with what you have done so far. As Edison
said, "invention is 1% inspiration and 99% perspiration".

Let's not get carried away, all I did was build someone else's circuit.
Now that I'm mostly retired, I get a chance to do these things. The
real stumbling block is getting off the computer and doing them.
By the time I check my email, read the usenet groups check stock
futures, check my homepage, read a financial guru's page, check a
crystal radio forum and read another financial forum, 4 hours are gone
from my day. OK, going to the bench now. Well, after I check the market
futures!

I think you are following in Kleijer's footsteps and doing a great job.
That's my point. You are doing the perspiration part to extend
Kleijer's amp design.

I read your other two posts. I think you did a good job with the cap,
but I'm not sure you can measure the T1 gate capacitance that way. Won't
the value vary with the bias point?

Probably.

As the gate voltage varies the
width of the depletion zone varies and so the capacitance. So I think
you should calculate that capacitance, or maybe not worry about it since
it is going to be reduced greatly by the bootstrapping circuit.
Actually, the data sheet I have for the BF256C includes a graph of input
capacitance vs. gate-source voltage. Can't you read it from there?

Post a link to that graph.

My bad. This is for the BF256A which may or may not be the same part
with a selected zero gate voltage current.

https://www.onsemi.com/pub/Collateral/BF256A-D.PDF

--

Rick C

 

On Saturday, March 25, 2017 at 2:20:38 AM UTC+11, John Larkin wrote:

On Fri, 24 Mar 2017 11:02:32 +0100, Jeroen Belleman
jeroen@nospam.please> wrote:

On 2017-03-23 20:49, Michael A. Terrell wrote:


I would rather have a 'redneck' on my side in a fight, than an
'ineffectual' intellectual.


A redneck can help you win a fight, but you need the intellectuals
to have a chance to win the war.

Or to even start the war.

Hitler was well-read, though his choice of books left quite a bit to be desired, and probably counts as an intellectual. Trump does seem to be functionally illiterate, and may not appreciate quite how dangerous his belligerent anti-chinese tweets could be.

--
Bill Sloman, Sydney

 

On Friday, March 24, 2017 at 11:46:48 PM UTC-4, amdx wrote:

On 3/24/2017 11:40 AM, dagmargoodboat@yahoo.com wrote:
On Friday, March 24, 2017 at 10:13:18 AM UTC-4, amdx wrote:
On 3/24/2017 8:44 AM, amdx wrote:
On 3/23/2017 11:58 PM, amdx wrote:
On 3/23/2017 6:48 PM, dagmargoodboat@yahoo.com wrote:
On Thursday, March 23, 2017 at 2:52:11 PM UTC-4, amdx wrote:

OK, The circuit is built, I haven't tested it. I'm testing just the
circuit just the circuit posted.
I want to know how to drive the input.
Say I connect a 9 inch piece of RG58, that's 19pf, is that to much?
I want to drive it with a 50 ohm sig/gen.
Can I terminate the RG58 with 50 ohms or do I need to feed the RG58
with
a high impedance? Maybe a series 1Mohm.
I don't see how to separate the sig/gen cable from the input cable.
May I just need to connect it to the LC and see what I get.
Thank, Mikek


How about one step at a time? First, calibrate your input cap:

C1
.---. 0.3pF
| ~ |--------||----+----> A
'---' |
10V --- C2
--- 100pF
|
==
Measure V(A), calculate (don't forget to add your measuring instrument's
c.in to C2).


Easier said than done.
I have a pretty good capacitance tester. I made a .3pf cap :-/
and used an 82pf cap plus the probe, together they measured 106.7pf.
I applied 16Vpp and measured 0.06Vpp at A.
16 / 0.06 = 266.6 The voltage ratio is 266.6.
106.7 / 266.6 = 0.4
That makes my cap look like 0.4pf

Yes.

I measured the capacitance of a 6" x 8" piece (48sq in) of the PCB I
make my caps from, it measured 990 pf. 990 / 48 = 20.63pf per sq in.
My cap is 1/8" diameter or 0.01227 sq in.
So, 1sq in / 0.01227 sq in = 81.53
20.62pf/sq in / 81.53 = 0.253pf per 1/8" dia.
So fringing and lead to lead capacitance, I'm in the ballpark, just not
sure what field.
If you have any suggestions, I'm willing.
Way past my bedtime, good night.
Mikek

You're close enough for our purposes. The first measurement may be being
affected by stray capacitances, dunno. In the end all we'll care about
(when you use this thing) is getting 100mV out for 100mV in.

PS. PCB is Rogers Duroid 5880, I could not find a capacitance per sq in
number online.


I got out my better probe (Tek 6122 11pf) and made curly cues for the
probe tip.
Here's a picture of the tightened up circuit.
https://www.dropbox.com/s/sixe91dvxs40f1z/P1010193.JPG?dl=0


The new total capacitance, probe plus 82pf cap is 94pf. (measured)
16Vpp input, V(A) is 0.068Vpp. Then 16/0.068 = 235.3
235.3 / 94 = 2.5pf.

No, that should be 94pF * (.068V / 16V) = 0.4 pF.

This is a tighter measurement and also agrees with my calculation of
0.253 that I calculated for the pcb capacitance per sq in.
Rather than fight with a new piece of pcb material just slightly over
1/8" in diameter.
I'm going to go with a new value input cap of 0.25pf.
If you see this as a bad idea, let me know and I'll fumble around
and make a larger cap. I used a 1/8' paper punch to make this cap,
I could use a 1/4" and grind it down, but it's a chore.

It looks to me like your input cap is good, and 0.4pF. No need to change
it.

Now for the next measurement.
Is this with a T1 in the completed circuit?
Or, do I add the probe + 82pf back in to get a ratio?
Ya, I'm now confused.

Yes, it's time to use your calibrated in the completed, working circuit..
We'll want to measure the a.c. signal at the FET source first, then the
FET's drain.

I think we might want the voltage at the gate, but I
think that would be an impossible measurement. ie putting 11pf
probe across a 0.3pf cap ?
Thanks, Mikek



Ok, I tried this, out of circuit, just the FET.



T1 |--
.---. 0.3pF |
| ~ |--------||------>|--.
'---' | T1.s = 0.06Vpp
16Vpp |
|---probe tip
82pf –--
--- 12pf
|---probe ground
|
---
///

So, 16Vpp / 0.6Vpp = 266.6
266.6 / 94 = 2.84pf
2.84pf - 0.3pf = 2.54pf for the Cgs.
I think that's to low, I thought it was 5pf,
but I'm looking for your thoughts.

Thanks Mikek

Sorry, I wasn't clear enough. We're measuring in-circuit.

To check the effective input capacitance we want to know the attenuation
of the input a.c. voltage, as measured at point (A).

Rationale: The input voltage will be divided across your 0.40pF input
capacitor and the circuit's input capacitance:

Ccoupling
0.40pF .. .. ..
Vin >---||----:--+--o V(A)
: |
: --- Ceff
: ---
: |
: ==> > '.. .. ..

We can't measure at the gate--that's too high impedance--so we're measuring
at FET T1's source terminal, point (A).

If 63% of the voltage is lost across the 0.40pF series cap, then the
effective input capacitance is dropping 37%, which means the series
cap is 63% of the total reactance and Ceff is 37% of the total reactance.

More formally, Ceff = 0.40pF * (Vin - V(A)) / V(A).

(We're trying to measure Ceff.)

You can measure Vac at the FET source on the original circuit for comparison,
too. That's a good way to assess the relative performance of the new circuit
vs. the original (after correcting for any differences in the input coupling
caps, of course.)

(Kleijer said his input division ratio was 17:1, indicating his circuit's
input capacitance (Ceff) was 16 units, and his coupling cap was 1 unit of
capacitance, or Ceff = 16 x Ccoupling.)

We want to know the a.c. voltage @ (B) just to gauge how well our drain
portion of the bootstrap is working. The closer Vac(B) is to Vac(A), the
better we're doing. 1:1 would be ideal. 0.9 would be okay, less than 0.9
indicates a problem.


AC Voltage at B just slightly less than AC Voltage at A. I had to look
several times just to make sure there was a difference.

Okay, that means the drain bootstrap should be working.

Here's the circuit, for reference, with probe points (A) and (B) marked:

(Remember, I'm showing a boot-strapped coax on the input, but we're not
using that yet. We want to keep the comparisons apples-to-apples, and
change only one thing at a time.)


Preliminary data.
I have just a wire input like the original.
I have added my measured DC voltages to the schematic below.
With 1Vpp input, T1s has 0.25Vpp and the output is 0.24Vpp.
So, I think that means the bootstrap is working, I don't know how much
change to expect, but that seems good.

The voltage gain, input-to-output, is about 1/4, or roughly 4x better than
Kleijer's 1/17. But I was expecting to do a little better still and would
like to figure out what's up, if you're game for poking and prodding this
thing a bit more.

Your measurements mean we're dropping .75V across the 0.4pF coupling cap,
and 0.25V across our input capacitance at the FET gate. Our input
capacitance is thus about three times the coupling cap, or about 1.2pF.

In the morning I will compare this to the original.
Thanks, Mikek

You can compare to the original easily--temporarily connect R3 to ground
instead of to R4. That disables all of the bootstrapping, which makes the
new circuit operate as the original. Measure, and compare output voltage
without bootstrapping to the value obtained with bootstrapping. The
ratio tells us how much better we're doing than the original.

Also interesting: for the full circuit, 1V p-p input,
o Output voltage w/C2 connected vs. disconnected? (Tells us how effectively
the drain bootstrap is working.)
o Output voltage with 100pF temporarily shorting the 0.4pF? (So we can measure
the FET-follower voltage gain.)

Cheers,
James Arthur

+12V +12V
-+- -+-
| |
| [22k] R5
Q1 \| | 8.0v
BC547B |---+-------.
7.4v .<| | | input 1Vpp
| | | T1s 0.25Vpp
(B)| [47k] R6 | output 0.24Vpp
(shield) T1 |--' | |
----- BF256C | === |
----------||-+----->|--. |
---+- .4pF| (A)| Vdd --- C2
| | | -+- ---100n
| | | | |
| R1 [10M] | |/ Q2 |
| | 3.4v +---| BC547B |
| | | |>. |
| | R3 [470] |2.7v |
| | | | | C3
| | | | | 100n
| +----||---+-----+-------+-----||---> to ampl.
| | C1 | |
| R2 [10M] 100pF R4 [470] --- C4
| | | --- 100n
| === === |
| |
'------------------------------+
|
Cin ~200fF [2.2k] R7
|
==> > HTH,
James Arthur

 

[amdx]

On 3/24/2017 11:40 AM, dagmargoodboat@yahoo.com wrote:

On Friday, March 24, 2017 at 10:13:18 AM UTC-4, amdx wrote:
On 3/24/2017 8:44 AM, amdx wrote:
On 3/23/2017 11:58 PM, amdx wrote:
On 3/23/2017 6:48 PM, dagmargoodboat@yahoo.com wrote:
On Thursday, March 23, 2017 at 2:52:11 PM UTC-4, amdx wrote:

OK, The circuit is built, I haven't tested it. I'm testing just the
circuit just the circuit posted.
I want to know how to drive the input.
Say I connect a 9 inch piece of RG58, that's 19pf, is that to much?
I want to drive it with a 50 ohm sig/gen.
Can I terminate the RG58 with 50 ohms or do I need to feed the RG58
with
a high impedance? Maybe a series 1Mohm.
I don't see how to separate the sig/gen cable from the input cable.
May I just need to connect it to the LC and see what I get.
Thank, Mikek


How about one step at a time? First, calibrate your input cap:

C1
.---. 0.3pF
| ~ |--------||----+----> A
'---' |
10V --- C2
--- 100pF
|
===

Measure V(A), calculate (don't forget to add your measuring instrument's
c.in to C2).


Easier said than done.
I have a pretty good capacitance tester. I made a .3pf cap :-/
and used an 82pf cap plus the probe, together they measured 106.7pf.
I applied 16Vpp and measured 0.06Vpp at A.
16 / 0.06 = 266.6 The voltage ratio is 266.6.
106.7 / 266.6 = 0.4
That makes my cap look like 0.4pf

Yes.

I measured the capacitance of a 6" x 8" piece (48sq in) of the PCB I
make my caps from, it measured 990 pf. 990 / 48 = 20.63pf per sq in.
My cap is 1/8" diameter or 0.01227 sq in.
So, 1sq in / 0.01227 sq in = 81.53
20.62pf/sq in / 81.53 = 0.253pf per 1/8" dia.
So fringing and lead to lead capacitance, I'm in the ballpark, just not
sure what field.
If you have any suggestions, I'm willing.
Way past my bedtime, good night.
Mikek

You're close enough for our purposes. The first measurement may be being
affected by stray capacitances, dunno. In the end all we'll care about
(when you use this thing) is getting 100mV out for 100mV in.

PS. PCB is Rogers Duroid 5880, I could not find a capacitance per sq in
number online.


I got out my better probe (Tek 6122 11pf) and made curly cues for the
probe tip.
Here's a picture of the tightened up circuit.
https://www.dropbox.com/s/sixe91dvxs40f1z/P1010193.JPG?dl=0


The new total capacitance, probe plus 82pf cap is 94pf. (measured)
16Vpp input, V(A) is 0.068Vpp. Then 16/0.068 = 235.3
235.3 / 94 = 2.5pf.

No, that should be 94pF * (.068V / 16V) = 0.4 pF.

This is a tighter measurement and also agrees with my calculation of
0.253 that I calculated for the pcb capacitance per sq in.
Rather than fight with a new piece of pcb material just slightly over
1/8" in diameter.
I'm going to go with a new value input cap of 0.25pf.
If you see this as a bad idea, let me know and I'll fumble around
and make a larger cap. I used a 1/8' paper punch to make this cap,
I could use a 1/4" and grind it down, but it's a chore.

It looks to me like your input cap is good, and 0.4pF. No need to change
it.

Now for the next measurement.
Is this with a T1 in the completed circuit?
Or, do I add the probe + 82pf back in to get a ratio?
Ya, I'm now confused.

Yes, it's time to use your calibrated in the completed, working circuit.
We'll want to measure the a.c. signal at the FET source first, then the
FET's drain.

I think we might want the voltage at the gate, but I
think that would be an impossible measurement. ie putting 11pf
probe across a 0.3pf cap ?
Thanks, Mikek



Ok, I tried this, out of circuit, just the FET.



T1 |--
.---. 0.3pF |
| ~ |--------||------>|--.
'---' | T1.s = 0.06Vpp
16Vpp |
|---probe tip
82pf –--
--- 12pf
|---probe ground
|
---
///

So, 16Vpp / 0.6Vpp = 266.6
266.6 / 94 = 2.84pf
2.84pf - 0.3pf = 2.54pf for the Cgs.
I think that's to low, I thought it was 5pf,
but I'm looking for your thoughts.

Thanks Mikek

Sorry, I wasn't clear enough. We're measuring in-circuit.

To check the effective input capacitance we want to know the attenuation
of the input a.c. voltage, as measured at point (A).

Rationale: The input voltage will be divided across your 0.40pF input
capacitor and the circuit's input capacitance:

Ccoupling
0.40pF .. .. ..
Vin >---||----:--+--o V(A)
: |
: --- Ceff
: ---
: |
: ===
'.. .. ..

We can't measure at the gate--that's too high impedance--so we're measuring
at FET T1's source terminal, point (A).

If 63% of the voltage is lost across the 0.40pF series cap, then the
effective input capacitance is dropping 37%, which means the series
cap is 63% of the total reactance and Ceff is 37% of the total reactance.

More formally, Ceff = 0.40pF * (Vin - V(A)) / V(A).

(We're trying to measure Ceff.)

You can measure Vac at the FET source on the original circuit for comparison,
too. That's a good way to assess the relative performance of the new circuit
vs. the original (after correcting for any differences in the input coupling
caps, of course.)

(Kleijer said his input division ratio was 17:1, indicating his circuit's
input capacitance (Ceff) was 16 units, and his coupling cap was 1 unit of
capacitance, or Ceff = 16 x Ccoupling.)

We want to know the a.c. voltage @ (B) just to gauge how well our drain
portion of the bootstrap is working. The closer Vac(B) is to Vac(A), the
better we're doing. 1:1 would be ideal. 0.9 would be okay, less than 0.9
indicates a problem.

AC Voltage at B just slightly less than AC Voltage at A. I had to look
several times just to make sure there was a difference.

Here's the circuit, for reference, with probe points (A) and (B) marked:

(Remember, I'm showing a boot-strapped coax on the input, but we're not
using that yet. We want to keep the comparisons apples-to-apples, and
change only one thing at a time.)

Preliminary data.
I have just a wire input like the original.
I have added my measured DC voltages to the schematic below.
With 1Vpp input, T1s has 0.25Vpp and the output is 0.24Vpp.
So, I think that means the bootstrap is working, I don't know how much
change to expect, but that seems good.
In the morning I will compare this to the original.
Thanks, Mikek

+12V +12V
-+- -+-
| |
| [22k] R5
Q1 \| | 8.0v
BC547B |---+-------.
7.4v .<| | | input 1Vpp
| | | T1s 0.25Vpp
(B)| [47k] R6 | output 0.24Vpp
(shield) T1 |--' | |
----- BF256C | === |
----------||-+----->|--. |
---+- .4pF| (A)| Vdd --- C2
| | | -+- ---100n
| | | | |
| R1 [10M] | |/ Q2 |
| | 3.4v +---| BC547B |
| | | |>. |
| | R3 [470] |2.7v |
| | | | | C3
| | | | | 100n
| +----||---+-----+-------+-----||---> to ampl.
| | C1 | |
| R2 [10M] 100pF R4 [470] --- C4
| | | --- 100n
| === === |
| |
'------------------------------+
|
Cin ~200fF [2.2k] R7
|
===
HTH,
James Arthur

---
This email has been checked for viruses by Avast antivirus software.
https://www.avast.com/antivirus

 

On Fri, 24 Mar 2017 08:20:30 -0700, John Larkin
<jjlarkin@highlandtechnology.com> wrote:

On Fri, 24 Mar 2017 11:02:32 +0100, Jeroen Belleman
jeroen@nospam.please> wrote:

On 2017-03-23 20:49, Michael A. Terrell wrote:


I would rather have a 'redneck' on my side in a fight, than an
'ineffectual' intellectual.


A redneck can help you win a fight, but you need the intellectuals
to have a chance to win the war.

Jeroen Belleman

Or to even start the war.

Bingo!

 

On Fri, 24 Mar 2017 15:31:40 -0000, "Kevin Aylward"
<kevinRemovAT@kevinaylward.co.uk> wrote:

wrote in message news:5tq8dc98q4a44dqvr4ku90chmf5sjkj4nu@4ax.com...

On Thu, 23 Mar 2017 15:49:28 -0400, "Michael A. Terrell"
mike.terrell@earthlink.net> wrote:

Kevin Aylward wrote:
"Cursitor Doom" wrote in message newsaruc8$b5u$4@dont-email.me...

On Mon, 20 Mar 2017 20:23:37 -0400, krw wrote:

It's obvious you're illiterate.

no point in reading further

I feel I should at this point apologise for the remarks made by my
fellow
countryman, Kev. He and the poster "tabbypurr" are both singularly ill-
informed on this issue. Their ignorance is only matched by their
indefatigable ability to repeat the same dogma over and over and over
again. You will never win an argument against them; they simply won't
listen to reason. Do yourself a big favour and mark the thread "ignore"
in your newsreader. You'll save yourself from a huge amount of wasted
time.

I appreciate the support.

I did find the word "illiterate" somewhat amusing in as much as that it
is typically the "intellectuals" that present the reasoned arguments on
ethical issues rather than the redneck southerners.


I would rather have a 'redneck' on my side in a fight, than an
'ineffectual' intellectual.

Kevin is just another leftist bigot.

ROTFLMAO

You said it, Kevin. Deal with it.

I guess you and the rest of the world has a different definition of bigot
and leftist.

No, you just can't even read what you wrote. You *are* a bigot.

Maybe one one day you will be able to present an argument other than an
ad-hominem attack, but I doubt it.

Stating a *fact*. You _are_ a bigot.

 

On Fri, 24 Mar 2017 23:46:21 -0000 (UTC), Cursitor Doom
<curd@notformail.com> wrote:

On Fri, 24 Mar 2017 04:58:23 -0700, tabbypurr wrote:

You're wasting your time with him.

You don't know our Kev. He's not wasting his time one bit.


I'm all for sensible discussion but
once k & CD resort to stupid bs I don't see the point.

I haven't kept up with this thread and I don't know exactly what krw has
said, but I personally do maintain there is a perfectly solid case for
the death penalty when:

Kevin believes that all killing is murder. Since he is unwilling to
use a common language in his argument, there is no point continuing.
You can't argue with a liar. You should know that by your dealings
with Slowman.

a) The crime is especially reprehensible
b) The identity of the perpetrator is beyond all question (not merely
"beyond reasonable doubt")
c) The mental capacity of the perpetrator was not impaired at the time

If that's what you call "stupid bs" then there's really nothing more I
can be bothered to say on the subject.

 

On Fri, 24 Mar 2017 09:08:31 -0400, "Michael A. Terrell"
<mike.terrell@earthlink.net> wrote:

tabbypurr@gmail.com wrote:
On Thursday, 23 March 2017 19:49:33 UTC, Michael Terrell wrote:
Kevin Aylward wrote:
"Cursitor Doom" wrote in message newsaruc8$b5u$4@dont-email.me...
On Mon, 20 Mar 2017 20:23:37 -0400, krw wrote:

It's obvious you're illiterate.

no point in reading further

I feel I should at this point apologise for the remarks made by my fellow
countryman, Kev. He and the poster "tabbypurr" are both singularly ill-
informed on this issue. Their ignorance is only matched by their
indefatigable ability to repeat the same dogma over and over and over
again. You will never win an argument against them; they simply won't
listen to reason. Do yourself a big favour and mark the thread "ignore"
in your newsreader. You'll save yourself from a huge amount of wasted
time.

I appreciate the support.

He's offering bs not support. In case there's any confusion I agree with kevin's conclusions.


In that case, you have my pity.

The willfully stupid deserve no pity.