don\\\'t read this unless you empathize with ...(arg)...

[bitrex]

On 11/5/2020 6:45 PM, Don Y wrote:

On 11/5/2020 2:38 PM, bitrex wrote:
[This is why you want an interviewee who asks questions instead of just
picking up a pen and writing down the first (only?) solution that comes
to mind.]

A solution that well-satisfies the stated requirements of the problem
but doesn\'t satisfy some further unstated requirement that turns up
later is just the kind of client or employer you may not want to work
for and is something that is complained about with respect to
questions asked here all the time.

If the potential employer changed the goal-posts during/after the problem
was posed, you can simply condition your answer based on that additional
information.

Telling an applicant to sort a list -- and, LATER, telling him that the
items in the list are 200 character strings -- can be used to force
the applicant to consider tweeks to his implementation when the cost
of \"moving\" an item is considerably increased.  How he addresses this
shows that he understands the cost of copies, etc.

Basically the problem is that as stated the original question is too
trivial to be able to deduce much about anyone\'s true software design or
programming or whatever you want to call it, ability.

It\'s a lousy question in isolation that doesn\'t reveal much other than
to weed out total non-hackers, or to (unjustly IMO) weed out someone who
doesn\'t know or can\'t remember the closed form that day but otherwise
wrote some code that did what was required.

Making it part of a larger problem where one might have to write an
algorithm or function that computes such a sum, as a component of a
larger task, would be more enlightening when someone\'s particular
solution to the sub-problem is viewed in a context.

If say the goal was to do the more complex task in a timeframe and the
code is otherwise good and comes in under the time limit but they use
that solution to basically get-r-done and didn\'t sit around wasting time
trying to remember a formula then that seems sensible.

 

[bitrex]

On 11/5/2020 6:39 PM, Don Y wrote:

On 11/5/2020 2:34 PM, bitrex wrote:
On 11/5/2020 3:54 PM, Don Y wrote:
[This is why you want an interviewee who asks questions instead of just
picking up a pen and writing down the first (only?) solution that comes
to mind.]

If one\'s hiring software engineers it would seem logical to test them
on software engineering, not their knowledge of sequences & series.
I\'ve probably learned and forgot and re-learned n(n + 2)/2 a
half-dozen times over my life.

But you\'d likely remember that you KNEW such a thing and would strive to
recall it (or, rederive it).  Employment exams are rarely very difficult;
this is intentional.  The point is to draw out how the applicant approaches
the problem, not how well he happens to know the syntax of a particular
implementation language.

[Note that sum of 1..n is actually n(n+1)/2; you\'d have tested that, in
your head, before committing to it, on paper.  If I saw you doing an
exercise like that, I\'d inquire as to what you were doing and why -- and
already have my \"answer\"... even if you ended up with the wrong expression
(cuz I know you\'d EVENTUALLY get it)]

My math skills were pretty good when I was using it more, it seems to be
a use-it-or-lose it type of skill. This is from several years back:

<https://physics.stackexchange.com/questions/82949/steady-state-of-diffusion-current-in-semiconductors/88813#88813>

I doubt I could put this attempt at an answer together currently, I\'d
need to hit the books again for a while and refresh.

 

[Rickster C]

On Thursday, November 5, 2020 at 3:09:06 PM UTC-5, John Larkin wrote:

On Thu, 5 Nov 2020 14:10:30 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 11/5/20 1:49 PM, Don Y wrote:
On 11/5/2020 11:22 AM, Edward Rawde wrote:
I\'ve seen people use expensive chips when a diode and resistor would have
been fine.

But then I was introduced to logic gates as diodes, resistors and the
occasional transistor if an inverter was needed.

A fellow I worked with designed a graphic LCD interface.  As he was unsure
of the exact logic required to derive a few of the control signals, he
installed an *EPROM* to act as a crude PLA.  This let him release the
board to manufacturing while he tinkered with the contents of the EPROM.

I looked at the functionality that it was effectively providing.  It
(and the time to PROGRAM it!) could be replaced by a quad NAND and hex
inverter.

shakes head

Don L talks about doing that in the CMOS Cookbook, iirc. The next most
general way he gave to implement a truth table directly was data
selector logic. I once did the logic for a hot-spare system in a satcom
central station with a CD4067B.

Cheers

Phil Hobbs

Is it legal to use an analog mux for logic?

Sssshhhh! That\'s what they use in the LUTs of FPGAs. Don\'t put them out of business when people find out they\'ve been using transmission gates instead of logic!


> An open-drain decoder makes a nice anything logic block.

If you don\'t mind being slow on the rebound.

I had a job interview where the guy presented me a logic puzzle and I
used a decoder. That annoyed him and he flunked me. Just as well, I
would have wound up living in Los Angeles.

I take it you didn\'t hire him?

--

Rick C.

-+ Get 1,000 miles of free Supercharging
-+ Tesla referral code - https://ts.la/richard11209

 

[Rickster C]

On Thursday, November 5, 2020 at 3:37:51 PM UTC-5, bitrex wrote:

On 11/5/2020 11:45 AM, Phil Hobbs wrote:
On 11/5/20 11:18 AM, jlarkin@highlandsniptechnology.com wrote:
On Wed, 4 Nov 2020 23:55:15 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

The server at nntp.olduse.net is serving up selected parts of Usenet
with a 30-year delay.  This one from sci.electronics may have some
points of contact for our recent discussions about analogue
engineering.

Cheers

Phil Hobbs

On 11/2/90 12:05 PM, Scott T. Dupuie wrote:
In article <11242.2730bfd5@ecs.umass.edu> tohline@ecs.umass.edu
(Chris Tohline) writes:

as a college sophmore I felt very confident about my major, computer
systems engineering.  Then, I took a BASIC circuit analysis class.
now, I am very frusterated.  Am I lost because my teacher is poor, or
is this just a difficult subject to grasp?  I refuse to live with a
\'C\'
and am very frusterated.  But I\'m sure someday it will click and I\'ll
be happy again.

Chris Tohline

tohline@ecs.umass.edu

Chris,

This has been one of my \"pet peeves\" since I began my education in EE
8 years ago. I am currently completing a M.S. degree in this field, and
have spent some time teaching and working in industry as well. As
much as
the academics may object, I can tell you with some certainty that your
introductory circuit analysis course has very little to do with *real*
analog engineering. It seems that most universities like to use this
course
as a vehicle for \"weeding out\" what they consider to be unsuitable
students. In addition to this, many of the faculty stuck teaching this
course know very little about the subject as it pertains to real life
design issues. They act as though they are being punished by being
forced
to teach this class. This is unfortunate, since it tends to turn off
many
young engineering students to the field of analog circuit design. I
can\'t
tell you how many students I\'ve known through the years that
switched to
digital design (no pun intended) because of the experience thay had
in a
similar circuits course. Perhaps this is one of the reasons why
there are
so few analog design engineers out there and why they are in such high
demand. I can\'t tell you what to do about your particular situation,
but if
you stick it out, as I did, the rewards are many.

Scott T. Dupuie
The Ohio State University
Department of Electrical Engineering
dupuie@parts.eng.ohio-state.edu



I thought freshman chemistry was the classic weeder course.

I can see how a bad instructor handing out bad grades could turn kids
off from analog electronics. It should be fun.

I never took any digital design courses. They looked awfully abstract
to me. Does anyone actually use Karnaugh map minimization?

Once in a great while when I need some bit of glue logic in an
out-of-the-way spot and need good timing, or when I\'ve run out of MCU pins.

It only works up to 4 inputs, but it allows you to use visual pattern
matching, which is quicker and much more fun than Boolean logic
minimization.

There are flexible gate chips (lineal descendents of the classical,
horrible and-or-invert gate) that can do several K maps in one small
package.  Typical examples are the SN74LVC1G57 / 58, which between them
can make any 2-input logic function and quite a lot of 3-input ones.

Cheers

Phil Hobbs



The mechanized/computational version of K-mapping, Quine-McCluskey
algorithm, works for arbitrary number of boolean input variables, but
boolean satisfiability is NP-complete so it runs in exponential time.

Not sure exactly how many inputs taps it out on modern consumer hardware
but like the traveling salesman problem it\'s relatively low if one wants
an exact solution, for logic minimization with large numbers of input
variables one must resort to heuristics, genetic algorithms, that sort
of stuff.

I don\'t follow your use of the term \"inputs taps it out\", but anything of any real complexity is not done with gates, it is done with 4 input LUTs and I just consider how many of those it will take, not any details of the logic within. Of course once the logic gets very complex, like in a long case statement, trying to estimate the logic is pointless.

Anything I need to do on a board is fairly trivial. Usually I can do it in my head. Sometimes I find ways of optimizing with non-logic logic like wire or\'s from the way something is coming on board or the way level shifting transistors are used.

There are a number of flexible single gate devices that can implement many functions of two inputs and some three input functions like muxes. Sort of makes individual gates irrelevant.

--

Rick C.

+- Get 1,000 miles of free Supercharging
+- Tesla referral code - https://ts.la/richard11209

 

[whit3rd]

On Thursday, November 5, 2020 at 12:22:37 PM UTC-8, bitrex wrote:

There have been reports of coding interviews where the interviewee was
flunked for using a loop to sum the first 20 integers rather than using
n(n + 2)/2 to return the result directly.

.... should be n(n + 1)/2, actually

 

[Phil Hobbs]

On 11/5/20 8:17 PM, bitrex wrote:

On 11/5/2020 6:39 PM, Don Y wrote:
On 11/5/2020 2:34 PM, bitrex wrote:
On 11/5/2020 3:54 PM, Don Y wrote:
[This is why you want an interviewee who asks questions instead of just
picking up a pen and writing down the first (only?) solution that comes
to mind.]

If one\'s hiring software engineers it would seem logical to test them
on software engineering, not their knowledge of sequences & series.
I\'ve probably learned and forgot and re-learned n(n + 2)/2 a
half-dozen times over my life.

But you\'d likely remember that you KNEW such a thing and would strive to
recall it (or, rederive it).  Employment exams are rarely very difficult;
this is intentional.  The point is to draw out how the applicant
approaches
the problem, not how well he happens to know the syntax of a particular
implementation language.

[Note that sum of 1..n is actually n(n+1)/2; you\'d have tested that, in
your head, before committing to it, on paper.  If I saw you doing an
exercise like that, I\'d inquire as to what you were doing and why -- and
already have my \"answer\"... even if you ended up with the wrong
expression
(cuz I know you\'d EVENTUALLY get it)]

My math skills were pretty good when I was using it more, it seems to be
a use-it-or-lose it type of skill. This is from several years back:

https://physics.stackexchange.com/questions/82949/steady-state-of-diffusion-current-in-semiconductors/88813#88813


I doubt I could put this attempt at an answer together currently, I\'d
need to hit the books again for a while and refresh.

They obviously did you proud at art school.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[server]

On Thu, 5 Nov 2020 22:00:16 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 11/5/20 8:17 PM, bitrex wrote:
On 11/5/2020 6:39 PM, Don Y wrote:
On 11/5/2020 2:34 PM, bitrex wrote:
On 11/5/2020 3:54 PM, Don Y wrote:
[This is why you want an interviewee who asks questions instead of just
picking up a pen and writing down the first (only?) solution that comes
to mind.]

If one\'s hiring software engineers it would seem logical to test them
on software engineering, not their knowledge of sequences & series.
I\'ve probably learned and forgot and re-learned n(n + 2)/2 a
half-dozen times over my life.

But you\'d likely remember that you KNEW such a thing and would strive to
recall it (or, rederive it).  Employment exams are rarely very difficult;
this is intentional.  The point is to draw out how the applicant
approaches
the problem, not how well he happens to know the syntax of a particular
implementation language.

[Note that sum of 1..n is actually n(n+1)/2; you\'d have tested that, in
your head, before committing to it, on paper.  If I saw you doing an
exercise like that, I\'d inquire as to what you were doing and why -- and
already have my \"answer\"... even if you ended up with the wrong
expression
(cuz I know you\'d EVENTUALLY get it)]

My math skills were pretty good when I was using it more, it seems to be
a use-it-or-lose it type of skill. This is from several years back:

https://physics.stackexchange.com/questions/82949/steady-state-of-diffusion-current-in-semiconductors/88813#88813


I doubt I could put this attempt at an answer together currently, I\'d
need to hit the books again for a while and refresh.

They obviously did you proud at art school.

Cheers

Phil Hobbs

I never did understand how a transistor works. Doesn\'t seem to matter.



--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard

 

[bitrex]

On 11/5/2020 10:00 PM, Phil Hobbs wrote:

On 11/5/20 8:17 PM, bitrex wrote:
On 11/5/2020 6:39 PM, Don Y wrote:
On 11/5/2020 2:34 PM, bitrex wrote:
On 11/5/2020 3:54 PM, Don Y wrote:
[This is why you want an interviewee who asks questions instead of
just
picking up a pen and writing down the first (only?) solution that
comes
to mind.]

If one\'s hiring software engineers it would seem logical to test
them on software engineering, not their knowledge of sequences &
series. I\'ve probably learned and forgot and re-learned n(n + 2)/2 a
half-dozen times over my life.

But you\'d likely remember that you KNEW such a thing and would strive to
recall it (or, rederive it).  Employment exams are rarely very
difficult;
this is intentional.  The point is to draw out how the applicant
approaches
the problem, not how well he happens to know the syntax of a particular
implementation language.

[Note that sum of 1..n is actually n(n+1)/2; you\'d have tested that, in
your head, before committing to it, on paper.  If I saw you doing an
exercise like that, I\'d inquire as to what you were doing and why -- and
already have my \"answer\"... even if you ended up with the wrong
expression
(cuz I know you\'d EVENTUALLY get it)]

My math skills were pretty good when I was using it more, it seems to
be a use-it-or-lose it type of skill. This is from several years back:

https://physics.stackexchange.com/questions/82949/steady-state-of-diffusion-current-in-semiconductors/88813#88813


I doubt I could put this attempt at an answer together currently, I\'d
need to hit the books again for a while and refresh.

They obviously did you proud at art school.

Cheers

Phil Hobbs

My undergrad was liberal arts, there was a computer science department
and a mathematics department and a physics department and so forth at my
liberal arts college.

I mean they weren\'t _exceptional_ departments and it did take about the
better part of a decade to understand some of what I learned in those
classes but they were there.

It\'s why they call it \"liberal arts\"! A broad education. Like sitting
around chatting with Plato in olden times as opposed to a strictly
vocational/trades education like Jesus had.

<https://youtu.be/5XmV9iFawmc?t=4>

 

[Jasen Betts]

On 2020-11-05, John Larkin <jlarkin@highland_atwork_technology.com> wrote:

On Thu, 5 Nov 2020 14:10:30 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 11/5/20 1:49 PM, Don Y wrote:
On 11/5/2020 11:22 AM, Edward Rawde wrote:
I\'ve seen people use expensive chips when a diode and resistor would have
been fine.

But then I was introduced to logic gates as diodes, resistors and the
occasional transistor if an inverter was needed.

A fellow I worked with designed a graphic LCD interface.  As he was unsure
of the exact logic required to derive a few of the control signals, he
installed an *EPROM* to act as a crude PLA.  This let him release the
board to manufacturing while he tinkered with the contents of the EPROM.

I looked at the functionality that it was effectively providing.  It
(and the time to PROGRAM it!) could be replaced by a quad NAND and hex
inverter.

shakes head

Don L talks about doing that in the CMOS Cookbook, iirc. The next most
general way he gave to implement a truth table directly was data
selector logic. I once did the logic for a hot-spare system in a satcom
central station with a CD4067B.

Cheers

Phil Hobbs

Is it legal to use an analog mux for logic?

If you call it a transmission gate it is.

--
Jasen.

 

[server]

On Fri, 6 Nov 2020 04:40:22 -0000 (UTC), Jasen Betts
<usenet@revmaps.no-ip.org> wrote:

On 2020-11-05, John Larkin <jlarkin@highland_atwork_technology.com> wrote:
On Thu, 5 Nov 2020 14:10:30 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 11/5/20 1:49 PM, Don Y wrote:
On 11/5/2020 11:22 AM, Edward Rawde wrote:
I\'ve seen people use expensive chips when a diode and resistor would have
been fine.

But then I was introduced to logic gates as diodes, resistors and the
occasional transistor if an inverter was needed.

A fellow I worked with designed a graphic LCD interface.  As he was unsure
of the exact logic required to derive a few of the control signals, he
installed an *EPROM* to act as a crude PLA.  This let him release the
board to manufacturing while he tinkered with the contents of the EPROM.

I looked at the functionality that it was effectively providing.  It
(and the time to PROGRAM it!) could be replaced by a quad NAND and hex
inverter.

shakes head

Don L talks about doing that in the CMOS Cookbook, iirc. The next most
general way he gave to implement a truth table directly was data
selector logic. I once did the logic for a hot-spare system in a satcom
central station with a CD4067B.

Cheers

Phil Hobbs

Is it legal to use an analog mux for logic?

If you call it a transmission gate it is.

Some of the tg\'s and usb switches make great analog switches.



--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard

 

[Don Y]

On 11/5/2020 5:57 PM, bitrex wrote:

On 11/5/2020 6:39 PM, Don Y wrote:
On 11/5/2020 2:34 PM, bitrex wrote:
On 11/5/2020 3:54 PM, Don Y wrote:
[This is why you want an interviewee who asks questions instead of just
picking up a pen and writing down the first (only?) solution that comes
to mind.]

If one\'s hiring software engineers it would seem logical to test them on
software engineering, not their knowledge of sequences & series. I\'ve
probably learned and forgot and re-learned n(n + 2)/2 a half-dozen times
over my life.

But you\'d likely remember that you KNEW such a thing and would strive to
recall it (or, rederive it). Employment exams are rarely very difficult;
this is intentional. The point is to draw out how the applicant approaches
the problem, not how well he happens to know the syntax of a particular
implementation language.

The question wasn\'t on what the interviewee did or didn\'t know about closed
forms of sums of series it was about writing a function to sum the first 20
integers. Which they did adequately.

And I\'m sure they could iterate through an array of integers and sort them,
\"adequately\" -- using a naive \"where does this one fit\" approach. All that
would prove is they know how to write code.

I\'d expect a software engineer to understand that there are different
sort algorithms and the tradeoffs of each. Just like you\'d expect a
hardware designer to understand that BJTs and FETs are both \"switches\"
(of sorts) -- but with different application characteristics.

It was a simple solution for a simple problem, seems like a perfectly valid
approach to me. And a modern optimizing compiler may even be able to optimize
them both to the same code for small inputs.

[Note that sum of 1..n is actually n(n+1)/2; you\'d have tested that, in
your head, before committing to it, on paper. If I saw you doing an
exercise like that, I\'d inquire as to what you were doing and why -- and
already have my \"answer\"... even if you ended up with the wrong expression
(cuz I know you\'d EVENTUALLY get it)]

See? Seven times. Thankfully I\'m not paid to remember or derive math facts I
sometime tend to forget but can look up.

If you were writing code continuously, these would be self-refreshing facts.
It\'s not like asking what the area of a pentagon circumscribed circle of
radius \'r\' would be.

 

[Don Y]

On 11/5/2020 6:10 PM, bitrex wrote:

On 11/5/2020 6:45 PM, Don Y wrote:
On 11/5/2020 2:38 PM, bitrex wrote:
[This is why you want an interviewee who asks questions instead of just
picking up a pen and writing down the first (only?) solution that comes
to mind.]

A solution that well-satisfies the stated requirements of the problem but
doesn\'t satisfy some further unstated requirement that turns up later is
just the kind of client or employer you may not want to work for and is
something that is complained about with respect to questions asked here all
the time.

If the potential employer changed the goal-posts during/after the problem
was posed, you can simply condition your answer based on that additional
information.

Telling an applicant to sort a list -- and, LATER, telling him that the
items in the list are 200 character strings -- can be used to force
the applicant to consider tweeks to his implementation when the cost
of \"moving\" an item is considerably increased. How he addresses this
shows that he understands the cost of copies, etc.

Basically the problem is that as stated the original question is too trivial to
be able to deduce much about anyone\'s true software design or programming or
whatever you want to call it, ability.

Because you\'re not concerned with how well they know the syntax, idioms, etc.
You\'re concerned with whether or not they understand the concepts (the
fact that algorithms have costs; that much has already been invented; etc.).
You want to see if the party is savvy enough about those things to be able
to ask PERTINENT questions.

If the applicant uses a float, you know he doesn\'t understand the problem.

If he uses an integer data type, why did he choose the type he chose? Does
*he* know? Where will his implementation fail (undetected overflow)? How
will he deal with that when the time comes (what if he\'s already using
unsigned long longs????)

It\'s a lousy question in isolation that doesn\'t reveal much other than to weed
out total non-hackers, or to (unjustly IMO) weed out someone who doesn\'t know
or can\'t remember the closed form that day but otherwise wrote some code that
did what was required.

Making it part of a larger problem where one might have to write an algorithm
or function that computes such a sum, as a component of a larger task, would be
more enlightening when someone\'s particular solution to the sub-problem is
viewed in a context.

If say the goal was to do the more complex task in a timeframe and the code is
otherwise good and comes in under the time limit but they use that solution to
basically get-r-done and didn\'t sit around wasting time trying to remember a
formula then that seems sensible.

No. The exact problem is immaterial. What you are looking for is someone who
has the right skillset to tackle a YET TO BE ASSIGNED responsibility -- you
haven\'t yet hired him!

If you want to tell the person WHAT to code, then you want a programmer. If
you want the person to figure out what NEEDS to be coded -- how to SOLVE the
problem he\'s facing (when N is 8 quadrillion!) -- then you want a software
engineer.

You don\'t hand a spec and a bucket of parts to a technician and expect him
to design a (hardware) product. Will he even know what questions to ask?
Or, when you challenge his design as too big/power hungry/costly/etc. will he
fall back on \"well, you didn\'t TELL me how big/power efficient/cheap/etc.
it HAD to be!\"

IME, most software jobs are focused on acquiring knowledge of the application
domain. And, while doing so, thinking about how your solution will address
those problems AND THOSE CONSTRAINTS. You\'ll likely have a say in what sort of
hardware is needed -- but, may not actually design it. OTOH, once designed,
you can\'t magically claim you need more MIPS, memory, etc. It was your job,
as an engineer, to determine what was needed to support the software. Just
like it is the hardware guy\'s job to provide you with the resources you\'ve
claimed to need.

Writing code until you run out of TEXT, MIPS, etc. is not an option.

 

[three_jeeps]

On Thursday, November 5, 2020 at 11:18:41 AM UTC-5, jla...@highlandsniptechnology.com wrote:

On Wed, 4 Nov 2020 23:55:15 -0500, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

The server at nntp.olduse.net is serving up selected parts of Usenet
with a 30-year delay. This one from sci.electronics may have some
points of contact for our recent discussions about analogue engineering.

Cheers

Phil Hobbs

On 11/2/90 12:05 PM, Scott T. Dupuie wrote:
In article <11242.2...@ecs.umass.edu> toh...@ecs.umass.edu
(Chris Tohline) writes:

as a college sophmore I felt very confident about my major, computer
systems engineering. Then, I took a BASIC circuit analysis class.
now, I am very frusterated. Am I lost because my teacher is poor, or
is this just a difficult subject to grasp? I refuse to live with a \'C\'
and am very frusterated. But I\'m sure someday it will click and I\'ll
be happy again.

Chris Tohline

toh...@ecs.umass.edu

Chris,

This has been one of my \"pet peeves\" since I began my education in EE
8 years ago. I am currently completing a M.S. degree in this field, and
have spent some time teaching and working in industry as well. As much as
the academics may object, I can tell you with some certainty that your
introductory circuit analysis course has very little to do with *real*
analog engineering. It seems that most universities like to use this course
as a vehicle for \"weeding out\" what they consider to be unsuitable
students. In addition to this, many of the faculty stuck teaching this
course know very little about the subject as it pertains to real life
design issues. They act as though they are being punished by being forced
to teach this class. This is unfortunate, since it tends to turn off many
young engineering students to the field of analog circuit design. I can\'t
tell you how many students I\'ve known through the years that switched to
digital design (no pun intended) because of the experience thay had in a
similar circuits course. Perhaps this is one of the reasons why there are
so few analog design engineers out there and why they are in such high
demand. I can\'t tell you what to do about your particular situation, but if
you stick it out, as I did, the rewards are many.

Scott T. Dupuie
The Ohio State University
Department of Electrical Engineering
dup...@parts.eng.ohio-state.edu

I thought freshman chemistry was the classic weeder course.

I can see how a bad instructor handing out bad grades could turn kids
off from analog electronics. It should be fun.

I never took any digital design courses. They looked awfully abstract
to me. Does anyone actually use Karnaugh map minimization?



--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard

Yes, I have used KM and even the tabular prime implicate approach. This has gone through various cycles of need. in the mid-late 70s, reducing chip count was a big deal. the more stuff got put on silicon, the need somewhat disappeared. the technology has been somewhat incorporated into FPGA synthesis.
As an academic exercise, I had to solve a minimization problem during my oral quals...sorta stayed with me....
J

 

[Rickster C]

On Friday, November 6, 2020 at 1:54:19 PM UTC-5, three_jeeps wrote:

On Thursday, November 5, 2020 at 11:18:41 AM UTC-5, jla...@highlandsniptechnology.com wrote:
On Wed, 4 Nov 2020 23:55:15 -0500, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

The server at nntp.olduse.net is serving up selected parts of Usenet
with a 30-year delay. This one from sci.electronics may have some
points of contact for our recent discussions about analogue engineering.

Cheers

Phil Hobbs

On 11/2/90 12:05 PM, Scott T. Dupuie wrote:
In article <11242.2...@ecs.umass.edu> toh...@ecs.umass.edu
(Chris Tohline) writes:

as a college sophmore I felt very confident about my major, computer
systems engineering. Then, I took a BASIC circuit analysis class.
now, I am very frusterated. Am I lost because my teacher is poor, or
is this just a difficult subject to grasp? I refuse to live with a \'C\'
and am very frusterated. But I\'m sure someday it will click and I\'ll
be happy again.

Chris Tohline

toh...@ecs.umass.edu

Chris,

This has been one of my \"pet peeves\" since I began my education in EE
8 years ago. I am currently completing a M.S. degree in this field, and
have spent some time teaching and working in industry as well. As much as
the academics may object, I can tell you with some certainty that your
introductory circuit analysis course has very little to do with *real*
analog engineering. It seems that most universities like to use this course
as a vehicle for \"weeding out\" what they consider to be unsuitable
students. In addition to this, many of the faculty stuck teaching this
course know very little about the subject as it pertains to real life
design issues. They act as though they are being punished by being forced
to teach this class. This is unfortunate, since it tends to turn off many
young engineering students to the field of analog circuit design. I can\'t
tell you how many students I\'ve known through the years that switched to
digital design (no pun intended) because of the experience thay had in a
similar circuits course. Perhaps this is one of the reasons why there are
so few analog design engineers out there and why they are in such high
demand. I can\'t tell you what to do about your particular situation, but if
you stick it out, as I did, the rewards are many.

Scott T. Dupuie
The Ohio State University
Department of Electrical Engineering
dup...@parts.eng.ohio-state.edu

I thought freshman chemistry was the classic weeder course.

I can see how a bad instructor handing out bad grades could turn kids
off from analog electronics. It should be fun.

I never took any digital design courses. They looked awfully abstract
to me. Does anyone actually use Karnaugh map minimization?



--

John Larkin Highland Technology, Inc

Science teaches us to doubt.

Claude Bernard

Yes, I have used KM and even the tabular prime implicate approach. This has gone through various cycles of need. in the mid-late 70s, reducing chip count was a big deal. the more stuff got put on silicon, the need somewhat disappeared. the technology has been somewhat incorporated into FPGA synthesis.
As an academic exercise, I had to solve a minimization problem during my oral quals...sorta stayed with me....
J

Never confuse academia with industry. I took a class in \"multi-valued logic\" only to find it was a thinly disguised course in abstract algebra. The general class of math that includes Boolean logic is called Post algebra. I learned about kernel mappings and such. Didn\'t even retain it long enough for the comprehensive exam. I think at the time Intel used trinary logic for the microcode for the 8087 or some such chip. That was the big attraction. I don\'t know that I\'ve heard of any other examples since then with the exception of the multi-level Flash devices which are still powers of two if I am not mistaken, to keep the decode logic simple. Don\'t they use up to 16 levels in Flash?

At 16 logic levels what gates make up a functionally complete set?

--

Rick C.

++ Get 1,000 miles of free Supercharging
++ Tesla referral code - https://ts.la/richard11209

 

[bitrex]

On 11/5/2020 9:02 PM, Rickster C wrote:

On Thursday, November 5, 2020 at 3:37:51 PM UTC-5, bitrex wrote:
On 11/5/2020 11:45 AM, Phil Hobbs wrote:
On 11/5/20 11:18 AM, jlarkin@highlandsniptechnology.com wrote:
On Wed, 4 Nov 2020 23:55:15 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

The server at nntp.olduse.net is serving up selected parts of Usenet
with a 30-year delay.  This one from sci.electronics may have some
points of contact for our recent discussions about analogue
engineering.

Cheers

Phil Hobbs

On 11/2/90 12:05 PM, Scott T. Dupuie wrote:
In article <11242.2730bfd5@ecs.umass.edu> tohline@ecs.umass.edu
(Chris Tohline) writes:

as a college sophmore I felt very confident about my major, computer
systems engineering.  Then, I took a BASIC circuit analysis class.
now, I am very frusterated.  Am I lost because my teacher is poor, or
is this just a difficult subject to grasp?  I refuse to live with a
\'C\'
and am very frusterated.  But I\'m sure someday it will click and I\'ll
be happy again.

Chris Tohline

tohline@ecs.umass.edu

Chris,

This has been one of my \"pet peeves\" since I began my education in EE
8 years ago. I am currently completing a M.S. degree in this field, and
have spent some time teaching and working in industry as well. As
much as
the academics may object, I can tell you with some certainty that your
introductory circuit analysis course has very little to do with *real*
analog engineering. It seems that most universities like to use this
course
as a vehicle for \"weeding out\" what they consider to be unsuitable
students. In addition to this, many of the faculty stuck teaching this
course know very little about the subject as it pertains to real life
design issues. They act as though they are being punished by being
forced
to teach this class. This is unfortunate, since it tends to turn off
many
young engineering students to the field of analog circuit design. I
can\'t
tell you how many students I\'ve known through the years that
switched to
digital design (no pun intended) because of the experience thay had
in a
similar circuits course. Perhaps this is one of the reasons why
there are
so few analog design engineers out there and why they are in such high
demand. I can\'t tell you what to do about your particular situation,
but if
you stick it out, as I did, the rewards are many.

Scott T. Dupuie
The Ohio State University
Department of Electrical Engineering
dupuie@parts.eng.ohio-state.edu



I thought freshman chemistry was the classic weeder course.

I can see how a bad instructor handing out bad grades could turn kids
off from analog electronics. It should be fun.

I never took any digital design courses. They looked awfully abstract
to me. Does anyone actually use Karnaugh map minimization?

Once in a great while when I need some bit of glue logic in an
out-of-the-way spot and need good timing, or when I\'ve run out of MCU pins.

It only works up to 4 inputs, but it allows you to use visual pattern
matching, which is quicker and much more fun than Boolean logic
minimization.

There are flexible gate chips (lineal descendents of the classical,
horrible and-or-invert gate) that can do several K maps in one small
package.  Typical examples are the SN74LVC1G57 / 58, which between them
can make any 2-input logic function and quite a lot of 3-input ones.

Cheers

Phil Hobbs



The mechanized/computational version of K-mapping, Quine-McCluskey
algorithm, works for arbitrary number of boolean input variables, but
boolean satisfiability is NP-complete so it runs in exponential time.

Not sure exactly how many inputs taps it out on modern consumer hardware
but like the traveling salesman problem it\'s relatively low if one wants
an exact solution, for logic minimization with large numbers of input
variables one must resort to heuristics, genetic algorithms, that sort
of stuff.

I don\'t follow your use of the term \"inputs taps it out\", but anything of any real complexity is not done with gates, it is done with 4 input LUTs and I just consider how many of those it will take, not any details of the logic within. Of course once the logic gets very complex, like in a long case statement, trying to estimate the logic is pointless.

Anything I need to do on a board is fairly trivial. Usually I can do it in my head. Sometimes I find ways of optimizing with non-logic logic like wire or\'s from the way something is coming on board or the way level shifting transistors are used.

There are a number of flexible single gate devices that can implement many functions of two inputs and some three input functions like muxes. Sort of makes individual gates irrelevant.

Ya, what I mean is optimization of large arrays of asynchronous dumb
gates is a challenging problem from a computational perspective as the
underlying problem is NP-complete.

There are many academic papers about it but it\'s hard for me to think of
many practical use cases where you\'d have to optimize functions of
dozens or hundreds of boolean variables, but it\'s not really my field so
IDK.

High-speed multipliers perhaps, I could imagine that highly optimized
arrays of NAND or NOR-derived structures could be faster than LUTs and
multiplexers.

 

[Gerhard Hoffmann]

Am 06.11.20 um 23:07 schrieb bitrex:

On 11/5/2020 9:02 PM, Rickster C wrote:
On Thursday, November 5, 2020 at 3:37:51 PM UTC-5, bitrex wrote:
On 11/5/2020 11:45 AM, Phil Hobbs wrote:

There are flexible gate chips (lineal descendents of the classical,
horrible and-or-invert gate) that can do several K maps in one small
package.  Typical examples are the SN74LVC1G57 / 58, which between them
can make any 2-input logic function and quite a lot of 3-input ones.
Phil Hobbs

The mechanized/computational version of K-mapping, Quine-McCluskey
algorithm, works for arbitrary number of boolean input variables, but
boolean satisfiability is NP-complete so it runs in exponential time.

Not sure exactly how many inputs taps it out on modern consumer hardware
but like the traveling salesman problem it\'s relatively low if one wants
an exact solution, for logic minimization with large numbers of input
variables one must resort to heuristics, genetic algorithms, that sort
of stuff.

I don\'t follow your use of the term \"inputs taps it out\", but anything
of any real complexity is not done with gates, it is done with 4 input
LUTs and I just consider how many of those it will take, not any
details of the logic within.  Of course once the logic gets very
complex, like in a long case statement, trying to estimate the logic
is pointless.

Anything I need to do on a board is fairly trivial.  Usually I can do
it in my head.  Sometimes I find ways of optimizing with non-logic
logic like wire or\'s from the way something is coming on board or the
way level shifting transistors are used.

There are a number of flexible single gate devices that can implement
many functions of two inputs and some three input functions like
muxes.  Sort of makes individual gates irrelevant.


Ya, what I mean is optimization of large arrays of asynchronous dumb
gates is a challenging problem from a computational perspective as the
underlying problem is NP-complete.

There are many academic papers about it but it\'s hard for me to think of
many practical use cases where you\'d have to optimize functions of
dozens or hundreds of boolean variables, but it\'s not really my field so
IDK.

High-speed multipliers perhaps, I could imagine that highly optimized
arrays of NAND or NOR-derived structures could be faster than LUTs and
multiplexers.

Then you end up at a sea-of-gates architecture, or Weinberger arrays
if you want to get some structure into that. But they all need at least
another metal layer for configuration if you want any better speed.

Weinberger btw is the name behind the w in the awk language/tool from
the basic Unix tool set. The idea behind regular expressions was to
formulate state machines and transform them to a blob of gates.

It was found out only later that one can use them for text mangling.

cheers, Gerhard

ps has anyone heard anything of Winfield? long time no read.


too much quoted text...



ehne mehne miste
Es rappelt in der Kiste



too much quoted text...



ehne mehne miste
Es rappelt in der Kiste



too much quoted text...



ehne mehne miste
Es rappelt in der Kiste

 

[Rickster C]

On Friday, November 6, 2020 at 5:07:25 PM UTC-5, bitrex wrote:

On 11/5/2020 9:02 PM, Rickster C wrote:
On Thursday, November 5, 2020 at 3:37:51 PM UTC-5, bitrex wrote:
On 11/5/2020 11:45 AM, Phil Hobbs wrote:
On 11/5/20 11:18 AM, jlarkin@highlandsniptechnology.com wrote:
On Wed, 4 Nov 2020 23:55:15 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

The server at nntp.olduse.net is serving up selected parts of Usenet
with a 30-year delay.  This one from sci.electronics may have some
points of contact for our recent discussions about analogue
engineering.

Cheers

Phil Hobbs

On 11/2/90 12:05 PM, Scott T. Dupuie wrote:
In article <11242.2730bfd5@ecs.umass.edu> tohline@ecs.umass.edu
(Chris Tohline) writes:

as a college sophmore I felt very confident about my major, computer
systems engineering.  Then, I took a BASIC circuit analysis class.
now, I am very frusterated.  Am I lost because my teacher is poor, or
is this just a difficult subject to grasp?  I refuse to live with a
\'C\'
and am very frusterated.  But I\'m sure someday it will click and I\'ll
be happy again.

Chris Tohline

tohline@ecs.umass.edu

Chris,

This has been one of my \"pet peeves\" since I began my education in EE
8 years ago. I am currently completing a M.S. degree in this field, and
have spent some time teaching and working in industry as well. As
much as
the academics may object, I can tell you with some certainty that your
introductory circuit analysis course has very little to do with *real*
analog engineering. It seems that most universities like to use this
course
as a vehicle for \"weeding out\" what they consider to be unsuitable
students. In addition to this, many of the faculty stuck teaching this
course know very little about the subject as it pertains to real life
design issues. They act as though they are being punished by being
forced
to teach this class. This is unfortunate, since it tends to turn off
many
young engineering students to the field of analog circuit design. I
can\'t
tell you how many students I\'ve known through the years that
switched to
digital design (no pun intended) because of the experience thay had
in a
similar circuits course. Perhaps this is one of the reasons why
there are
so few analog design engineers out there and why they are in such high
demand. I can\'t tell you what to do about your particular situation,
but if
you stick it out, as I did, the rewards are many.

Scott T. Dupuie
The Ohio State University
Department of Electrical Engineering
dupuie@parts.eng.ohio-state.edu



I thought freshman chemistry was the classic weeder course.

I can see how a bad instructor handing out bad grades could turn kids
off from analog electronics. It should be fun.

I never took any digital design courses. They looked awfully abstract
to me. Does anyone actually use Karnaugh map minimization?

Once in a great while when I need some bit of glue logic in an
out-of-the-way spot and need good timing, or when I\'ve run out of MCU pins.

It only works up to 4 inputs, but it allows you to use visual pattern
matching, which is quicker and much more fun than Boolean logic
minimization.

There are flexible gate chips (lineal descendents of the classical,
horrible and-or-invert gate) that can do several K maps in one small
package.  Typical examples are the SN74LVC1G57 / 58, which between them
can make any 2-input logic function and quite a lot of 3-input ones.

Cheers

Phil Hobbs



The mechanized/computational version of K-mapping, Quine-McCluskey
algorithm, works for arbitrary number of boolean input variables, but
boolean satisfiability is NP-complete so it runs in exponential time.

Not sure exactly how many inputs taps it out on modern consumer hardware
but like the traveling salesman problem it\'s relatively low if one wants
an exact solution, for logic minimization with large numbers of input
variables one must resort to heuristics, genetic algorithms, that sort
of stuff.

I don\'t follow your use of the term \"inputs taps it out\", but anything of any real complexity is not done with gates, it is done with 4 input LUTs and I just consider how many of those it will take, not any details of the logic within. Of course once the logic gets very complex, like in a long case statement, trying to estimate the logic is pointless.

Anything I need to do on a board is fairly trivial. Usually I can do it in my head. Sometimes I find ways of optimizing with non-logic logic like wire or\'s from the way something is coming on board or the way level shifting transistors are used.

There are a number of flexible single gate devices that can implement many functions of two inputs and some three input functions like muxes. Sort of makes individual gates irrelevant.


Ya, what I mean is optimization of large arrays of asynchronous dumb
gates is a challenging problem from a computational perspective as the
underlying problem is NP-complete.

There are many academic papers about it but it\'s hard for me to think of
many practical use cases where you\'d have to optimize functions of
dozens or hundreds of boolean variables, but it\'s not really my field so
IDK.

Random logic needs to be optimized. Most large functions have internal structure that provides a straightforward design which can be optimized as an implementation rather than by minimizing the number of gates which often is not important. Delay is often the thing that is important. Harder to optimize via algorithm, maybe? Not sure, I\'ve never seen anything about that. With a hand full of inputs individual gates are wide enough. With lots of inputs I think that gate structure may top out requiring multiple gates to implement what would conceptually be one gate/level of delay.

High-speed multipliers perhaps, I could imagine that highly optimized
arrays of NAND or NOR-derived structures could be faster than LUTs and
multiplexers.

You can conceive of faster arrays of gates perhaps, but there has been a LOT of work on multipliers and I doubt there is much left to improve.

I\'d like to see optimized divide and square root logic. I\'ve pretty much decided to implement the square root as a table lookup/floating point combination. When I say floating point, I mean I would align the input word to preserve resolution and de-normalize appropriately after. Shift by multiples of 2 bits on input and restore by that number of single bits.

Divide would be the same thing, but 1:1 on shifting in and out. The shifting can be done in a multiplier but detecting the number of bits to shift takes hard, relatively random logic.

I think this \"calculator\" can be done without tons of memory, but it will need a few temp storage locations. I might use a stack like a Forth machine.. lol

--

Rick C.

--- Get 1,000 miles of free Supercharging
--- Tesla referral code - https://ts.la/richard11209