Direct digital synthesis of square waves...

[server]

On Sat, 20 Aug 2022 12:34:28 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 05.33.55 UTC+2 skrev jla...@highlandsniptechnology.com:
On Fri, 19 Aug 2022 14:41:47 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

fredag den 19. august 2022 kl. 20.34.09 UTC+2 skrev John Larkin:
On Fri, 19 Aug 2022 12:14:25 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 8/18/22 5:11 PM, John Larkin wrote:
On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote:
On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts
use...@revmaps.no-ip.org> wrote:

On 2022-08-16, whit3rd <whi...@gmail.com> wrote:

A smaller sine/cos table might be used with

sine(a+b) = sine(a) cos(b) + cos(a)sine(b)

as in, with small deviations \'b\' from major steps in the table, two multiplies and
an add give you 2^20 different accurate sines from a 2^10 size sine table.
Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10),
you can make that one multiply and an add. Perhaps that\'s what the \'phase
accumulator\' is for, estimating the \'b\'?

AKA \"CORDIC\"

In an FPGA, one could have the basic sine table and an interpolation
slope table and maybe just add. Do the math at compile time, not run
time.

At some point, dac resolution becomes the limit, not sine table
resolution.


Apologies if somebody has pointed this out upthread--I didn\'t follow it all.

If you have enough bits in the phase accumulator, and apply the right
amount of numerical gain ahead of the DAC, you can always get a
well-behaved trapezoidal waveform with a nice smooth fine-grained
staircase near the zero crossing, which will filter well. (Saturating
arithmetic is required, obviously.)

You just need to make sure that the duration of the linear part is at
least twice the filter\'s settling time (to the required accuracy), so
that the ringing from the corner of the trapezoid has all settled out by
the time you get to the zero crossing. If you increase the numerical
gain like 1/f, this works down to as low a frequency as you like.

Right. The trapezoid corner happens at an XO edge, which makes output
jitter, so the filter has to forget that corner but average as many
samples as it can along the linear slope. The trapezoid is not
bandlimited so violates the concept of the Sampling Theorem.

This argues for making the comparator trip at near the top of the
trapezoid, not the mid-voltage zero crossing equivalent.

One might make the trapezoid edge steeper at low synthesized
frequencies and maybe incorporate more LSBish phase accumulator bits.
Somehow. Seamlessly.


You just multiply by 1/f, using saturating arithmetic. That keeps the
slope at the zero crossing the same at all frequencies, allows the same
amount of time for the filter to settle, produces nearly the same
settling artifacts, and so forth and so on. At high frequencies you
do it the normal way.
At low frequencies, we need to use more of the bits of the phase
accumulator, and equivalently more entries in the sine lookup table,
in order to keep pumping out DAC codes at a rate the filter can
smooth.

Multiplying a sine lookup integer by 1/f just makes the amplitide
jumps bigger.

multiply before truncating


I think that makes jitter worse. It violates Nyquist reconstruction
principles by adding sharp XO-clocked corners.

Putting gain in front of a zero-crossing comparator does nothing. It\'s
still a zero-crossing comparator.

here\'s a simple example

17bit accumulator, turned into 16bit 0-pi angle

angle15_8 is upper 8bit of angle, used to index sine table to generate out1
anglex16clamp_11_4, is angle x16 clamped used as index sine table to generate out2

https://imgur.com/gTpi1IA

zoomed in on the zero crossing:

https://imgur.com/vX27f0m

Sure, you picked a lowpass filter to smooth out those giant slow
steps. Some of those steps are half a microsecond.

Try it with a filter that will work at 15 MHz.

 

[Lasse Langwadt Christensen]

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

On Sat, 20 Aug 2022 12:34:28 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 05.33.55 UTC+2 skrev jla...@highlandsniptechnology.com:
On Fri, 19 Aug 2022 14:41:47 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

fredag den 19. august 2022 kl. 20.34.09 UTC+2 skrev John Larkin:
On Fri, 19 Aug 2022 12:14:25 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 8/18/22 5:11 PM, John Larkin wrote:
On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote:
On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts
use...@revmaps.no-ip.org> wrote:

On 2022-08-16, whit3rd <whi...@gmail.com> wrote:

A smaller sine/cos table might be used with

sine(a+b) = sine(a) cos(b) + cos(a)sine(b)

as in, with small deviations \'b\' from major steps in the table, two multiplies and
an add give you 2^20 different accurate sines from a 2^10 size sine table.
Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10),
you can make that one multiply and an add. Perhaps that\'s what the \'phase
accumulator\' is for, estimating the \'b\'?

AKA \"CORDIC\"

In an FPGA, one could have the basic sine table and an interpolation
slope table and maybe just add. Do the math at compile time, not run
time.

At some point, dac resolution becomes the limit, not sine table
resolution.


Apologies if somebody has pointed this out upthread--I didn\'t follow it all.

If you have enough bits in the phase accumulator, and apply the right
amount of numerical gain ahead of the DAC, you can always get a
well-behaved trapezoidal waveform with a nice smooth fine-grained
staircase near the zero crossing, which will filter well. (Saturating
arithmetic is required, obviously.)

You just need to make sure that the duration of the linear part is at
least twice the filter\'s settling time (to the required accuracy), so
that the ringing from the corner of the trapezoid has all settled out by
the time you get to the zero crossing. If you increase the numerical
gain like 1/f, this works down to as low a frequency as you like.

Right. The trapezoid corner happens at an XO edge, which makes output
jitter, so the filter has to forget that corner but average as many
samples as it can along the linear slope. The trapezoid is not
bandlimited so violates the concept of the Sampling Theorem.

This argues for making the comparator trip at near the top of the
trapezoid, not the mid-voltage zero crossing equivalent.

One might make the trapezoid edge steeper at low synthesized
frequencies and maybe incorporate more LSBish phase accumulator bits.
Somehow. Seamlessly.


You just multiply by 1/f, using saturating arithmetic. That keeps the
slope at the zero crossing the same at all frequencies, allows the same
amount of time for the filter to settle, produces nearly the same
settling artifacts, and so forth and so on. At high frequencies you
do it the normal way.
At low frequencies, we need to use more of the bits of the phase
accumulator, and equivalently more entries in the sine lookup table,
in order to keep pumping out DAC codes at a rate the filter can
smooth.

Multiplying a sine lookup integer by 1/f just makes the amplitide
jumps bigger.

multiply before truncating


I think that makes jitter worse. It violates Nyquist reconstruction
principles by adding sharp XO-clocked corners.

Putting gain in front of a zero-crossing comparator does nothing. It\'s
still a zero-crossing comparator.

here\'s a simple example

17bit accumulator, turned into 16bit 0-pi angle

angle15_8 is upper 8bit of angle, used to index sine table to generate out1
anglex16clamp_11_4, is angle x16 clamped used as index sine table to generate out2

https://imgur.com/gTpi1IA

zoomed in on the zero crossing:

https://imgur.com/vX27f0m

Sure, you picked a lowpass filter to smooth out those giant slow
steps. Some of those steps are half a microsecond.

there is no filter, just scaled clamped indexing into the sine table

> Try it with a filter that will work at 15 MHz.

there is no filter, it is raw samples from the sine table

 

[server]

On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:
On Sat, 20 Aug 2022 12:34:28 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 05.33.55 UTC+2 skrev jla...@highlandsniptechnology.com:
On Fri, 19 Aug 2022 14:41:47 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

fredag den 19. august 2022 kl. 20.34.09 UTC+2 skrev John Larkin:
On Fri, 19 Aug 2022 12:14:25 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 8/18/22 5:11 PM, John Larkin wrote:
On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

On 8/17/22 9:58 AM, jla...@highlandsniptechnology.com wrote:
On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts
use...@revmaps.no-ip.org> wrote:

On 2022-08-16, whit3rd <whi...@gmail.com> wrote:

A smaller sine/cos table might be used with

sine(a+b) = sine(a) cos(b) + cos(a)sine(b)

as in, with small deviations \'b\' from major steps in the table, two multiplies and
an add give you 2^20 different accurate sines from a 2^10 size sine table.
Since cos(b) will always be near unity ( 1 plus order of 2^-20 when b is under 2^-10),
you can make that one multiply and an add. Perhaps that\'s what the \'phase
accumulator\' is for, estimating the \'b\'?

AKA \"CORDIC\"

In an FPGA, one could have the basic sine table and an interpolation
slope table and maybe just add. Do the math at compile time, not run
time.

At some point, dac resolution becomes the limit, not sine table
resolution.


Apologies if somebody has pointed this out upthread--I didn\'t follow it all.

If you have enough bits in the phase accumulator, and apply the right
amount of numerical gain ahead of the DAC, you can always get a
well-behaved trapezoidal waveform with a nice smooth fine-grained
staircase near the zero crossing, which will filter well. (Saturating
arithmetic is required, obviously.)

You just need to make sure that the duration of the linear part is at
least twice the filter\'s settling time (to the required accuracy), so
that the ringing from the corner of the trapezoid has all settled out by
the time you get to the zero crossing. If you increase the numerical
gain like 1/f, this works down to as low a frequency as you like.

Right. The trapezoid corner happens at an XO edge, which makes output
jitter, so the filter has to forget that corner but average as many
samples as it can along the linear slope. The trapezoid is not
bandlimited so violates the concept of the Sampling Theorem.

This argues for making the comparator trip at near the top of the
trapezoid, not the mid-voltage zero crossing equivalent.

One might make the trapezoid edge steeper at low synthesized
frequencies and maybe incorporate more LSBish phase accumulator bits.
Somehow. Seamlessly.


You just multiply by 1/f, using saturating arithmetic. That keeps the
slope at the zero crossing the same at all frequencies, allows the same
amount of time for the filter to settle, produces nearly the same
settling artifacts, and so forth and so on. At high frequencies you
do it the normal way.
At low frequencies, we need to use more of the bits of the phase
accumulator, and equivalently more entries in the sine lookup table,
in order to keep pumping out DAC codes at a rate the filter can
smooth.

Multiplying a sine lookup integer by 1/f just makes the amplitide
jumps bigger.

multiply before truncating


I think that makes jitter worse. It violates Nyquist reconstruction
principles by adding sharp XO-clocked corners.

Putting gain in front of a zero-crossing comparator does nothing. It\'s
still a zero-crossing comparator.

here\'s a simple example

17bit accumulator, turned into 16bit 0-pi angle

angle15_8 is upper 8bit of angle, used to index sine table to generate out1
anglex16clamp_11_4, is angle x16 clamped used as index sine table to generate out2

https://imgur.com/gTpi1IA

zoomed in on the zero crossing:

https://imgur.com/vX27f0m

Sure, you picked a lowpass filter to smooth out those giant slow
steps. Some of those steps are half a microsecond.

there is no filter, just scaled clamped indexing into the sine table

Try it with a filter that will work at 15 MHz.

there is no filter, it is raw samples from the sine table

So, ignore the sine curve.

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

 

[whit3rd]

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:

On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense, and you can dither and interpose as many time
steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Most vitally, in the Fourier-trasform sense, a frequency is DEFINITIVE of a sine,
and no other signal, after filtering, has an unchanged \'frequency\' character. If
there\'s a filter involved, a sine is the One True Input form that gives you an output
frequency to rely on. You aren\'t making a mess (or knife-fighting with \"messer\" items)
when you consult a sine table, but are gathering wisdom from an oracle.

 

[Ricky]

On Saturday, August 20, 2022 at 11:35:49 PM UTC-4, whit3rd wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.
That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense, and you can dither and interpose as many time
steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

How is that different? Are you trying to say interpolation looks at future samples? Delay that interpolation output and you get the exact same thing as the filter output that only looks at past samples.

Most vitally, in the Fourier-trasform sense, a frequency is DEFINITIVE of a sine,
and no other signal, after filtering, has an unchanged \'frequency\' character. If
there\'s a filter involved, a sine is the One True Input form that gives you an output
frequency to rely on. You aren\'t making a mess (or knife-fighting with \"messer\" items)
when you consult a sine table, but are gathering wisdom from an oracle.

The problem people are concerned about with the sine wave is that the slope is so shallow, that a very small amount of noise adds a large amount of jitter.

Why can\'t people understand that the DDS can use a sine wave at the highest frequency, over a 2:1 range of frequency to generate the fundamental with very low jitter? This signal can be run through a programmable divider to divide the DDS output by octaves to obtain any lower frequency you wish, with the same jitter, other than jitter introduced by the logic implementation. This jitter can be removed by running the output through a FF of some technology that restores the jitter of the DDS output.

None of this nonsense of trying to implement trapezoids is needed.

--

Rick C.

+-- Get 1,000 miles of free Supercharging
+-- Tesla referral code - https://ts.la/richard11209

 

[whit3rd]

On Saturday, August 20, 2022 at 9:46:17 PM UTC-7, Ricky wrote:

On Saturday, August 20, 2022 at 11:35:49 PM UTC-4, whit3rd wrote:

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

How is that different? Are you trying to say interpolation looks at future samples? Delay that interpolation output and you get the exact same thing as the filter output that only looks at past samples.

If one wants \'interpolation\', an FIR filter, applied in advance of the D-to-A step, can easily perform it;
a real-components analog filter, though, cannot be described as an interpolation unless one has some kind
of way of blinding the filter to the past AND the future of a time interval (maybe with delay lines?).
The arrow-of-time is absent in true interpolation.

 

[Anthony William Sloman]

On Sunday, August 21, 2022 at 2:46:17 PM UTC+10, Ricky wrote:

On Saturday, August 20, 2022 at 11:35:49 PM UTC-4, whit3rd wrote:
On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen <lang...@fonz.dk> wrote:
lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

<snip>

Most vitally, in the Fourier-trasform sense, a frequency is DEFINITIVE of a sine,
and no other signal, after filtering, has an unchanged \'frequency\' character. If
there\'s a filter involved, a sine is the One True Input form that gives you an output
frequency to rely on. You aren\'t making a mess (or knife-fighting with \"messer\" items)
when you consult a sine table, but are gathering wisdom from an oracle.
The problem people are concerned about with the sine wave is that the slope is so shallow, that a very small amount of noise adds a large amount of jitter.

Why can\'t people understand that the DDS can use a sine wave at the highest frequency, over a 2:1 range of frequency to generate the fundamental with very low jitter? This signal can be run through a programmable divider to divide the DDS output by octaves to obtain any lower frequency you wish, with the same jitter, other than jitter introduced by the logic implementation. This jitter can be removed by running the output through a FF of some technology that restores the jitter of the DDS output.

None of this nonsense of trying to implement trapezoids is needed.

The 2:1 range sine generator followed by divider would work. So would a trapeziod generator. The questions are which would be cheaper which is an interesting question and which would perform better, which isn\'t all that interesting because they\'d probably perform identically if competently executed.

--
Bill Sloman, Sydney

 

[Martin Brown]

On 18/08/2022 22:37, Jeroen Belleman wrote:

On 2022-08-18 23:11, John Larkin wrote:
On Thu, 18 Aug 2022 12:41:33 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 8/17/22 9:58 AM, jlarkin@highlandsniptechnology.com wrote:
On Wed, 17 Aug 2022 06:44:18 -0000 (UTC), Jasen Betts
usenet@revmaps.no-ip.org> wrote:

On 2022-08-16, whit3rd <whit3rd@gmail.com> wrote:

A smaller sine/cos table might be used with

sine(a+b) = sine(a) cos(b) + cos(a)sine(b)

as in, with small deviations \'b\' from major steps in the table,
two multiplies and
an add give you 2^20 different accurate sines from a 2^10 size
sine table.
Since cos(b) will always be near unity ( 1 plus order of 2^-20
when b is under 2^-10),
you can make that one multiply and an add.    Perhaps that\'s what
the \'phase
accumulator\' is for, estimating the \'b\'?

AKA \"CORDIC\"

In an FPGA, one could have the basic sine table and an interpolation
slope table and maybe just add. Do the math at compile time, not run
time.

At some point, dac resolution becomes the limit, not sine table
resolution.


Apologies if somebody has pointed this out upthread--I didn\'t follow
it all.

If you have enough bits in the phase accumulator, and apply the right
amount of numerical gain ahead of the DAC, you can always get a
well-behaved trapezoidal waveform with a nice smooth fine-grained
staircase near the zero crossing, which will filter well. (Saturating
arithmetic is required, obviously.)

You just need to make sure that the duration of the linear part is at
least twice the filter\'s settling time (to the required accuracy), so
that the ringing from the corner of the trapezoid has all settled out by
the time you get to the zero crossing.  If you increase the numerical
gain like 1/f, this works down to as low a frequency as you like.

Right. The trapezoid corner happens at an XO edge, which makes output
jitter, so the filter has to forget that corner but average as many
samples as it can along the linear slope. The trapezoid is not
bandlimited so violates the concept of the Sampling Theorem.

[...]

Don\'t use a trapezoid then. Approximate one summing a series
of sinc(x).

Sinc(x) is generally a bad idea in practice even if it is theoretically
the optimum solution for band limited in the FT domain. It goes to zero
far too slowly to be useful. If you want something reasonably well
behaved then the prolate spheroidal Bessel functions are worth a look.

Like Gaussians they have the interesting property that when band limited
over a given domain then to within a scaling factor they are their own
Fourier transform over that same domain (but not everywhere positive).

They provide near optimum interpolation in one domain that is to within
a multiplicative factor accurate in the Fourier transform domain. They
are the eigenfunctions of repeatedly Fourier transforming a function and
then band limiting it. The original paper by Slepian & Pollak 1960\'s is
well worth a read if you have to do this stuff for real.

https://onlinelibrary.wiley.com/doi/abs/10.1002/j.1538-7305.1961.tb03977.x

https://arxiv.org/abs/1710.02874

https://epubs.siam.org/doi/epdf/10.1137/1025078

Slightly more recent but SIAM & Bell TJ behind a pay wall.


--
Regards,
Martin Brown

 

[server]

On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whit3rd@gmail.com>
wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense,

https://www.dropbox.com/s/1xx7sz1e5rg6jsi/JLDDS_100M_4K.jpg?raw=1

looks pretty coarse to me. You only get small amplitude steps at low
frequencies... and then you get slow unfiltered time steps too. That\'s
the low frequency jitter problem. And in real life, low slopes reveal
comparator imperfections too.


and you can dither and interpose as many time

steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Any real lowpass filter has time delay. So relative to its output, it
is blending past and future inputs.

 

[Dimiter_Popoff]

On 8/21/2022 18:12, jlarkin@highlandsniptechnology.com wrote:

On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whit3rd@gmail.com
wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense,

https://www.dropbox.com/s/1xx7sz1e5rg6jsi/JLDDS_100M_4K.jpg?raw=1

looks pretty coarse to me. You only get small amplitude steps at low
frequencies... and then you get slow unfiltered time steps too. That\'s
the low frequency jitter problem. And in real life, low slopes reveal
comparator imperfections too.


and you can dither and interpose as many time
steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Any real lowpass filter has time delay. So relative to its output, it
is blending past and future inputs.

As far as I can see you are going to do sine wave. In that case I would
do as much brute force as is practical - the is, as long a sine lookup
table as possible - and then interpolate. Those dsp sections they put
in fpga-s must be kept busy? 10 ns is not a lot of time to do it but
it must be doable. And second or even third order interpolation
is not that hard - and can probably give you virtually error free
values even for the 1mHz case.
Easier said than done I suppose but that\'s the advantage of giving
an opinion and not having to deliver the goods.... .

 

[server]

On Sun, 21 Aug 2022 19:27:33 +0300, Dimiter_Popoff <dp@tgi-sci.com>
wrote:

On 8/21/2022 18:12, jlarkin@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whit3rd@gmail.com
wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense,

https://www.dropbox.com/s/1xx7sz1e5rg6jsi/JLDDS_100M_4K.jpg?raw=1

looks pretty coarse to me. You only get small amplitude steps at low
frequencies... and then you get slow unfiltered time steps too. That\'s
the low frequency jitter problem. And in real life, low slopes reveal
comparator imperfections too.


and you can dither and interpose as many time
steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Any real lowpass filter has time delay. So relative to its output, it
is blending past and future inputs.


As far as I can see you are going to do sine wave. In that case I would
do as much brute force as is practical - the is, as long a sine lookup
table as possible - and then interpolate. Those dsp sections they put
in fpga-s must be kept busy? 10 ns is not a lot of time to do it but
it must be doable. And second or even third order interpolation
is not that hard - and can probably give you virtually error free
values even for the 1mHz case.
Easier said than done I suppose but that\'s the advantage of giving
an opinion and not having to deliver the goods.... .

It has been suggested that, at low frequencies, we interpolate between
sine table entries so we can keep approximating the sine wave at the
100 MHz clock rate, instead of making a step now and then as the
selected MS bits of the phase accumulator tick over. That does still
make a slow sine wave at the lowpass filter output.

Straight-line interpolation is probably good enough for short segments
of a sine. The interpolation slopes could be another lookup table.

The idea of making a perfect DDS clock is a deliciously complex
problem. Just thinking about it is educational.

 

[server]

Anthony William Sloman <bill.sloman@ieee.org> wrote:

It strikes me that John Larkin\'s original idea of synthesising trapezoids can be made to work.

You would still use a fast 14- or 16 bit DAC, but the waveform you fed into your comparator would be made up of four sequential components - all coming out of the DAC - high segment of arbitrary length, a falling edge, a low segment, and a risng edge

With a 14-bit DAC - the LTC2000 comes to mind

https://www.analog.com/media/en/technical-documentation/data-sheets/2000fb.pdf

you\'d synthisese the rising and falling edges of the trapezia as 16-successive steps of a staircase waveform.

The LTC2000 can be clocked at 2.5GHz, so the rising and falling edges could be just 6.4nsec wide, and your maximum full amplitude output frequency would be a 78MHz triangular wave.

The trick is that you could have 1024 different rising or falling edges, with all the steps moved up or down in in steps of 0.1% of the full scale swing.

Only the first and last steps of the staircase would look different.

If you low pass filtered the waveform the zero crossing point would move across the 0.4nsec clock period in steps of 0.4psec.

The trick would be to use a Bessel - linear phase - filter which has a little bit of output ripple (figure 2.58 in Williams and Taylor) where the impulse response crosses the zero line, and put that point at the 3.2 nsec zero-crossing point ( picking the filter time constant to be about 0.64nsec, depending on the filter order) which would stop the odd first step from having much effect on the zero crossing point.

You could get any frequency less than 78.125 MHz, and you could step the period up in increments of 0.4.psec. 78.123 MHz would be the next one down

Because your filter only deals with rising an falling edges, you don\'t need to change it when you are synthesising much slower square waves.

That could work, but looks somewhat suboptimal. Generally, let us
assume that we try to generate some periodic f(t) and pass result
to comparator. Due to discrete nature of syntesis we will
have some error, call it r(t). So comparator instead at zeros
of f(t) will switch at zeros of f(t) + r(t). Assuming that error
is resonably small we can estimate shift of zero using deriavative
of f: delta t_0 \\approx -r(t_0)/f\'(t_0). So, to have best accuracy
we want:
- have f\' at zeros of f as big as possible
- have r as small as possible

Let us first look at r, there are two components to error.
One is discretization error of voltage level due to finite
resulution from DAC. Second, due to discrete time we get
mirror freqencies. More precisly, when

f(t) = \\sum_n c_n \\exp(iw_1nt)

(where i is imaginary unit), and w_1 pulsation of f,
discrete time version g(t) has form

g(t) = \\sum_n \\sum_m c_n \\exp(i(w_1n + w_2m)t)

where w_2 is pulsation of DAC clock. We apply low pass filter
to eliminate unwanted high frequencies. It seems that frequent
choice is filter with bandpass up to w_2/3 and delivering
string attenuation at 2w_2/3. Now, if |w_1n + w_2m| < w_2/3
mirror freqency will be in bandpass. For m not equal to 0
it means that c_n should be very small, preferably 0 (othewise
we will get error which can not be removed by filtering).
In other words, to avoid error immune to filtering we want
c_n to be 0 when |w_1n| > w_2/3. So f(t) should be
trigonometric polynomial with frequencies satifying condition
above.

Now, we want f which has fast transition trough 0. Obvious
choice is trigonometric approximation to square wave. This
has horrible ringing. Theoretically, if phase shifts vary
within 20-30 degrees over bandpass ringing should be no
problem. If ringing turns out to be problematic one can
reduce it using trigonmetric approximation to trapezoidal
waveform, getting slower transition.


--
Waldek Hebisch

 

[Dimiter_Popoff]

On 8/21/2022 19:40, jlarkin@highlandsniptechnology.com wrote:

On Sun, 21 Aug 2022 19:27:33 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 8/21/2022 18:12, jlarkin@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whit3rd@gmail.com
wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense,

https://www.dropbox.com/s/1xx7sz1e5rg6jsi/JLDDS_100M_4K.jpg?raw=1

looks pretty coarse to me. You only get small amplitude steps at low
frequencies... and then you get slow unfiltered time steps too. That\'s
the low frequency jitter problem. And in real life, low slopes reveal
comparator imperfections too.


and you can dither and interpose as many time
steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Any real lowpass filter has time delay. So relative to its output, it
is blending past and future inputs.


As far as I can see you are going to do sine wave. In that case I would
do as much brute force as is practical - the is, as long a sine lookup
table as possible - and then interpolate. Those dsp sections they put
in fpga-s must be kept busy? 10 ns is not a lot of time to do it but
it must be doable. And second or even third order interpolation
is not that hard - and can probably give you virtually error free
values even for the 1mHz case.
Easier said than done I suppose but that\'s the advantage of giving
an opinion and not having to deliver the goods.... .

It has been suggested that, at low frequencies, we interpolate between
sine table entries so we can keep approximating the sine wave at the
100 MHz clock rate, instead of making a step now and then as the
selected MS bits of the phase accumulator tick over. That does still
make a slow sine wave at the lowpass filter output.

Straight-line interpolation is probably good enough for short segments
of a sine. The interpolation slopes could be another lookup table.

The idea of making a perfect DDS clock is a deliciously complex
problem. Just thinking about it is educational.

Educational it certainly is, I\'d say it will take more brute force
than complexity but it is clearly a lot harder than it seems at first
glance.
I\'d make sure I have the horsepowers in case linear interpolation is
not good enough and I\'d have to go second or third order... I have not
experience with these fpga dsp sections but I have seen some have
dozens of them, the interpolation needed can be parallelized as much
as it takes. Dealing with the heath may also be needed .

 

[Ricky]

On Sunday, August 21, 2022 at 1:00:37 AM UTC-4, whit3rd wrote:

On Saturday, August 20, 2022 at 9:46:17 PM UTC-7, Ricky wrote:
On Saturday, August 20, 2022 at 11:35:49 PM UTC-4, whit3rd wrote:

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

How is that different? Are you trying to say interpolation looks at future samples? Delay that interpolation output and you get the exact same thing as the filter output that only looks at past samples.
If one wants \'interpolation\', an FIR filter, applied in advance of the D-to-A step, can easily perform it;
a real-components analog filter, though, cannot be described as an interpolation unless one has some kind
of way of blinding the filter to the past AND the future of a time interval (maybe with delay lines?).
The arrow-of-time is absent in true interpolation.

Ok, so you are picking a nit. I\'m not aware of any definition of \"interpolate\" that requires it be limited to inputs of specific samples. It simply means values are inserted. I\'ve seen digital interpolation by inserting samples with values of zero and having no correspondence to the samples on the input stream.

If you want to *average* in analog, I can do that with sample and holds and an opamp to combine the two values. Not so har really.

--

Rick C.

+-+ Get 1,000 miles of free Supercharging
+-+ Tesla referral code - https://ts.la/richard11209

 

[Dimiter_Popoff]

On 8/21/2022 19:40, jlarkin@highlandsniptechnology.com wrote:

On Sun, 21 Aug 2022 19:27:33 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 8/21/2022 18:12, jlarkin@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whit3rd@gmail.com
wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense,

https://www.dropbox.com/s/1xx7sz1e5rg6jsi/JLDDS_100M_4K.jpg?raw=1

looks pretty coarse to me. You only get small amplitude steps at low
frequencies... and then you get slow unfiltered time steps too. That\'s
the low frequency jitter problem. And in real life, low slopes reveal
comparator imperfections too.


and you can dither and interpose as many time
steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Any real lowpass filter has time delay. So relative to its output, it
is blending past and future inputs.


As far as I can see you are going to do sine wave. In that case I would
do as much brute force as is practical - the is, as long a sine lookup
table as possible - and then interpolate. Those dsp sections they put
in fpga-s must be kept busy? 10 ns is not a lot of time to do it but
it must be doable. And second or even third order interpolation
is not that hard - and can probably give you virtually error free
values even for the 1mHz case.
Easier said than done I suppose but that\'s the advantage of giving
an opinion and not having to deliver the goods.... .

It has been suggested that, at low frequencies, we interpolate between
sine table entries so we can keep approximating the sine wave at the
100 MHz clock rate, instead of making a step now and then as the
selected MS bits of the phase accumulator tick over. That does still
make a slow sine wave at the lowpass filter output.

Straight-line interpolation is probably good enough for short segments
of a sine. The interpolation slopes could be another lookup table.

The idea of making a perfect DDS clock is a deliciously complex
problem. Just thinking about it is educational.

I did a quick misuse of my filter editor to draw a sine wave and
see what interpolation looks like. 64 points, interpolated into
16384 points. You\'ll need a lot more than that but this might give
an idea. The linear interpolation looks edgy, but the difference
between second ad third order interpolation is practically invisible at
this scale.
http://tgi-sci.com/misc/sine_all.gif <-- the whole period
then a small region at the top:
http://tgi-sci.com/misc/sine_1.gif <-- first order interpolation,
http://tgi-sci.com/misc/sine_2.gif <-- second order,
http://tgi-sci.com/misc/sine_3.gif <-- third order.

 

[Anthony William Sloman]

On Monday, August 22, 2022 at 1:13:07 AM UTC+10, jla...@highlandsniptechnology.com wrote:

On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whi...@gmail.com> wrote:
On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen <lang...@fonz.dk> wrote:
lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

<snip>

Any real lowpass filter has time delay. So relative to its output, it
is blending past and future inputs.

No real low pass filter is ever going to blend in future inputs. The output is a weighed sum of past inputs, but future inputs are inaccessible.

The most recent past input won\'t have much effect on the output - that\'s the time delay through the filter - bu there\'s a whole load of theory that spells that out in detail. Read Williams and Taylor.

--
Bill Sloman, Sydney

 

[Anthony William Sloman]

On Sunday, August 21, 2022 at 1:35:49 PM UTC+10, whit3rd wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen <lang...@fonz.dk> wrote:
lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense, and you can dither and interpose as many time
steps of alternating values as you care to.

Coarse in time is a choice, not a requirement.

Actually, it is fundamental to the digital domain. You have to start off with one low jitter clock, and every digital output is clocked out by that single clock.

The whole point of the low pass filter in a DDS set-up is to cope with with the fact that you\'ve only got one set of clock edges to play with.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Most vitally, in the Fourier-trasform sense, a frequency is DEFINITIVE of a sine,
and no other signal, after filtering, has an unchanged \'frequency\' character. If
there\'s a filter involved, a sine is the One True Input form that gives you an output
frequency to rely on. You aren\'t making a mess (or knife-fighting with \"messer\" items)
when you consult a sine table, but are gathering wisdom from an oracle.

All true. But without the low pass filter, the staircase artefacts add a lot of higher frequencies into your One True sine wave.

That\'s what John Larkin is rather ineptly wresting with.

--
Bill Sloman, Sydney

 

[Anthony William Sloman]

On Monday, August 22, 2022 at 6:35:14 AM UTC+10, Dimiter Popoff wrote:

On 8/21/2022 19:40, jla...@highlandsniptechnology.com wrote:
On Sun, 21 Aug 2022 19:27:33 +0300, Dimiter_Popoff <d...@tgi-sci.com> wrote:
On 8/21/2022 18:12, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whi...@gmail.com> wrote:
On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:
lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

It has been suggested that, at low frequencies, we interpolate between
sine table entries so we can keep approximating the sine wave at the
100 MHz clock rate, instead of making a step now and then as the
selected MS bits of the phase accumulator tick over. That does still
make a slow sine wave at the lowpass filter output.

Straight-line interpolation is probably good enough for short segments
of a sine. The interpolation slopes could be another lookup table.

The idea of making a perfect DDS clock is a deliciously complex
problem. Just thinking about it is educational.

We are looking forward to you starting on that. at moment you are merely being confused about what\'s going on.

I did a quick misuse of my filter editor to draw a sine wave and
see what interpolation looks like. 64 points, interpolated into
16384 points. You\'ll need a lot more than that but this might give
an idea. The linear interpolation looks edgy, but the difference
between second ad third order interpolation is practically invisible at
this scale.

Since you can\'t use digital interpolation to get your zero=-crossing point any where except on your master clock edges, it\'s not worth thinking about.

--
Bill Sloman, Sydney

 

[Joe Gwinn]

On Sun, 21 Aug 2022 23:35:04 +0300, Dimiter_Popoff <dp@tgi-sci.com>
wrote:

On 8/21/2022 19:40, jlarkin@highlandsniptechnology.com wrote:
On Sun, 21 Aug 2022 19:27:33 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 8/21/2022 18:12, jlarkin@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whit3rd@gmail.com
wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense,

https://www.dropbox.com/s/1xx7sz1e5rg6jsi/JLDDS_100M_4K.jpg?raw=1

looks pretty coarse to me. You only get small amplitude steps at low
frequencies... and then you get slow unfiltered time steps too. That\'s
the low frequency jitter problem. And in real life, low slopes reveal
comparator imperfections too.


and you can dither and interpose as many time
steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Any real lowpass filter has time delay. So relative to its output, it
is blending past and future inputs.


As far as I can see you are going to do sine wave. In that case I would
do as much brute force as is practical - the is, as long a sine lookup
table as possible - and then interpolate. Those dsp sections they put
in fpga-s must be kept busy? 10 ns is not a lot of time to do it but
it must be doable. And second or even third order interpolation
is not that hard - and can probably give you virtually error free
values even for the 1mHz case.
Easier said than done I suppose but that\'s the advantage of giving
an opinion and not having to deliver the goods.... .

It has been suggested that, at low frequencies, we interpolate between
sine table entries so we can keep approximating the sine wave at the
100 MHz clock rate, instead of making a step now and then as the
selected MS bits of the phase accumulator tick over. That does still
make a slow sine wave at the lowpass filter output.

Straight-line interpolation is probably good enough for short segments
of a sine. The interpolation slopes could be another lookup table.

The idea of making a perfect DDS clock is a deliciously complex
problem. Just thinking about it is educational.


I did a quick misuse of my filter editor to draw a sine wave and
see what interpolation looks like. 64 points, interpolated into
16384 points. You\'ll need a lot more than that but this might give
an idea. The linear interpolation looks edgy, but the difference
between second ad third order interpolation is practically invisible at
this scale.
http://tgi-sci.com/misc/sine_all.gif> <-- the whole period
then a small region at the top:
http://tgi-sci.com/misc/sine_1.gif> <-- first order interpolation,
http://tgi-sci.com/misc/sine_2.gif> <-- second order,
http://tgi-sci.com/misc/sine_3.gif> <-- third order.

What about the zero-crossing region? That\'s the critical area. Cubic
may be best there.

Joe Gwinn

 

[Ricky]

On Sunday, August 21, 2022 at 9:12:50 PM UTC-4, Joe Gwinn wrote:

On Sun, 21 Aug 2022 23:35:04 +0300, Dimiter_Popoff <d...@tgi-sci.com
wrote:

On 8/21/2022 19:40, jla...@highlandsniptechnology.com wrote:
On Sun, 21 Aug 2022 19:27:33 +0300, Dimiter_Popoff <d...@tgi-sci.com
wrote:

On 8/21/2022 18:12, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 20:35:45 -0700 (PDT), whit3rd <whi...@gmail.com
wrote:

On Saturday, August 20, 2022 at 6:04:32 PM UTC-7, jla...@highlandsniptechnology.com wrote:
On Sat, 20 Aug 2022 13:50:23 -0700 (PDT), Lasse Langwadt Christensen
lang...@fonz.dk> wrote:

lørdag den 20. august 2022 kl. 22.35.00 UTC+2 skrev jla...@highlandsniptechnology.com:

The output of the sine table is still coarse steps, with no filter to
interpolate them. May as well just use the MSB of the phase
accumulator and not mess with sine tables.

That\'s illogical. Firstly, the output of the sine table is parts-per-thousand steps,
not \'coarse\' in the voltage sense,

https://www.dropbox.com/s/1xx7sz1e5rg6jsi/JLDDS_100M_4K.jpg?raw=1

looks pretty coarse to me. You only get small amplitude steps at low
frequencies... and then you get slow unfiltered time steps too. That\'s
the low frequency jitter problem. And in real life, low slopes reveal
comparator imperfections too.


and you can dither and interpose as many time
steps of alternating values as you care to. Coarse in time is a choice, not
a requireent.

Second, a filter does not \'interpolate\' a time sequence, it only has access
to the PAST of the signal.

Any real lowpass filter has time delay. So relative to its output, it
is blending past and future inputs.


As far as I can see you are going to do sine wave. In that case I would
do as much brute force as is practical - the is, as long a sine lookup
table as possible - and then interpolate. Those dsp sections they put
in fpga-s must be kept busy? 10 ns is not a lot of time to do it but
it must be doable. And second or even third order interpolation
is not that hard - and can probably give you virtually error free
values even for the 1mHz case.
Easier said than done I suppose but that\'s the advantage of giving
an opinion and not having to deliver the goods.... .

It has been suggested that, at low frequencies, we interpolate between
sine table entries so we can keep approximating the sine wave at the
100 MHz clock rate, instead of making a step now and then as the
selected MS bits of the phase accumulator tick over. That does still
make a slow sine wave at the lowpass filter output.

Straight-line interpolation is probably good enough for short segments
of a sine. The interpolation slopes could be another lookup table.

The idea of making a perfect DDS clock is a deliciously complex
problem. Just thinking about it is educational.


I did a quick misuse of my filter editor to draw a sine wave and
see what interpolation looks like. 64 points, interpolated into
16384 points. You\'ll need a lot more than that but this might give
an idea. The linear interpolation looks edgy, but the difference
between second ad third order interpolation is practically invisible at
this scale.
http://tgi-sci.com/misc/sine_all.gif> <-- the whole period
then a small region at the top:
http://tgi-sci.com/misc/sine_1.gif> <-- first order interpolation,
http://tgi-sci.com/misc/sine_2.gif> <-- second order,
http://tgi-sci.com/misc/sine_3.gif> <-- third order.

What about the zero-crossing region? That\'s the critical area. Cubic
may be best there.

For a sine wave the zero crossing is the point where the function is perfectly linear.

I think this train of thought is out of control. The easy and optimal solution is the bog standard DDS with a long phase accumulator, a well constructed tables for the sum of angles sine equation, and a quality DAC followed by a good low pass filter and comparitor. This only needs to operate over a 2:1 frequency range since all lower frequencies can be generated by a programmable divider from the DDS output. No fuss, no muss and it can be done by next week. It\'s not like this is a new problem.

The idea of generating a trapezoid waveform over a wide frequency range means reloading the lookup table every time you change the frequency.

--

Rick C.

++- Get 1,000 miles of free Supercharging
++- Tesla referral code - https://ts.la/richard11209