Current source design (tricky?)

[Larry Brasfield]

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42334EFD.1060207@nospam.com...

Larry Brasfield wrote:
"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4233017B.3010007@nospam.com...


Fred Bloggs wrote:
[..rearrange that pull-up which may not even be necessary with these
power PMOS with VGS,th > 2V minimum...]

View in a fixed-width font such as Courier.

.
. +--------------------+-----+
. | | | PMOS
. | I-> | | +-------+
.VBATT>---+------+---/\/\-----+---------------------|s d|----
. | | Rs 100m | | | | |
. / / / | | | g |
. 680 10k 10k | / +-------+
. / / / | 4.7k |
. \ \ \ LM741| / |
. | | | |\ | \ |
. | +------------|----|+\ | 330 |
. | | | | >-----+---/\/\----+
. | | +----|-/ |
. | | | |/ | |
. | | | | |
. | | +--||---------+
. | | | 1.5n |
. | / / |
. | 10k 10k |
. | / / |
. | \ \ |
. | | 330 | |
. Vd +-----------/\/\----+ |
. | | | |
. --- | / |
. \ / | 100 |
. --- | / |
. 1n4148 | \ |
. | | | |
. | | | |
. +------+------------+-------+
.



Here's your chance to show how smart you really are,
Fred. Beware, these are real questions and blowing
them off with a bunch of insults will merely reveal (to
the newcomers) that you are an electronics idiot.

Do you believe that your diode forward drop used as
a reference will meet the OP's stated 5% accuracy
requirement over the voltage and temperature range
to be expected in an automotive application?

Do you believe that the current output of your circuit
will remain within the OP's stated transient response
requirement in the presence of load-dump transients?


Yeah- it's all good enough for what the OP needs- an output current in the range 2-3 amps and compliance within 0.5V of the rail.
The OP has no other requirements, is probably charging an accessory battery, and really doesn't give a damn about any transient
response other than it doesn't blow his components.

I take it, then, that you believe the OP to be mistaken
about his claim to need the current controlled within
a +/-5% range, after being specifically asked about the
transient response requirement.

I also take it that you believe your circuit will itself
survive in the automotive environment, with nothing
in the way of protection between it and the battery.

I have some advice to the OP: Take Fred's advice
with a large grain of salt, and be sure not to choke
on that "grain".

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.

 

[John Larkin]

On Sat, 12 Mar 2005 12:37:53 -0800, "Larry Brasfield"
<donotspam_larry_brasfield@hotmail.com> wrote:

The "capacitive load
accomadation" feature described for the LM8261
is strictly limited to large signal conditions.

But it's not. If you reflect the "Miller" capacitance to an equivalent
capacitance at the output node, adding external C simply makes this
net C look bigger. They have merely moved the dominant pole to the
output pin. It's not much more profound than putting two capacitors in
parallel. If the c-load fix only worked large-signal, it would
oscillate at low level when c-loaded, and it doesn't.

These *are* great parts for driving ADC references and mosfet gates.

Too bad the input offset shifts with common-mode voltage, as most r-r
front-ends still do. I think there's a subtlety there as regards not
making a schmitt trigger out of the whole thing.

how one might confuse it for Miller effect is a
puzzle. Care to explain that, Fred?

The National datasheet calls it Miller Effect, but that's sort of an
ancient blanket term for any sort of capacitive feedback.

Fred's not at all nice, but he's usually right.

John

 

[John Woodgate]

I read in sci.electronics.design that John Larkin <jjSNIPlarkin@highTHIS
landPLEASEtechnology.XXX> wrote (in <34m631dbl759hd9g8vmhd119ku9mbap6je@
4ax.com&gt about 'Current source design (tricky?)', on Sat, 12 Mar 2005:

The National datasheet calls it Miller Effect, but that's sort of an
ancient blanket term for any sort of capacitive feedback.

Yes, and in that sense FB is right, but in the strict sense, Miller
effect occurs between output and input ports of a single active device.

So everybody is wrong. Or right.
--
Regards, John Woodgate, OOO - Own Opinions Only.
The good news is that nothing is compulsory.
The bad news is that everything is prohibited.
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

 

[Fred Bloggs]

Larry Brasfield wrote:

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42334D1C.8070303@nospam.com...


Larry Brasfield wrote:

"Fred Bloggs" <nospam@nospam.com> wrote in
message news:4232DFB9.3020107@nospam.com...


Larry Brasfield wrote:


"Terry Given" <my_name@ieee.org> wrote in message
news:qypYd.8841$1S4.942601@news.xtra.co.nz...


Larry Brasfield wrote:

...


A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

I have been bitten quite badly by a similar "feature" in
the LM6134 (its a slew-rate modification).

The feature I mentioned above works by causing the
effective value of an internal capacitance to increase.
So it changes both the linear small-signal response
(less GBW) and the slew limiting (slower).

Nah- you're full-o-shyte! The capacitive loading decreases the effective internal capacitance due to Miller effects because it
reduces the gain.


You are the one who is full of it, Fred.

The way the feature works, typically, is by means of
a capacitor placed between the output and the "gain
node", the internal node where current sources develop
the device's voltage gain. The output buffer, under light
load conditions, bootstraps this capacitor so that it does
not much load the gain node relative to the AC grounded
integrating capacitor. When a capacitive load is present,
the increased drop across the buffer output impedance
increases the current that must be supplied to the "gain
node" for any given dV/dt. This represents an increase
in the effective capacitance loading the "gain node", and
serves to reduce the gain bandwidth while tending to
leave the excess poles unchanged.

Miller effect has very little to do with it. In fact, Miller
effect, to the small extent it occurs, acts only to slightly
move some internal excess pole(s) out a little bit when
a capacitive load is present.

You, or at least anybody capable of learning something,
can see a description of this feature's operation and a
schematic in the datasheet for Linear Technology's LT1812.
Start at:
http://www.linear.com/pc/productDetail.do?navId=H0,C1,C1154,C1009,C1022,P1838

[More blather founded on spite and ignorance cut.]
...


who has never built anything in his life.


Your ability to discern such a falsehood from such a
distance with so little evidence marks you.


That's not what the LM8261 is doing- it is Miller effect on two CE output transistors- and that is the OA you mentioned.



You are exhibiting poor reading skills here, Fred.

What I described above, before another poster
ever mentioned the LM8261, is indeed different
from what the LM8261 does. I never claimed
that the LM8261 acts as I describe above, and,
in fact, I expressly denied in this very thread that
the LM8261 acts per the above.

As for the LM8261 relying on Miller effect, you
clearly do not understand the large-signal behavior
that is clearly evident from both the description and
schematic published in the LM8261 datasheet. To
review, (for the benefit of those who are not pig-
headed), Miller effect occurs when a voltage gain
stage has capacitive feedback into its input, and
occurs under small signal conditions as well as
large signal conditions. The "capacitive load
accomadation" feature described for the LM8261
is strictly limited to large signal conditions. So,
how one might confuse it for Miller effect is a
puzzle. Care to explain that, Fred? Perhaps you
should limit your intellectual exertions to the name
calling that you have practised so diligently.

You think you're smart- but you come across as an ignorant little parrot
and pseudo-intellectual. Go back and read the LM8261 datasheet- it is in
fact the Miller effect that is exploited to achieve the gain and phase
margin with capacitive loading- and it works exactly the opposite of
your bs explanation by moving the internal dominant pole to a higher
frequency and not a lower frequency. Like most phony little piss-ant
weakling USENT frauds, you like to insinuate all this depth of
understanding, but it will be a cold day in hell before we see any
circuits or analysis coming out of that ass-hole you call a mouth. Your
little junior high school level algebra on that summing amplifier is a
case in point- really weak stuff. Here are your exact words where you
state the LM8261 is an example of a class of OA's that drop their GBW-
which is clearly wrong:

"A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

Adding a load isolation resistor to the output
tends to defeat that feature, so I would not
add it unless using an op-amp without that
bandwidth reduction feature."

As usual with NG trolls- you just want to talk and talk and talk and
talk....you will never produce anything substantial- at least you're
consistent with the rest of your life.

 

[Fred Bloggs]

Larry Brasfield wrote:

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42334EFD.1060207@nospam.com...


Larry Brasfield wrote:

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4233017B.3010007@nospam.com...


Fred Bloggs wrote:
[..rearrange that pull-up which may not even be necessary with these
power PMOS with VGS,th > 2V minimum...]

View in a fixed-width font such as Courier.

.
. +--------------------+-----+
. | | | PMOS
. | I-> | | +-------+
.VBATT>---+------+---/\/\-----+---------------------|s d|----
. | | Rs 100m | | | | |
. / / / | | | g |
. 680 10k 10k | / +-------+
. / / / | 4.7k |
. \ \ \ LM741| / |
. | | | |\ | \ |
. | +------------|----|+\ | 330 |
. | | | | >-----+---/\/\----+
. | | +----|-/ |
. | | | |/ | |
. | | | | |
. | | +--||---------+
. | | | 1.5n |
. | / / |
. | 10k 10k |
. | / / |
. | \ \ |
. | | 330 | |
. Vd +-----------/\/\----+ |
. | | | |
. --- | / |
. \ / | 100 |
. --- | / |
. 1n4148 | \ |
. | | | |
. | | | |
. +------+------------+-------+
.



Here's your chance to show how smart you really are,
Fred. Beware, these are real questions and blowing
them off with a bunch of insults will merely reveal (to
the newcomers) that you are an electronics idiot.

Do you believe that your diode forward drop used as
a reference will meet the OP's stated 5% accuracy
requirement over the voltage and temperature range
to be expected in an automotive application?

Do you believe that the current output of your circuit
will remain within the OP's stated transient response
requirement in the presence of load-dump transients?


Yeah- it's all good enough for what the OP needs- an output current in the range 2-3 amps and compliance within 0.5V of the rail.
The OP has no other requirements, is probably charging an accessory battery, and really doesn't give a damn about any transient
response other than it doesn't blow his components.



I take it, then, that you believe the OP to be mistaken
about his claim to need the current controlled within
a +/-5% range, after being specifically asked about the
transient response requirement.

Yeah- that's right- he's trying to pretend he's something other than
Harry-hobby-hacker, he has no real requirements.

I also take it that you believe your circuit will itself
survive in the automotive environment, with nothing
in the way of protection between it and the battery.

I stated that the protection was omitted, the w/o means "without". It
will just clutter the essential details of the current clamp.

I have some advice to the OP: Take Fred's advice
with a large grain of salt, and be sure not to choke
on that "grain".

Eh- you don't like it because you don't understand how it works. You can
make it more of a textbook ideal by going to the LM385 or a zener for
the voltage offset reference and adding one more resistor in the (-)
input leg of the bridge to balance the impedances- making S(Io,
Vbatt)=0- but like who cares. Go spend $30 on a bunch of unnecessary
fluff instead of $3 on something of equal and indistinguishable
performance modulo the application.

 

[John Larkin]

On Sat, 12 Mar 2005 13:58:39 -0800, "Larry Brasfield"
<donotspam_larry_brasfield@hotmail.com> wrote:

I must say that it is a lot easier to understand
somebody's points when they are not buried
in a stream of invective. I appreciate your
reasoned approach to this.

Well, I enjoy life, and Fred doesn't.

John

 

[Fred Bloggs]

Larry Brasfield wrote:

Perhaps I have not had the stomach or ...

We have already pegged you for being a gutless wonder-and pretentious
little squaking, yapping, confused parrot.

 

[Larry Brasfield]

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4233667E.2030008@nospam.com...
[Content-free content cut.]

Go back and read the LM8261 datasheet- it is in fact the Miller effect that is exploited to achieve the gain and phase margin with
capacitive loading- and it works exactly the opposite of your bs explanation by moving the internal dominant pole to a higher
frequency and not a lower frequency.
[Content-free content cut.]
Here are your exact words where you state the LM8261 is an example of a class of OA's that drop their GBW- which is clearly wrong:

"A number of op-amps on the market today are
very tolerant of capacitive loading because they
have a feature whereby that loading causes the
gain-bandwidth of the part to drop, almost in
proportion to the loading, such that the extra
pole remains far enough above the unity gain
crossover frequency that stability is preserved.
The LM8261 suggested by Mr. Hill is a good
example of this class.

I will agree that the LM8261 is not a good example
of the class I had in mind. When I wrote that, I had
assumed, incorrectly, that it used the same principle as
the LT1812 and like devices, which do operate as I
have described elsewhere in this thread.

Adding a load isolation resistor to the output
tends to defeat that feature, so I would not
add it unless using an op-amp without that
bandwidth reduction feature."

As usual with NG trolls- you just want to talk and talk and talk and talk....you will never produce anything substantial- at
least you're consistent with the rest of your life.

You know nothing about the rest of my life and
your pretense that you do confirms that you are a
sick individual. With a simple patent search, you
would quickly learn the falsity of your conjecture.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.

 

[Fred Bloggs]

Larry Brasfield wrote:

You know nothing about the rest of my life and
your pretense that you do confirms that you are a
sick individual. With a simple patent search, you
would quickly learn the falsity of your conjecture.

You're a simple-minded little pseudo-intellectual all right- no doubt
about that. Whatever skills you possess are the result of some highly
delusional and subjective process- because you're not worth a damn
around here.

 

[Larry Brasfield]

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42336C61.8080006@nospam.com...

Larry Brasfield wrote:
Perhaps I have not had the stomach or ...

We have already pegged you for being a gutless wonder-and pretentious little squaking, yapping, confused parrot.

Do you have a multiple-personality disorder, Fred?
Or is it simply your delusion that you speak for
anybody but yourself? Perhaps you would care
to name those for whom you pretend to speak.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.

 

[Fred Bloggs]

Larry Brasfield wrote:

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42336C61.8080006@nospam.com...

Larry Brasfield wrote:

Perhaps I have not had the stomach or ...

We have already pegged you for being a gutless wonder-and pretentious little squaking, yapping, confused parrot.



Do you have a multiple-personality disorder, Fred?
Or is it simply your delusion that you speak for
anybody but yourself? Perhaps you would care
to name those for whom you pretend to speak.

I speak for all the observant types who allow themselves to make
interesting inference outside the confines of something like the
red-herrings you pass off as posts.

 

[John Fields]

On Sat, 12 Mar 2005 13:16:51 -0800, John Larkin
<jjSNIPlarkin@highTHISlandPLEASEtechnology.XXX> wrote:

Fred's not at all nice, but he's usually right.

---
IME, when Fred's not nice is when someone can't back up technical
claims with proof and then, when they get called on it, try to save
face by dodging the issue(s).

I used to not like Fred very much until we collaborated on a
differential temperature controller (on this NG, I believe) where he
caught some errors I made and reported them with no rancor, much as
would happen in an ideal design review, and then followed up with
comments on the changes I made in the design until we both felt the
design was right.

IMO, an excellent non-confrontational cross-dialogue, and the OP wound
up with a nice controller with the design done for free.

--
John Fields

 

[Ken Smith]

In article <d0v57j0p90@drn.newsguy.com>,
Winfield Hill <hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote:
[....]

Whew! That's supposed to be a simple way to get the moderately-
precise current the O.P. needs? Ten resistors, a cap, a diode
and an opamp to drive the FET? Nah, come-on man, let's get down!

The single-transistor regulator is a simple yet effective rough
current source, requiring only two resistors with a transistor.

[..]

But this circuit needs about 0.65 to 0.7V across the current-sense
resistor Rs, whereas we'd like that to be about 0.25V for 2.5A through
[....]

Mine's even simpler:


.. (O)----o-- Rs --o----S D----------(O)
.. | | _|__|_
.. e\| | ---- Q2
.. |------' |
.. /| Q1 G
.. | 2N711 |
.. '-------------o---- Rg ---- gnd


It only needs about 0.4V to regulate.

--
--
kensmith@rahul.net forging knowledge

 

[Ken Smith]

In article <eCJYd.335$_7.638@news.uswest.net>,
Larry Brasfield <donotspam_larry_brasfield@hotmail.com> wrote:
[...]

It would be quite a trick to avoid the offset
shift when the effective input pair changes.

With laser trimming, it can be reduced to the level of the CMRR. At that
point, it stops mattering that it is caused by the R-R nature of the part.

I think the circuit could be done just as well with the LM301 op-amp
assuming you pull the output up. If you compensate them, they can handle
driving capacitive loads.


--
--
kensmith@rahul.net forging knowledge

 

[Fred Bloggs]

John Larkin wrote:

On Sat, 12 Mar 2005 13:58:39 -0800, "Larry Brasfield"
donotspam_larry_brasfield@hotmail.com> wrote:



I must say that it is a lot easier to understand
somebody's points when they are not buried
in a stream of invective. I appreciate your
reasoned approach to this.


Well, I enjoy life, and Fred doesn't.

John

This Brasfield worm is a born-again xtian scumball from Washington
state. He has an agenda- and it has nothing to do with engineering. Did
you see the feckless little worm skulk out of the encoder divider thread
- after coming in there like the big deal engineer- turned out the
maggot can't even handle elementary logic. He is is finished- all of his
posts, which are full of errors and pedantic drivel, will be scrutinized
and criticized for the trash they are. I'm not sure, but I think he is
that hermaphroditic looking thing originally from Texas- guess he will
be changing the sign-on name again...

 

[Winfield Hill]

Ken Smith wrote...

Mine's even simpler:

. (O)----o-- Rs --o----S D----------(O)
. | | _|__|_
. e\| | ---- Q2
. |------' |
. /| Q1 G
. | 2N711 |
. '-------------o---- Rg ---- gnd

It only needs about 0.4V to regulate.

Hmm, maybe even less, but hey, no fair using Ge transistors.


--
Thanks,
- Win

 

[Tony Williams]

On 13 Mar, tonyw@ledelec.demon.co.uk wrote:

Assuming the MOSFET is operating in the triode region,
what Vg-s swing is required to hold Id within <5% when
Vg-s changes by 2V (as set by the 12-14V Vs range)?
|

/|\
Vd-s

--
Tony (Typo) Williams.

 

[Fred Bloggs]

Winfield Hill wrote:

Whew! That's supposed to be a simple way to get the moderately-
precise current the O.P. needs? Ten resistors, a cap, a diode
and an opamp to drive the FET? Nah, come-on man, let's get down!

Heheh- admitted- it is pathetic.

The single-transistor regulator is a simple yet effective rough
current source, requiring only two resistors with a transistor.

. (O)----o-- Rs --o----S D----------(O)
. | | _|__|_
. e\| | ---- Q2
. |------' |
. /| Q1 G
. | |
. '-------------o---- Rg ---- gnd

But this circuit needs about 0.65 to 0.7V across the current-sense
resistor Rs, whereas we'd like that to be about 0.25V for 2.5A through
a 0.1-ohm resistor, etc. So we need to subtract a little voltage from
the Q1 Vbe drop. We can use an old Robert Widlar trick, and get this
from a fraction of the pass-transistor's drive voltage, like this:

. simple low-drop-out current source
.
. (O)----+-- Rs --+----S D----------(O)
. | 0.1 | _|__|_
. | R1 ---- Q2
. e\| | |
. |------+ G
. /| Q1 | |
. | R2 |
. | | |
. '--------+----+--- Rg ---(O) gnd

That's pretty simple, only three resistors. The current is given by

Io Rs = Vbe (1+R1/R2) - R1/R2 (Vgs + Io Rs)

R2/R1 = (Vgs - Vbe + Io Rs) / (Vbe - Io Rs)

Trying for a 2.5A CS, so the last term is 0.25V, assume Vbe = 0.65
and Vgs = 3V, so we can choose some values. R2 has 3 -0.65 + 0.25
= 2.6V across it and with 0.4V across R1 we have R2 = 6.5 R1, so if
we pick R1 = 220 ohms, then R2 = 1430 ohms, which we can make from
1k plus a 1k trimpot.

The OP can assemble the circuit, and adjust R2 to get his desired Iout.
There will be a little variation with load because Vgs changes a little
with Id = Io and because the FET's junction is heating up, but it after
trimming it may be all the OP needs.

Given that the 12V battery is probably pretty constant (near 12V if
running alone, or near 13.8V if in an operating automobile) we could
choose to ignore the issue of changing supply voltage. But if not,
there's a simple one-resistor improvement to the circuit to cancel
the transistor's change in Vbe due to varying Ic current through Rg.

. simple low-drop-out current source
.
. (O)----+-- Rs --+----S D----------(O)
. | 0.1 | _|__|_
. | R1 ---- Q2
. e\| | |
. |------+ G
. /| Q1 | |
. | R2 |
. | |___ | _______
. | | |
. '-------------+-- Rc --+-- Rg ---(O) gnd

Properly chosen, the higher voltage across Rc at high battery voltages
cancels Q1's higher Vbe voltage at higher Ic currents. Readers who
are familiar with re = kT/qIc, etc. (see AoE page 80), may recognize
that choosing Rc = R2/R1 re, will do the trick.

. simple 2.5A 10-15V low-drop-out current source
.
. (O)----+-- Rs --+------S D----------(O)
. "12V" | 0.1 | _|__|_ --> 2.5A
. | 220 ---- Q2
. e\| | | IRF4905
. Q1 |------+ G
. 2n4403 /| | |
. | 1k +1k pot |
. | |_____ | ________
. | | |
. '---------------+-- 160 --+-- 10k ---(O) gnd

Still pretty compact, only four resistors. Now that's getting down!

BTW, watch out. Anyone trying to simulate this circuit with spice
should realize that most power MOSFET models will provide incorrect
Vgs vs Id values at these low current densities.

That's the characteristically clever Widlar invention- but I don't think
even he would use it at that small an Rs. We can boil down your
calculations by defining M=(1+R2/R1), and this relatively large M mixed
with small Rs does not make a very good combination. It turns out
M=Vgs(Io)/(Vbe-RsIo) so that RsIo comparable in magnitude to Vbe and
Vgs(Io) much larger , make M large, 7.5 in this case. So the main
drawback is that Io=(Vbe-Vgs(Io)/M)/Rs so that dIo/dT~(dVbe/dT)/Rs which
is not a good number, -20mA/oC in this case. Then at even -20oC you have
Io increased by nearly 1 amp over the 25oC setting, and a similar
decrease at 70oC. That variation is just too wild.

 

[Winfield Hill]

Tony Williams wrote...

Winfield Hill wrote:

. simple low-drop-out current source
.
. (O)----+-- Rs --+----S D----------(O)
. | 0.1 | _|__|_
. | R1 ---- Q2
. e\| | |
. |------+ G
. /| Q1 | |
. | R2 |
. | | |
. '--------+----+--- Rg ---(O) gnd

[snip]
BTW, watch out. Anyone trying to simulate this circuit with
spice should realize that most power MOSFET models will provide
incorrect Vgs vs Id values at these low current densities.

Assuming the MOSFET is operating in the triode region,
what Vg-s swing is required to hold Id within <5% when
Vd-s changes by 2V (as set by the 12-14V Vs range)?

Is there enough gain, (through Rs and Q1) to provide
that required Vg-s swing?

Good question, Tony.

.. (O)----o-- Rs --o----S D----------(O)
.. | | _|__|_
.. e\| | ---- Q2
.. |------' |
.. /| Q1 G
.. | |
.. '-------------o---- Rg ---- gnd

In this classic circuit the Q1 stage gain is fairly high, e.g., with
9 to 11V across the Rg collector resistor, G = 40 V = 400. From that
viewpoint, 5% regulation isn't an issue. But the circuit below isn't
so well off. The added voltage-offsetting resistors create a feedback
loop limiting the Q1 stage gain to R2/R1, or about 6.5 in this case.

This doesn't sound good.

Reducing Rs to 0.1 ohm might have made it marginal.

Let's look at the circuit fleshed out with part values.

.. simple 2.5A 10-15V low-drop-out current source
..
.. (O)----+-- Rs --+------S D----------(O)
.. "12V" | 0.1 | _|__|_ --> 2.5A
.. | 220 ---- Q2
.. e\| R1 | | IRF4905
.. Q1 |------+ G
.. 2n4403 /| | |
.. | 1k +1k pot |
.. | R2 | | Rg
.. '--------+------+-- 10k ---(O) gnd


With a big FET like the IRF4905, we're into the constant-current
"saturated" region if Vds is greater than about 500mV at Id = 2A
(this big FET is happy conducting well over 100A, if given a little
Vds to work with, so a low 2A is getting down into its high-gain
subthreshold region). We can estimate the FET's transconductance
to be about 10S at 2A and Vds, above 0.5 to 1V (datasheet fig 1),
so the FET's source-follower gain, G = gm RL / (1 + gm RL), would
be above 0.5, which isn't too bad...

Ooops, our poor loop gain drops to a little above 3. It's not the
0.1 ohms that's killing us so much as the R2/R1 feedback connection.
But that's there to reduce the Rs voltage drop from 0.7 to 0.25V.

After trimming R2 to establish the circuit's current, its stability
will be determined by how well subsequent Vgs changes are corrected
for by the Q1 error amplifier. If the circuit is operating with Vds
above 0.5 to 1V (where the FET is acting like a current source on its
own), the Vgs change with Vds won't be much, perhaps under 50mV, which
would be 15mV on Rs, and regulate the current to under 6%. But oops,
the FET's dissipation varys with Vds drop, so its temperature varys.
Vgs has a negative tempco (the IRF4905's zero-tempco current = 22A),
and looking at the datasheet figure 3, we see this can easily amount
to more than 50mV with junction heating, so my circuit is toast. :&gt

Playing with the value of Rs and its voltage drop, can't rescue the
circuit. E.g., reducing Rs degrades the Q2 stage gain, but this is
canceled by a corresponding increase in R2/R1 gain, so that's a wash.

We could add an LM385 and a resistor to get a stable voltage to which
we can connect R2 and offset Q1, but that would destroy the circuit's
simplicity.

.. simple crummy low-drop-out current source
..
.. (O)----+-- Rs --+----------S D----------(O)
.. "12V" | 0.1 _|_ _|__|_ --> 1.5 to 2.5A
.. | \_/ ---- Q2
.. e\| D1 | Schottky | IRF4905
.. Q1 |------+ G
.. 2n4403 /| | |
.. | | | Rg
.. '--------| ---------+-- 10k --+---(O) gnd
.. '---- R2 3.3k -------'

Seeking to avoid complexity, all that occurs to me is to replace R1
with a Schottky diode. The circuit is modestly adjustable with R2.


--
Thanks,
- Win

 

[Larry Brasfield]

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42346CC9.1020400@nospam.com...
[Quoting Brasfield:]

Miller effect occurs when a voltage gain
stage has capacitive feedback into its input, and
occurs under small signal conditions as well as
large signal conditions.

Total bs overly restrictive definition of Miller effect, which is one of the most brain-dead simple concepts extant in circuit
theory, about the level of complexity of Ohm's law.

What examples of "Miller effect", as that term is
generally used, do you see as being excluded by
that definition?

The "capacitive load
accomadation" feature described for the LM8261
is strictly limited to large signal conditions. So,
how one might confuse it for Miller effect is a
puzzle. Care to explain that, Fred? Perhaps you
should limit your intellectual exertions to the name
calling that you have practised so diligently.

Looks like you got your ass handed to you again, goodie-goodie. The LM8261 is all about Miller effect, large and small signal.
Guess NS needs to lower the reading level to 8th grade non-electronic idiot to "accomadate" the likes of you- can't possibly be
that something is very wrong with you.

What's funny about this, Fred, is that you have already
replied to my post of March 12, 13:58, where I
agreed with John Larkin's correction on the above
statement. Why are you just now so interested in
gloating over the fact that I made a mistake?

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.