J
Jonathan Kirwan
Guest
On 20 Oct 2004 06:23:23 -0700, kianmeng.tey@gmail.com (KM) wrote:
the method), I decided to dance around your posted circuit in my second post but
to hold back from actually posting it until a third addition I wanted to make
today, wondering if someone would mention this exact alternative! Now, no need.
Some hobbyist thoughts:
A fair design might use a 220k in the base, planning a current gain of only 25
for reasonable saturation, ((5-.2)/47k)/((1.5-.6)/220k), and not much increase
in drive current over what's already needed. However, it's speed tops out at
about 50kHz or so, while still pulling 100uA drive current when low. My first
posted example design (using 1/2 sized R1 and R2 of what I posted) is also good
to about 50kHz, but by comparison pulls only tens of nanoamps of drive current.
Also, my second post which includes the circuit quite similar to yours, but with
the base resistor removed and an emitter resistor added, and designing it for
about the same 100uA drive current and similar output impedance yields a top
speed of about 500kHz -- 10 times better. The output swing is a little less, 4V
instead of 5V, but that's not enough to account for the difference. Why then?
Jon
Thanks! After my first post on this (where I'd entirely forgotten to mentionWhen the digital line is logic low at 0 volt the transistor turn on
and current flow via the resistor R2. (choose R1 & R2 to be loage
value eg. 47k not to stress the IC sink cabability ) and when the the
line turn to high the transistor turn off.
the method), I decided to dance around your posted circuit in my second post but
to hold back from actually posting it until a third addition I wanted to make
today, wondering if someone would mention this exact alternative! Now, no need.
Some hobbyist thoughts:
A fair design might use a 220k in the base, planning a current gain of only 25
for reasonable saturation, ((5-.2)/47k)/((1.5-.6)/220k), and not much increase
in drive current over what's already needed. However, it's speed tops out at
about 50kHz or so, while still pulling 100uA drive current when low. My first
posted example design (using 1/2 sized R1 and R2 of what I posted) is also good
to about 50kHz, but by comparison pulls only tens of nanoamps of drive current.
Also, my second post which includes the circuit quite similar to yours, but with
the base resistor removed and an emitter resistor added, and designing it for
about the same 100uA drive current and similar output impedance yields a top
speed of about 500kHz -- 10 times better. The output swing is a little less, 4V
instead of 5V, but that's not enough to account for the difference. Why then?
Jon