Can I \"reset\" an AD9901?...

[Jan Panteltje]

On a sunny day (Tue, 08 Mar 2022 12:35:20 -0800) it happened John Larkin
<jlarkin@highland_atwork_technology.com> wrote in
<u2ff2hp9e5qmmfb31pick3o08nk9gmj1v2@4ax.com>:

On Tue, 8 Mar 2022 19:07:39 +0100, Jean-Pierre Coulon
coulon@cacas.pam.obs-nice.fr> wrote:

On Tue, 8 Mar 2022, Phil Hobbs wrote:

I gather it\'s locking two sources using a variable delay (or phase shifter)
rather than a VCO.

There are two nulls per cycle, one of which is unstable. With a PLL, there\'s
always a stable null to be found--if the initial phase is pushing you away
from an unstable one, the next one it finds will be stable.

Indeed if I enter a test signal at 1 MHz and the other at 1.0000001 MHz I
see a ramp for 10 seconds, a rest at the rail value for 10 seconds and
this succession again.

In the real world I have a phase shifter with a range of about -120:120
deg.

Perhaps I should design my own AD9901 with circuits and reset both
flip-flops.

Bye,

A single flop is all you may need. Measure early/late bang-bang.

But if you can only shift 120 degrees and need 180, that\'s a problem.

If the sources can indeed be different frequencies, the phase shifter
has to wrap forever.

Sample and hold on a ramp works great, so does it one the edge of a quare wave,
used here:
http://panteltje.com/panteltje/z80/system14/diagrams/fdc-2.jpg

 

[Phil Hobbs]

Joe Gwinn wrote:

On Tue, 8 Mar 2022 16:34:26 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

Joe Gwinn wrote:
On Tue, 08 Mar 2022 09:39:33 -0800, jlarkin@highlandsniptechnology.com
wrote:

On Tue, 8 Mar 2022 11:39:43 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 16:54:08 +0100, Jean-Pierre Coulon
coulon@cacas.pam.oca.eu> wrote:

I am using an Analog-devices AD9901 to lock the phase between two 1-MHz
signals.

The problem is that the state of the flip-flops is random at power on. Since
the phase between my 2 signals varies in a limited phase domain, sometimes my
output signal remains stuck at either limit of its range. Of course a 2*pi
phase variation would solve my problem. I cheat by disabling either input
signal for a brief moment.

Is there any way to force the statusses of both flip-flops on request?

Regards,

We use AD9901 and haven\'t seen that problem. Might you actually have a
pull-lock range problem?

It\'s expensive for a 1 MHz loop.




I gather it\'s locking two sources using a variable delay (or phase
shifter) rather than a VCO.

There are two nulls per cycle, one of which is unstable. With a PLL,
there\'s always a stable null to be found--if the initial phase is
pushing you away from an unstable one, the next one it finds will be
stable.

However, if you\'re using a phase shifter with a limited range, then if
you fetch up on the wrong side of the unstable null, the loop will rail
and stay railed.

Lo these many years ago (1985ish), I built a successive-approximation
phase digitizer. To avoid this exact problem, I tested the phase
detector output at the conversion pulse, set a flipflop, and used that
plus an XOR gate to make sure the SAR was shooting for the stable null.

Cheers

Phil Hobbs

Yeah, a delay loop would be different. In a frequency loop, the 9901
should drive towards lock if it possibly can.

A single d-flop would be a good delta-t detector for a time lock loop.
We\'ve done that to a few 10s of fs.


FYI, NTP (Network Time Protocol) solves this problem using a
combination of a PLL (phase lock loop) and a FLL (frequency lock
loop), implemented in software. The loop time constant is something
like 50 minutes.

Joe Gwinn


I did an interesting laser locker about 10 years ago. It used both
current- and temperature-tuning of a 1.55 um DFB diode laser. The most
interesting point was that there was only one loop running both--the
temperature-tuning did the initial lock acquisition using a slow
triangular sweep, and then when the current-tuning signal came off the
peg, it was so much faster that it took over the loop completely,
leaving the temperature tuning to keep the bias current in the centre of
its range.

That\'s pretty cute.

I think that most Rubidium vapor-cell secondary standards do much the
same thing - they sweep slowly in frequency (~200 Hz p-p) until they
see a dip in the optical output, then stop sweeping and converge to
lock on that dip.


It used R-T locking, which is probably my second best trick.

R-T Locking?

Joe Gwinn

It\'s a method of locking a laser to a moderate-finesse etalon (F = 30 or
thereabouts), with accuracy and stability potentially limited only by
shot noise.

The trick is superficially similar to slope detection of FM using the
skirts of an AM-only receiver. You make a very stable Fabry-Perot
etalon, put the beam of a single-frequency diode laser through it, and
detect the transmitted (T) and reflected (R) beams separately.

Once you have those, you subtract them to form the tuning signal R-T.
Ideally you do it by simply wiring them anode-to-cathode, so that the
photocurrents subtract directly, probably with a bit of bootstrap magic
to reduce the effects of their capacitance.

The locking loop servos around the point R -T = 0, which is notionally
halfway down one side of the transmission peak. Servoing around zero
prevents the laser\'s residual intensity noise (RIN) from coupling into
the tuning signal and degrading the FM moise.

(See <https://electrooptical.net/static/eoi/patents/US06259712__.pdf>.)

There are practical problems, of course--the loop bandwidth needs to be
several times the laser\'s free-running line width, the laser has to
respond well to current tuning and oscillate in only one mode, and so
forth. Those aren\'t trivial requirements, but laser folks are used to
much worse ones. Using a fairly short cavity with a finesse of 30 to
100 makes the optical bandwidth wide enough that it doesn\'t disturb the
loop operation, which is a win.

With another turn of the crank, you can use this idea to make
ultrastable intracavity measurements. If the etalon were lossless, the
R and T beams would sum to a constant optical power, so that the sum of
the two photocurrents R + T would be constant as well. In reality this
isn\'t so. That means that although the laser\'s AM noise doesn\'t get
turned into FM sidebands, FM laser noise does become AM noise on the R +
T signal.

The cute part is that by attenuating the (stronger) R beam so that

d R / d nu + d T / d nu = 0,

you make the R + T signal decouple from the tuning, so that you can in
principle do intracavity amplitude measurements down at the shot noise
as well. (You need to use laser noise cancellation to get rid of the
RIN on the R+T signal.)

The field strength inside the etalon cavity is about F times that of the
incident beam, which greatly enhances the sensitivity of measurements
peformed inside the cavity. (Doing measurements inside a passive cavity
is pretty straightforward, unlike laser intracavity measurements, which
are squirrelly as hell.)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

John Larkin wrote:

On Tue, 8 Mar 2022 16:23:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 11:39:43 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 16:54:08 +0100, Jean-Pierre Coulon
coulon@cacas.pam.oca.eu> wrote:

I am using an Analog-devices AD9901 to lock the phase between two 1-MHz
signals.

The problem is that the state of the flip-flops is random at power on. Since
the phase between my 2 signals varies in a limited phase domain, sometimes my
output signal remains stuck at either limit of its range. Of course a 2*pi
phase variation would solve my problem. I cheat by disabling either input
signal for a brief moment.

Is there any way to force the statusses of both flip-flops on request?

Regards,

We use AD9901 and haven\'t seen that problem. Might you actually have a
pull-lock range problem?

It\'s expensive for a 1 MHz loop.




I gather it\'s locking two sources using a variable delay (or phase
shifter) rather than a VCO.

There are two nulls per cycle, one of which is unstable. With a PLL,
there\'s always a stable null to be found--if the initial phase is
pushing you away from an unstable one, the next one it finds will be
stable.

However, if you\'re using a phase shifter with a limited range, then if
you fetch up on the wrong side of the unstable null, the loop will rail
and stay railed.

Lo these many years ago (1985ish), I built a successive-approximation
phase digitizer. To avoid this exact problem, I tested the phase
detector output at the conversion pulse, set a flipflop, and used that
plus an XOR gate to make sure the SAR was shooting for the stable null.

Cheers

Phil Hobbs

Yeah, a delay loop would be different. In a frequency loop, the 9901
should drive towards lock if it possibly can.

A single d-flop would be a good delta-t detector for a time lock loop.
We\'ve done that to a few 10s of fs.



Yeah, I\'ve been meaning to try out one of those 10EP dflops that you like.



About the fastest non-Russian flop around is probably NB7V52. We
walked the clock and data edges across one another:

https://www.dropbox.com/s/1i2yz7otty94o9l/NB7_Jitter_1.jpg?raw=1

https://www.dropbox.com/s/qahpb8uh1xr53vj/NB7_Steps.jpg?raw=1

That jitter includes the circuits that generated the time sweeps.

D-flop bang-bang discriminators rock, but people seem to avoid them.

Like I said, I\'ve been meaning to try that out. Too cool to ignore.

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[whit3rd]

On Tuesday, March 8, 2022 at 6:29:23 PM UTC-8, Gerhard Hoffmann wrote:

Am 08.03.22 um 22:46 schrieb whit3rd:
On Tuesday, March 8, 2022 at 11:29:22 AM UTC-8, Gerhard Hoffmann wrote:

I would really like the 9046 if I could switch off its VCO.
I do not want an unneeded frequency on my board.

Pin 5 is the oscillator inhibit input; that disables one of the phase comparators, too.

https://assets.nexperia.com/documents/data-sheet/74HCT9046A.pdf

From the data sheet:

The inhibit function differs. For the 74HCT4046A a HIGH-level
at the inhibit input (pin INH) disables the VCO and demodulator,
...
Unfortunately, the remaining phase detector is just the
XOR gate, not the interesting one. That could be cheaper
with a LVC-86 gate.

Floating pins 11 and 12 should turn the VCO off; ground or pullup
on pins 6 and 7 should, too.
R1, R2 is specified as 3K-300K, C1 > 40 pF
Leaving them out does not guarantee that the VCO is dead,
only that it does not behave.

Yeah, but for 4046 compatibility, those resistors are the program current
path, and with zero current, the timing capacitor won\'t charge. If they
also bias part of the phase detector, though... the other approach, grounding the
timing capacitor, will also stop the oscillation, by wasting the applied current.

> But one could try it. Asking Nexperia will probably lead to nothing.

The old RCA CD4046 data sheet was much more enlightening than the Nexperia data sheet.

 

[server]

On Wed, 9 Mar 2022 04:58:25 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

John Larkin wrote:
On Tue, 8 Mar 2022 16:23:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 11:39:43 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 16:54:08 +0100, Jean-Pierre Coulon
coulon@cacas.pam.oca.eu> wrote:

I am using an Analog-devices AD9901 to lock the phase between two 1-MHz
signals.

The problem is that the state of the flip-flops is random at power on. Since
the phase between my 2 signals varies in a limited phase domain, sometimes my
output signal remains stuck at either limit of its range. Of course a 2*pi
phase variation would solve my problem. I cheat by disabling either input
signal for a brief moment.

Is there any way to force the statusses of both flip-flops on request?

Regards,

We use AD9901 and haven\'t seen that problem. Might you actually have a
pull-lock range problem?

It\'s expensive for a 1 MHz loop.




I gather it\'s locking two sources using a variable delay (or phase
shifter) rather than a VCO.

There are two nulls per cycle, one of which is unstable. With a PLL,
there\'s always a stable null to be found--if the initial phase is
pushing you away from an unstable one, the next one it finds will be
stable.

However, if you\'re using a phase shifter with a limited range, then if
you fetch up on the wrong side of the unstable null, the loop will rail
and stay railed.

Lo these many years ago (1985ish), I built a successive-approximation
phase digitizer. To avoid this exact problem, I tested the phase
detector output at the conversion pulse, set a flipflop, and used that
plus an XOR gate to make sure the SAR was shooting for the stable null.

Cheers

Phil Hobbs

Yeah, a delay loop would be different. In a frequency loop, the 9901
should drive towards lock if it possibly can.

A single d-flop would be a good delta-t detector for a time lock loop.
We\'ve done that to a few 10s of fs.



Yeah, I\'ve been meaning to try out one of those 10EP dflops that you like.



About the fastest non-Russian flop around is probably NB7V52. We
walked the clock and data edges across one another:

https://www.dropbox.com/s/1i2yz7otty94o9l/NB7_Jitter_1.jpg?raw=1

https://www.dropbox.com/s/qahpb8uh1xr53vj/NB7_Steps.jpg?raw=1

That jitter includes the circuits that generated the time sweeps.

D-flop bang-bang discriminators rock, but people seem to avoid them.

Like I said, I\'ve been meaning to try that out. Too cool to ignore.

Cheers

Phil Hobbs

The best time-sweep test generator could be a crazy fast edge and a
trombone-type micrometer driven mechanical delay line.

Or maybe stretching or heating a chunk of coax or pcb to make
picosecond delay sweeps. Any other ideas? Varicap delay line?

I wonder if the DC bias on a pcb trace affects prop delay. Worth
trying.

We used comparators, which probably had more jitter than the flop
under test.



--

I yam what I yam - Popeye

 

[Phil Hobbs]

jlarkin@highlandsniptechnology.com wrote:

On Wed, 9 Mar 2022 04:58:25 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

John Larkin wrote:
On Tue, 8 Mar 2022 16:23:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 11:39:43 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 16:54:08 +0100, Jean-Pierre Coulon
coulon@cacas.pam.oca.eu> wrote:

I am using an Analog-devices AD9901 to lock the phase between two 1-MHz
signals.

The problem is that the state of the flip-flops is random at power on. Since
the phase between my 2 signals varies in a limited phase domain, sometimes my
output signal remains stuck at either limit of its range. Of course a 2*pi
phase variation would solve my problem. I cheat by disabling either input
signal for a brief moment.

Is there any way to force the statusses of both flip-flops on request?

Regards,

We use AD9901 and haven\'t seen that problem. Might you actually have a
pull-lock range problem?

It\'s expensive for a 1 MHz loop.




I gather it\'s locking two sources using a variable delay (or phase
shifter) rather than a VCO.

There are two nulls per cycle, one of which is unstable. With a PLL,
there\'s always a stable null to be found--if the initial phase is
pushing you away from an unstable one, the next one it finds will be
stable.

However, if you\'re using a phase shifter with a limited range, then if
you fetch up on the wrong side of the unstable null, the loop will rail
and stay railed.

Lo these many years ago (1985ish), I built a successive-approximation
phase digitizer. To avoid this exact problem, I tested the phase
detector output at the conversion pulse, set a flipflop, and used that
plus an XOR gate to make sure the SAR was shooting for the stable null.

Cheers

Phil Hobbs

Yeah, a delay loop would be different. In a frequency loop, the 9901
should drive towards lock if it possibly can.

A single d-flop would be a good delta-t detector for a time lock loop.
We\'ve done that to a few 10s of fs.



Yeah, I\'ve been meaning to try out one of those 10EP dflops that you like.



About the fastest non-Russian flop around is probably NB7V52. We
walked the clock and data edges across one another:

https://www.dropbox.com/s/1i2yz7otty94o9l/NB7_Jitter_1.jpg?raw=1

https://www.dropbox.com/s/qahpb8uh1xr53vj/NB7_Steps.jpg?raw=1

That jitter includes the circuits that generated the time sweeps.

D-flop bang-bang discriminators rock, but people seem to avoid them.

Like I said, I\'ve been meaning to try that out. Too cool to ignore.

Cheers

Phil Hobbs

The best time-sweep test generator could be a crazy fast edge and a
trombone-type micrometer driven mechanical delay line.

Or maybe stretching or heating a chunk of coax or pcb to make
picosecond delay sweeps. Any other ideas? Varicap delay line?

One approach would be to mechanically stretch a piece of RG-402 or
something like that. For temporary impedance matching jobs, I\'ve been
known to make shunt stubs by sticking thumbtacks into RG-58 patch cords.
They\'re surprisingly stable, and the coax survives fine--pull out the
tack and it\'s good as new.

A picosecond is only about 8 mils of coax, so one ought to be able to
get a reasonable elastic range by stretching a foot or so of hardline.

I wonder if the DC bias on a pcb trace affects prop delay. Worth
trying.

Probably a little. Temperature certainly does, or one could maybe use a
high enough rep rate that the clock and data are exactly half a cycle
out of phase--then the delay can be changed just by changing the rep
rate a little.

At 300 MHz, that would be several inches of path difference, not too bad
to fit on a board.

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

whit3rd wrote:

On Tuesday, March 8, 2022 at 6:29:23 PM UTC-8, Gerhard Hoffmann wrote:
Am 08.03.22 um 22:46 schrieb whit3rd:
On Tuesday, March 8, 2022 at 11:29:22 AM UTC-8, Gerhard Hoffmann wrote:

I would really like the 9046 if I could switch off its VCO.
I do not want an unneeded frequency on my board.

Pin 5 is the oscillator inhibit input; that disables one of the phase comparators, too.

https://assets.nexperia.com/documents/data-sheet/74HCT9046A.pdf

From the data sheet:

The inhibit function differs. For the 74HCT4046A a HIGH-level
at the inhibit input (pin INH) disables the VCO and demodulator,
...
Unfortunately, the remaining phase detector is just the
XOR gate, not the interesting one. That could be cheaper
with a LVC-86 gate.

Floating pins 11 and 12 should turn the VCO off; ground or pullup
on pins 6 and 7 should, too.
R1, R2 is specified as 3K-300K, C1 > 40 pF
Leaving them out does not guarantee that the VCO is dead,
only that it does not behave.

Yeah, but for 4046 compatibility, those resistors are the program current
path, and with zero current, the timing capacitor won\'t charge. If they
also bias part of the phase detector, though... the other approach, grounding the
timing capacitor, will also stop the oscillation, by wasting the applied current.

But one could try it. Asking Nexperia will probably lead to nothing.

The old RCA CD4046 data sheet was much more enlightening than the Nexperia data sheet.

It was a better part too--you could get a good 100:1 range out of the
VCO, and it was nice and linear, if slow.

The oscillators of the HC4046 and its fancier brethren are sufficiently
nonlinear (3:1 slope variations, some as bad as 5:1) as to badly degrade
loop performance--it\'ll be way overdamped in part of the range and ring
like an SOB in another part if you aren\'t careful. The oscillators also
just quit on you if the control voltage goes below a volt or so. A
straight loop will cope with that, but fancier things such as offset
loops may not.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Mike Monett]

Gerhard Hoffmann <dk4xp@arcor.de> wrote:

Am 08.03.22 um 21:19 schrieb Mike Monett:
Gerhard Hoffmann <dk4xp@arcor.de> wrote:

Am 08.03.22 um 19:02 schrieb Mike Monett:

The AD9901 is a truly horrible phase detector. The concept starts with
a deep misunderstanding of the reason for deadband near the center of
the transfer curve.

No. The AD9901 is good. I had excellent results with it.


Deadband is not produced in the digital portion of the phase detector.
It is produced in the following analog section when the propagation
delay through one path is slower than the delay through the other
path.

What are you talking about?
There is no analog section in the AD9901.

I even have a compilable VHDL version of it that fits
into a tiny corner of a Xilinx Coolrunner II.


An example is shown in Jim Thompson\'s MC4044 phase/frequency detector.
The pullup path is a complicated discrete inverter, and the pulldown
path is a simple diode. The pullup path is much slower than the
pulldown path, and the detector produces no output for late samples
near the center of the transfer curve.

What has the Helgoland island to do with all of this?

This is shown in the LTspice file DEADBAND.ASC in the following link:

https://tinyurl.com/2p97vht8

The companion file, FASTDIOD.ASC shows the pullup path replaced by a
diode, the same as the pulldown path. The pullup and pulldown paths
are
both equal and very fast, and the phase detector output is now
continuous through zero.

You can duplicate this performance at low frequencies by using
ordinary
CMOS 74AC74 and 74AC00 chips. For higher frequencies, MECL ECLINPS
ic\'s
will work. There are also a number of commerial chips, but beware of
AD9901 clones. Stay away from any ones that feature XOR operation to
eliminate deadband. They have terrible ripple and drift.

I have the impression that you mix something with the CD4046 and its
ilk. That has the problem that the charge pumps deliver no
gain Kp when there is no phase error. That can be mostly healed
with a 1 Meg bleed resistor.

And even there, the 9046 has corrected that for good.

I would really like the 9046 if I could switch off its VCO.
I do not want an unneeded frequency on my board.

??? Do you understand LTspice?

Methinks yes, I do.

And generic Spice also from the inside. Back then(R) we had to
program all the interesting algorithms ourselves before we
were given the 2G6 sources. Later I ported V3 to
Interactive Unix on a 386.

Did you even notice that we were talking about AD9901 and
not about your MC4044?

Hint: They could not be more different.


Gerhard

My post is about the MC4044 and deadband. The AD9901 is an XOR phase
detector with horrible ripple and drift. It is also very slow. The MC9046
has the same deadband problem as the MC4044.



--
MRM

 

[Anthony William Sloman]

On Thursday, March 10, 2022 at 8:51:51 AM UTC+11, Mike Monett wrote:

Gerhard Hoffmann <dk...@arcor.de> wrote:

Am 08.03.22 um 21:19 schrieb Mike Monett:
Gerhard Hoffmann <dk...@arcor.de> wrote:

Am 08.03.22 um 19:02 schrieb Mike Monett:

The AD9901 is a truly horrible phase detector. The concept starts with
a deep misunderstanding of the reason for deadband near the center of
the transfer curve.

No. The AD9901 is good. I had excellent results with it.


Deadband is not produced in the digital portion of the phase detector.
It is produced in the following analog section when the propagation
delay through one path is slower than the delay through the other
path.

What are you talking about?
There is no analog section in the AD9901.

I even have a compilable VHDL version of it that fits
into a tiny corner of a Xilinx Coolrunner II.


An example is shown in Jim Thompson\'s MC4044 phase/frequency detector.
The pullup path is a complicated discrete inverter, and the pulldown
path is a simple diode. The pullup path is much slower than the
pulldown path, and the detector produces no output for late samples
near the center of the transfer curve.

What has the Helgoland island to do with all of this?

This is shown in the LTspice file DEADBAND.ASC in the following link:

https://tinyurl.com/2p97vht8

The companion file, FASTDIOD.ASC shows the pullup path replaced by a
diode, the same as the pulldown path. The pullup and pulldown paths
are
both equal and very fast, and the phase detector output is now
continuous through zero.

You can duplicate this performance at low frequencies by using
ordinary
CMOS 74AC74 and 74AC00 chips. For higher frequencies, MECL ECLINPS
ic\'s
will work. There are also a number of commerial chips, but beware of
AD9901 clones. Stay away from any ones that feature XOR operation to
eliminate deadband. They have terrible ripple and drift.

I have the impression that you mix something with the CD4046 and its
ilk. That has the problem that the charge pumps deliver no
gain Kp when there is no phase error. That can be mostly healed
with a 1 Meg bleed resistor.

And even there, the 9046 has corrected that for good.

I would really like the 9046 if I could switch off its VCO.
I do not want an unneeded frequency on my board.

??? Do you understand LTspice?

Methinks yes, I do.

And generic Spice also from the inside. Back then(R) we had to
program all the interesting algorithms ourselves before we
were given the 2G6 sources. Later I ported V3 to
Interactive Unix on a 386.

Did you even notice that we were talking about AD9901 and
not about your MC4044?

My post is about the MC4044 and deadband. The AD9901 is an XOR phase
detector with horrible ripple and drift. It is also very slow. The MC9046
has the same deadband problem as the MC4044.

Jim Thompson\'s TTL MC4024 and MC4044 were put together in the CMOS 4046.

The NXP 74HC9046 does solve a specific deadband problem of the 4046. I don\'t think that Motorola ever produced a version of that circuit , and it\'s successor - ON Semiconductor - reacts to \"MC9046\" with a link to the MC74HC4046B.

--
Bill Sloman, Sydney

 

[server]

On Wed, 9 Mar 2022 13:27:14 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Wed, 9 Mar 2022 04:58:25 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

John Larkin wrote:
On Tue, 8 Mar 2022 16:23:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 11:39:43 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Tue, 8 Mar 2022 16:54:08 +0100, Jean-Pierre Coulon
coulon@cacas.pam.oca.eu> wrote:

I am using an Analog-devices AD9901 to lock the phase between two 1-MHz
signals.

The problem is that the state of the flip-flops is random at power on. Since
the phase between my 2 signals varies in a limited phase domain, sometimes my
output signal remains stuck at either limit of its range. Of course a 2*pi
phase variation would solve my problem. I cheat by disabling either input
signal for a brief moment.

Is there any way to force the statusses of both flip-flops on request?

Regards,

We use AD9901 and haven\'t seen that problem. Might you actually have a
pull-lock range problem?

It\'s expensive for a 1 MHz loop.




I gather it\'s locking two sources using a variable delay (or phase
shifter) rather than a VCO.

There are two nulls per cycle, one of which is unstable. With a PLL,
there\'s always a stable null to be found--if the initial phase is
pushing you away from an unstable one, the next one it finds will be
stable.

However, if you\'re using a phase shifter with a limited range, then if
you fetch up on the wrong side of the unstable null, the loop will rail
and stay railed.

Lo these many years ago (1985ish), I built a successive-approximation
phase digitizer. To avoid this exact problem, I tested the phase
detector output at the conversion pulse, set a flipflop, and used that
plus an XOR gate to make sure the SAR was shooting for the stable null.

Cheers

Phil Hobbs

Yeah, a delay loop would be different. In a frequency loop, the 9901
should drive towards lock if it possibly can.

A single d-flop would be a good delta-t detector for a time lock loop.
We\'ve done that to a few 10s of fs.



Yeah, I\'ve been meaning to try out one of those 10EP dflops that you like.



About the fastest non-Russian flop around is probably NB7V52. We
walked the clock and data edges across one another:

https://www.dropbox.com/s/1i2yz7otty94o9l/NB7_Jitter_1.jpg?raw=1

https://www.dropbox.com/s/qahpb8uh1xr53vj/NB7_Steps.jpg?raw=1

That jitter includes the circuits that generated the time sweeps.

D-flop bang-bang discriminators rock, but people seem to avoid them.

Like I said, I\'ve been meaning to try that out. Too cool to ignore.

Cheers

Phil Hobbs

The best time-sweep test generator could be a crazy fast edge and a
trombone-type micrometer driven mechanical delay line.

Or maybe stretching or heating a chunk of coax or pcb to make
picosecond delay sweeps. Any other ideas? Varicap delay line?

One approach would be to mechanically stretch a piece of RG-402 or
something like that. For temporary impedance matching jobs, I\'ve been
known to make shunt stubs by sticking thumbtacks into RG-58 patch cords.
They\'re surprisingly stable, and the coax survives fine--pull out the
tack and it\'s good as new.

A picosecond is only about 8 mils of coax, so one ought to be able to
get a reasonable elastic range by stretching a foot or so of hardline.



I wonder if the DC bias on a pcb trace affects prop delay. Worth
trying.

Probably a little. Temperature certainly does, or one could maybe use a
high enough rep rate that the clock and data are exactly half a cycle
out of phase--then the delay can be changed just by changing the rep
rate a little.

At 300 MHz, that would be several inches of path difference, not too bad
to fit on a board.

Cheers

Phil Hobbs

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

Quartz maybe.



--

I yam what I yam - Popeye

 

[Gerhard Hoffmann]

Am 10.03.22 um 04:01 schrieb jlarkin@highlandsniptechnology.com:

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

It changes big time with temperature, just above room temp.
I remember a swearing colleage with a clima chamber and reels
of teflon coax. One of the sorry moments when you think you
remember the numbers instead of writing them down.

The glass fibers in a board reduce the effect, maybe?


Gerhard

 

[Gerhard Hoffmann]

Am 09.03.22 um 22:51 schrieb Mike Monett:

My post is about the MC4044 and deadband. The AD9901 is an XOR phase
detector with horrible ripple and drift. It is also very slow. The MC9046
has the same deadband problem as the MC4044.

No. You claim false properties of the AD9901 based on a chip
that is not even remotely similar. 200 MHz is not slow against
anything that has *4046* or *9046* in the name.

200 MHz is also faster than the typical 8 MHz from the MC4044 data sheet.

There is no such chip as a MC9046.

EOD now for me.



@ Jean-Pierre:

You can take that as a starter for your own.
It is not really tested, just typed directly from the ds.
I got away with a 2FF comparator in the Coolrunner.

----------------------------------------------------------------------------------
-- Company: Hoffmann RF & DSP
-- This is much like an AD9901 phase / frequency discriminator
-- Revision 0.01 - File Created
-- Additional Comments: Free firmware under BSD license
----------------------------------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.numeric_std.ALL;


entity phase_frequency_discriminator is Port (
ref: in STD_LOGIC;
osc: in STD_LOGIC;
rst: in std_logic; -- this is needed for simulation only, may
be false in real use.
pfd_out: out STD_LOGIC
);
end phase_frequency_discriminator;


architecture beehivioral of phase_frequency_discriminator is

signal q_ul, q_ur, q_ll, q_lr: std_logic; -- flipflop outputs from
upper left to lower right
signal xnor_out: std_logic; -- see ad9901 data sheet
signal nand_out: std_logic;

begin

u_ref_left: process(ref) is
begin
if rising_edge(ref)
then
q_ul <= (not rst) and (not q_ul);
end if; -- rising_edge()
end process u_ref;


u_osc_left: process(osc) is
begin
if rising_edge(osc)
then
q_ll <= (not rst) and (not q_ll);
end if; -- rising_edge()
end process u_ref;


xor_out <= q_ul xor q_ll;

u_ref_right: process (ref, q_lr) is
begin
if q_lr = \'0\' then
q_ur <= \'0\'
else
if rising_edge(ref) then
q_ur <= (not rst) and xnor_out;
end; -- rising_edge()
end if;
end process u_ref_right;


u_osc_right: process (osc, q_tr) is
begin
if q_tr = \'1\' then
q_ur <= \'1\'
else
if rising_edge(osc) then
q_ur <= (not rst) and xnor_out;
end; -- rising_edge()
end if;
end process u_ref_right;

nand_out <= not (q_lr and xnor_out);
pfd_out <= not (nand_out and not q_ur);

end beehivioral;


>>>> Gerhard

 

[Phil Hobbs]

Gerhard Hoffmann wrote:

Am 10.03.22 um 04:01 schrieb jlarkin@highlandsniptechnology.com:

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

It changes big time with temperature, just above room temp.
I remember a swearing colleage with a clima chamber and reels
of teflon coax. One of the sorry moments when you think you
remember the numbers instead of writing them down.

The glass fibers in a board reduce the effect, maybe?


Gerhard

The glass transition in Teflon mainly shows up in the mechanical
properties--the CTE goes up to over 2000 ppm/K. The effect on
transmission lines is much less, but still important.

If it were my measurement, I\'d certainly use the unbalanced path length
trick--that puts everything into time and frequency, provided that the
measurement is sufficiently fast compared with the thermal timescales.

1/2 cycle at 300 MHz is 1.7 ns, so 1 ps is 600 ppm of that delay. Takes
quite a temperature shift to make a dent in that.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[server]

On Thu, 10 Mar 2022 09:17:56 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

Gerhard Hoffmann wrote:
Am 10.03.22 um 04:01 schrieb jlarkin@highlandsniptechnology.com:

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

It changes big time with temperature, just above room temp.
I remember a swearing colleage with a clima chamber and reels
of teflon coax. One of the sorry moments when you think you
remember the numbers instead of writing them down.

The glass fibers in a board reduce the effect, maybe?


Gerhard

The glass transition in Teflon mainly shows up in the mechanical
properties--the CTE goes up to over 2000 ppm/K. The effect on
transmission lines is much less, but still important.

If it were my measurement, I\'d certainly use the unbalanced path length
trick--that puts everything into time and frequency, provided that the
measurement is sufficiently fast compared with the thermal timescales.

1/2 cycle at 300 MHz is 1.7 ns, so 1 ps is 600 ppm of that delay. Takes
quite a temperature shift to make a dent in that.

Cheers

Phil Hobbs

Here\'s our flipflop tester:

https://www.dropbox.com/s/398g74u4xmutf3j/99S394A.pdf?dl=0




--

I yam what I yam - Popeye

 

[Joe Gwinn]

On Thu, 10 Mar 2022 09:17:56 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

Gerhard Hoffmann wrote:
Am 10.03.22 um 04:01 schrieb jlarkin@highlandsniptechnology.com:

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

It changes big time with temperature, just above room temp.
I remember a swearing colleage with a clima chamber and reels
of teflon coax. One of the sorry moments when you think you
remember the numbers instead of writing them down.

The glass fibers in a board reduce the effect, maybe?


Gerhard

The glass transition in Teflon mainly shows up in the mechanical
properties--the CTE goes up to over 2000 ppm/K. The effect on
transmission lines is much less, but still important.

In phased-array radar applications, the \"Teflon knee\" can be very
important, to the point that ordinary Teflon cables cannot be used.
The phase change per degree Kelvin (=centigrade) becomes very large
around 20 C, where there is a phase change between crystal types. I
thing that glass transition is a different beast.

Joe Gwinn

If it were my measurement, I\'d certainly use the unbalanced path length
trick--that puts everything into time and frequency, provided that the
measurement is sufficiently fast compared with the thermal timescales.

1/2 cycle at 300 MHz is 1.7 ns, so 1 ps is 600 ppm of that delay. Takes
quite a temperature shift to make a dent in that.

Cheers

Phil Hobbs

 

[Mike Monett]

Gerhard Hoffmann <dk4xp@arcor.de> wrote:

Am 09.03.22 um 22:51 schrieb Mike Monett:


My post is about the MC4044 and deadband. The AD9901 is an XOR phase
detector with horrible ripple and drift. It is also very slow. The
MC9046 has the same deadband problem as the MC4044.

No. You claim false properties of the AD9901 based on a chip
that is not even remotely similar. 200 MHz is not slow against
anything that has *4046* or *9046* in the name.

200 MHz is also faster than the typical 8 MHz from the MC4044 data
sheet.

There is no such chip as a MC9046.

EOD now for me.

The AD9901 is an XOR phase detector. It has horrible ripple and drift. See
Fig 10. AD9901 Output Waveform. Page 7,

https://datasheet.octopart.com/AD9901KPZ-Analog-Devices-datasheet-19020.pdf

MC9046 was a typo. I meant MC4046. You made the same mistake, which I
copied. Quote:

\"And even there, the 9046 has corrected that for good.\"

\"I would really like the 9046 if I could switch off its VCO.
I do not want an unneeded frequency on my board.\"

The MC4046 has the same deadband problem as the MC4044. The pullup and
pulldown prop delays are not the same.

The standard Dual-D phase/frequency detector has no output ripple when the
phase error is zero. This minimizes sideband spurs in synthesizers. I used
the MC4044 as an example of how it can get deadband. This is corrected in
modern chips.

Your comment that the dual-D phase/frequency detector has no gain at zero
phase error shows a stunning lack of comprehension of how phase detectors
work. Quote:

\"I have the impression that you mix something with the CD4046 and its
ilk. That has the problem that the charge pumps deliver no
gain Kp when there is no phase error. That can be mostly healed
with a 1 Meg bleed resistor.\"

The phase detector gain (Kp) is measured in Volts per Radian, not at zero
phase error.

See Eq(36), Page 23, Texas Instruments, Theory of an Analog Phase-Locked
Loop (PLL),

https://www.ti.com/lit/pdf/slaa011b

Kp = (VOH - VOL) / 4pi [V/Rad]

Where:
VOH = maximum output voltage
VOL = minimum output voltage

For other types of phase detectors, the phase detector gain can be
determined in the same fashion.

Also see Eqn. 48 Page 13, Phase-Locked Loop Design Fundamentals
by Garth Nash:

https://www.nxp.com/files-static/rf_if/doc/app_note/AN535.pdf

Adding a bleed resistor to the output of the pfd has no effect on the gain.
It merely moves the phase offset off zero.



--
MRM

 

[Phil Hobbs]

jlarkin@highlandsniptechnology.com wrote:

On Thu, 10 Mar 2022 09:17:56 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

Gerhard Hoffmann wrote:
Am 10.03.22 um 04:01 schrieb jlarkin@highlandsniptechnology.com:

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

It changes big time with temperature, just above room temp.
I remember a swearing colleage with a clima chamber and reels
of teflon coax. One of the sorry moments when you think you
remember the numbers instead of writing them down.

The glass fibers in a board reduce the effect, maybe?


Gerhard

The glass transition in Teflon mainly shows up in the mechanical
properties--the CTE goes up to over 2000 ppm/K. The effect on
transmission lines is much less, but still important.

If it were my measurement, I\'d certainly use the unbalanced path length
trick--that puts everything into time and frequency, provided that the
measurement is sufficiently fast compared with the thermal timescales.

1/2 cycle at 300 MHz is 1.7 ns, so 1 ps is 600 ppm of that delay. Takes
quite a temperature shift to make a dent in that.

Cheers

Phil Hobbs

Here\'s our flipflop tester:

https://www.dropbox.com/s/398g74u4xmutf3j/99S394A.pdf?dl=0




Nowhere near physicsy enough.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

Joe Gwinn wrote:

On Thu, 10 Mar 2022 09:17:56 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

Gerhard Hoffmann wrote:
Am 10.03.22 um 04:01 schrieb jlarkin@highlandsniptechnology.com:

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

It changes big time with temperature, just above room temp.
I remember a swearing colleage with a clima chamber and reels
of teflon coax. One of the sorry moments when you think you
remember the numbers instead of writing them down.

The glass fibers in a board reduce the effect, maybe?


Gerhard

The glass transition in Teflon mainly shows up in the mechanical
properties--the CTE goes up to over 2000 ppm/K. The effect on
transmission lines is much less, but still important.

In phased-array radar applications, the \"Teflon knee\" can be very
important, to the point that ordinary Teflon cables cannot be used.
The phase change per degree Kelvin (=centigrade) becomes very large
around 20 C, where there is a phase change between crystal types. I
thing that glass transition is a different beast.

I\'m pretty sure the 20 C thing is the glass transition. Interestingly,
teflon capacitors show virtually no effect whatsoever--the change in
epsilon cancels out the dimensional change. Propagation delay in cables
has a different functional dependence, so it doesn\'t cancel completely.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Joe Gwinn]

On Thu, 10 Mar 2022 13:06:03 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

Joe Gwinn wrote:
On Thu, 10 Mar 2022 09:17:56 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

Gerhard Hoffmann wrote:
Am 10.03.22 um 04:01 schrieb jlarkin@highlandsniptechnology.com:

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

It changes big time with temperature, just above room temp.
I remember a swearing colleage with a clima chamber and reels
of teflon coax. One of the sorry moments when you think you
remember the numbers instead of writing them down.

The glass fibers in a board reduce the effect, maybe?


Gerhard

The glass transition in Teflon mainly shows up in the mechanical
properties--the CTE goes up to over 2000 ppm/K. The effect on
transmission lines is much less, but still important.

In phased-array radar applications, the \"Teflon knee\" can be very
important, to the point that ordinary Teflon cables cannot be used.
The phase change per degree Kelvin (=centigrade) becomes very large
around 20 C, where there is a phase change between crystal types. I
thing that glass transition is a different beast.


I\'m pretty sure the 20 C thing is the glass transition. Interestingly,
teflon capacitors show virtually no effect whatsoever--the change in
epsilon cancels out the dimensional change. Propagation delay in cables
has a different functional dependence, so it doesn\'t cancel completely.

It\'s the transition between two crystalline phases, versus crystalline
to amorphous.

I gather that the glass transition temperature of Teflon (PTFE) is
126 C or so. It\'s the transition between two beta crystalline phases
that occur around 20 C. I have an article on this somewhere.


There is an Amorphous Teflon that has no Teflon knee:

..<https://www.teflon.com/en/products/resins/amorphous-fluoropolymer>

This has a minimum glass transition temp of 160 C.


Joe Gwinn

 

[server]

On Thu, 10 Mar 2022 12:55:25 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Thu, 10 Mar 2022 09:17:56 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

Gerhard Hoffmann wrote:
Am 10.03.22 um 04:01 schrieb jlarkin@highlandsniptechnology.com:

I\'d expect that most materials have a dielectric constant that varies
with DC bias. Lithium niobate refractive index varies with bias, which
is how Mach-Zender things work.

It wouldn\'t surprise me if teflon Er changes with bias. That would be
easy to check.

It changes big time with temperature, just above room temp.
I remember a swearing colleage with a clima chamber and reels
of teflon coax. One of the sorry moments when you think you
remember the numbers instead of writing them down.

The glass fibers in a board reduce the effect, maybe?


Gerhard

The glass transition in Teflon mainly shows up in the mechanical
properties--the CTE goes up to over 2000 ppm/K. The effect on
transmission lines is much less, but still important.

If it were my measurement, I\'d certainly use the unbalanced path length
trick--that puts everything into time and frequency, provided that the
measurement is sufficiently fast compared with the thermal timescales.

1/2 cycle at 300 MHz is 1.7 ns, so 1 ps is 600 ppm of that delay. Takes
quite a temperature shift to make a dent in that.

Cheers

Phil Hobbs

Here\'s our flipflop tester:

https://www.dropbox.com/s/398g74u4xmutf3j/99S394A.pdf?dl=0




Nowhere near physicsy enough.

Cheers

Phil Hobbs

True. A real physicsy tunable delay line would eliminate the jitter of
the two comparators, and really resolve the jitter of the flop.

I used to be impressed by nanoseconds. Then picoseconds. We\'re working
in femtoseconds now.



--

I yam what I yam - Popeye