Bizzare behaviour from SG/UC3525

[Pooh Bear]

Tony Williams wrote:

In article <42BBD0FB.71763B3D@hotmail.com>,
Pooh Bear <rabbitsfriendsandrelations@hotmail.com> wrote:

Tony Williams wrote:
An open-collector comparator into pin 9 (COMP input)
is SG's first choice for pulse_by_pulse limiting.

That could be potentially useful actually ! It's simply a
no-connect on my pcb at present.
And where did you get that nugget of info about the pulse
limiting ? That's very, very interesting.

Off a 1989 Silicon General data sheet, 6th page,
labelled Shutdown Options. Just above the test
fixture circuit.... which also leaves pin 10 open
when running.

Cor blimey !

Can you still get a *genuine* SG data sheet for this part ?

Just to be sure. Pull COMP to 0v to do a shutdown
via the PWM stage and R-S flipflop.

What value is it, and could you please measure
at some time what voltage it finally rises to?

It's 47uF currently since I deliberately wanted a very slow soft
start to look at it closely. It would be 4.7 or 10 uF in practice
most likely.

Resistor needed in series with the pulldown Tr then.

Yup.

And yes - I'll measure the volts there.

Thanks. Best guess atm would be up near the 5v1 Vref.

BTW: It's only a 60uA pulldown current. If I assume
47uF, and a required pulldown from 4V to 0.5V,
then that would mean that the Shutdown pin has to
be held high for 2.7 seconds before a full (safe)
soft re-start can happen.

That accords with my results.

Graham

 

[Pooh Bear]

Terry Given wrote:

Pooh Bear wrote:
Hi,

you may have noted my posts about problems recently with my attempts to
make a high power smps.

I'll give a quick overview.

The application is a high power pro-audio amplifier.

Traditional psus use nice toroids that we know well. You can optimise
them for low copper losses that helps keeps weight down.

We want to make our amps lighter though. Like some competitors that are
also using SMPSs.

Various mfrs have used switch-mode techonology. The fixed duty cycle
approach appears to be universal. I expect this is since a classic
forward converter doesn't have the bandwidth to respond to audio
transients. Not to mention cross-regulation to other rails issues.

Unlike most 'forward converters' - see argument about this terminology
another day - PLS ! they run at a fixed duty cycle. I.e. max. Kinda 90%.

Ok - so that's the rough overview.

So - I have this pcb with my design that's 'plain vanilla' - no frills.
The 'control circuitry' i.e. SG 3525 and some other shit is located on a
plug-in pcb via a right-angle pcb header.

I work-up the prototype - the waveforms look right etc etc....

Then I get trouble as I've mentioned here before. The UVLO I can deal
with. If the parts can't 'agree' when to stop working I'll tell them
myself !

So - that one's fixed. Ok - finito. ( or so you might think )

Next problem - apparent 'jitter' on the trailing edge wavefom at the
load ( high side ) with high input volts on the highside drive. I
investigate this. I add a zener clamp on the highside IGBT for example
in case of gate resonance. No good. I modify the signal path to reduce
inductance. No good.

I then find by accident that if I try to 'provoke' the highside jitter
it's affected by my hand capacitance on the switch that I have included
to 'stop switching' to the shutdown pin on the 3525. Uh ?

I check the supervisory supply. I discover that if the supervisory
supply ( provides drive to the 3525 ) is higher than before - changed
transforner ratio - then the jitter occurs earlier ( I'm ramping the
input volts on a variac ).

I'm getting desperate.

So - I look at the 3525 output. OutA and OutB. I checked them earlier
and they look nice and clean.

I have a high resistance nominal load on the half-bridge output that
takes mere milliamps.

I see the switching waveforms. They look sensible at the load. Apart
from this funny 'jitter' on the high side that only occurs at high DC
bus volts when driving my TX ( no sec load ).

I feel I'm going mad.

Finally I get the sense to check the inputs to my IR2110 high side
driver ( from the 3525 ). Recall I checked these before populating the
pcb.

I see mismatched timing periods !

I have OUTA used as the high side drive signal . It looked fine before
but it's only 500ns long I discover ! OUTB is 4.5us long ( as it should
be ) !

I remove the IR2110 gate driver. The waveforms are perfect. Excellent
match between OutA and OutB.

I replace the IR2110. Mismatch occurs again. I've'blown' enough IR2110s
to not think they're the problem. How can the logic input loading of the
IR2110 affect a totem-pole output from the 3525 ?

So - is the 3525 at fault ? I'm careful only to change one item at a
time normally. I reckon maybe I should replace the TI 3525 with an STM
part ( actually that's 2 items at a time technically - but I didn't
expect my other TI sample to be any different ).

I do so. Goddamit if the same bonkers behaviour isn't replicated by
another part from a different vendor !

I check that my pcb man has allocated every pin correctly ( he has ) . I
read the data sheets looking for some mention of erroneous behavour. I
find nothing.

I noted in passing that the 3525 seemed to be sensitive to noise on the
shutdown pin. Odd, since the IC block diagram shows that to be a 'slow'
input. It has to discharge the soft-start cap. Soft-start is working
fine. But my grounds should be clean - I've got a Kelvin connection to
the low-side IGBT emitter mere cm away.

Right now I feel like I'm going slightly mad. Maybe the pcb guy did
something wacky I've totally missed - but he's rarely that useless.

Does unequal duty cycle on OutA and OutB ring any bells with 3525 users
? It's baffling me !

Graham

Gidday Graham,

Good day to you too Terry.

try this: lift OUTA and OUTB pins. "swap" them with little dangly wires.

Ummm... guess what I was thinking of doing next ! It's called desperation !

If the OUTA pin suddenly starts working and OUTB goes funny, then its
something to do with the external connection(s) to OUTA

Yuh . That figures. But a 1~2 cm track - with careful attention to routeing ?

then pull the same trick with the IR2110 inputs.

OK.

some gatedrive outputs get pissy when output inductance pulls them below
0V (or above Vcc). a SOT23 dual schottky on each output can eliminate
that potential problem.

Interesting.

I omitted to mention - for sake of simplicity- that I briefly decoupled the
3525 shutdown pin with a 10 nF cap to local gnd to avoid any noise pickup.
Frankly it shouldn't be a sensitive node but I'm really puzzled now.

That 'helped' the odd 'jitter' on the hi-side drive. I thought I was on the
home run - I selected the switch position that stops the 3525 outputs and
removed power. A couple of second later the IR2110 went *bang* - well fizzz to
be more accurate - ( no IGBTs danaged though ).

What's weird is that it was the low side driver that went short ! About 2 ohms
from Vs to Lout after it went bust !

try loading them capacitively (perhaps 10-20pF) sans IR2110, see if the
waveforms are still OK.

waveforms are fine sans IR2110.

I'm driven bonkers how the pulse width on OutA and OutB is different whern
it's in circuit ( one presumes there's a clue here but I haven't yet been able
to make any sense of it ). One might assume a load current issue but I have
only 33k from DCbus/2 to the switching point !

set the DC bus to 0V, provide a separate high-side power supply and see
what happens - with no actual output switching, does the problem occur.

I admit - I'm tempted to provide a specific Vboot supply anyway - using a 555
for example.

But this ain't the issue

place a series resistor between the 3525 & 2110, perhaps 1k.

I'll try that !


Cheers, Graham

 

[Frithiof Andreas Jensen]

"Pooh Bear" <rabbitsfriendsandrelations@hotmail.com> wrote in message
news:42BBD20D.D4D8BA2A@hotmail.com...

How much ( value, type ) would you typically use ? 0.1uF box film
polyester type
here. An MLC type presents no probs to me but modern film types are pretty
hot.

I seem to remember that I had *three* different values on there, probably:
100 nF, 10 nF and 500 pF and a funny layout too, there was an application
note on the proper placing of the capacitors so they were put in first, then
all the rest had to fit wherever it could.

I think there were shottky's on the outputs too so that they could not pull
the substrate negative.

That sounds suspiciously likely !

Those fast drivers are always a pain in the bum!