Attainable PWM accuracy?

[George Herold]

On Sunday, October 13, 2019 at 3:14:58 AM UTC-4, Phil Hobbs wrote:

On 2019-10-12 13:04, George Herold wrote:
On Saturday, October 12, 2019 at 12:40:35 PM UTC-4, George Herold wrote:
On Friday, October 11, 2019 at 5:17:16 PM UTC-4, Tim Williams wrote:
Do you need so many bits if you just add the 50V offset and DAC the
remaining 5ish volts? Well, not too many less, about 3, but still. That's
closer to 12 than 16, or maybe even 8 than 12. Use a 2.5 or 5V PWM ref and
add the offset with op-amps.

Yeah I was thinking about something like that.
or a digipot from 55 to 50 volts. (I've never used a digipot and
have no idea if you can float 'em. Probably more trouble than it's
worth.)
Put the digipot on the bottom?
GH

As a silly idea, run two MPPC's, one with a constant light input and
servo the voltage for the desired gain. (or switch one between
'standard' light source and signal.)

That sort of thing is sometimes done with ordinary APDs, but in this
instance we're down in the guts of a SEM chamber with lots of other
things going on. We have to worry about running into other detectors,
and of course all SEMs of my acquaintance have video cameras inside,
which require light sources....

Digital pots are generally pretty crappy--unless you go for the
expensive ones that use metal resistors, the end-to-end resistance
tolerance is typically 30%, with a poor tempco. Thus you have to use
them ratiometrically and can't easily put a resistor in series to reduce
the adjustment range.

Floating them at some weird voltage is perfectly possible but requires a
fair number of additional parts. (One of our products has a
set-and-forget laser current limit using a nonvolatile dpot that gets
programmed at test time using a laptop--the dpot hangs off a +14V rail,
but the laptop is floating, so neither it nor the dpot notices. If we
were in mass production, it would need something like a Bus Pirate and a
USB isolator.)

Thanks for the response Phil. Mostly I don't know how to make your ideas
better, so my brain goes to 'how 'bout some other way'.
George H.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

On 2019-10-13 10:03, Lasse Langwadt Christensen wrote:

søndag den 13. oktober 2019 kl. 11.14.27 UTC+2 skrev Phil Hobbs:
On 2019-10-13 04:09, Andy Bennet wrote:
On 13/10/2019 08:19, Phil Hobbs wrote:
On 2019-10-13 01:06, Robert Baer wrote:
Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm
doing a bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one
goes from ~0 to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)



Sooo, there's a bit of pressure to keep the bias very stable,
but it doesn't have to change very often. Accordingly, I'm
tentatively planning to use a 12 to 16-bit PWM with good
filtering. It'll obviously have to be buffered with a
tinylogic gate running from a stiff reference supply, to
prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an
output frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB
of filtering to get the output ripple on the MPPC supply down
to a millivolt or so, so that's 3 RC sections with 33 dB
attenuation each, i.e. corner frequencies of 2.5 Hz to 40 Hz
(TCs of 4 to 60 ms). Not horrible--100k*0.68uF at 16 bits, 40k
and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't
thought of that might limit the accuracy? How good can you
make a PWM, anyway?

Thanks

Phil Hobbs

Use switched filtering?

One approach to the PWM ripple problem is to use a S/H to sample
the filter output at the beginning of the PWM cycle. The subtle
problem is that even if the higher harmonics of the PWM frequency
have died away adequately, the phase of the fundamental ripple
component depends on the PWM code, which hurts the linearity.

Cheers

Phil Hobbs


Um then have a PWM gated constant current source feeding a capacitor,
followed by a s/h.


Yeah, there are lots of ways to do it if you don't mind a bunch of extra
parts.

What I wound up with is a vanilla 12-bit PWM driving a SN74LVC1G04
inverter that's powered by a REF5030 3-ppm/K reference, followed by a
three-stage RC filter.

It's sort of funny, putting in a $5 reference just to drive a five-cent
logic inverter, but that's where error budgets take you sometimes.

isn't something like this http://www.ti.com/product/DAC80501
close to doing it all in one ic?

Thanks, that's a nice part, and about the same price. It needs a bunch
of extra pins though, and they're a very scarce resource ATM.

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Lasse Langwadt Christense]

tirsdag den 15. oktober 2019 kl. 08.04.11 UTC+2 skrev Phil Hobbs:

On 2019-10-13 10:03, Lasse Langwadt Christensen wrote:
søndag den 13. oktober 2019 kl. 11.14.27 UTC+2 skrev Phil Hobbs:
On 2019-10-13 04:09, Andy Bennet wrote:
On 13/10/2019 08:19, Phil Hobbs wrote:
On 2019-10-13 01:06, Robert Baer wrote:
Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm
doing a bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one
goes from ~0 to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)



Sooo, there's a bit of pressure to keep the bias very stable,
but it doesn't have to change very often. Accordingly, I'm
tentatively planning to use a 12 to 16-bit PWM with good
filtering. It'll obviously have to be buffered with a
tinylogic gate running from a stiff reference supply, to
prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an
output frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB
of filtering to get the output ripple on the MPPC supply down
to a millivolt or so, so that's 3 RC sections with 33 dB
attenuation each, i.e. corner frequencies of 2.5 Hz to 40 Hz
(TCs of 4 to 60 ms). Not horrible--100k*0.68uF at 16 bits, 40k
and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't
thought of that might limit the accuracy? How good can you
make a PWM, anyway?

Thanks

Phil Hobbs

Use switched filtering?

One approach to the PWM ripple problem is to use a S/H to sample
the filter output at the beginning of the PWM cycle. The subtle
problem is that even if the higher harmonics of the PWM frequency
have died away adequately, the phase of the fundamental ripple
component depends on the PWM code, which hurts the linearity.

Cheers

Phil Hobbs


Um then have a PWM gated constant current source feeding a capacitor,
followed by a s/h.


Yeah, there are lots of ways to do it if you don't mind a bunch of extra
parts.

What I wound up with is a vanilla 12-bit PWM driving a SN74LVC1G04
inverter that's powered by a REF5030 3-ppm/K reference, followed by a
three-stage RC filter.

It's sort of funny, putting in a $5 reference just to drive a five-cent
logic inverter, but that's where error budgets take you sometimes.

isn't something like this http://www.ti.com/product/DAC80501
close to doing it all in one ic?

Thanks, that's a nice part, and about the same price. It needs a bunch
of extra pins though, and they're a very scarce resource ATM.

it does I2C that is only 2 pins

 

[John Larkin]

On Tue, 15 Oct 2019 10:16:23 -0700 (PDT), keith wright
<keith@kjwdesigns.com> wrote:

On Friday, 11 October 2019 12:00:57 UTC-7, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.


--
Thanks,
- Win

Win,

Neat idea but it doesn't seem to work effectively for other than 50% duty cycle. In my simulation it is worse than a simple filter for duty cycles such as 10%.

kw

Would it do any good to sum two PWMs that are out of phase? One more
uP pin, one more resistor.

Sort of like this:

https://www.dropbox.com/s/nnzg7ei2pm4darz/DoubleTach.jpg?raw=1

 

[keith wright]

On Friday, 11 October 2019 12:00:57 UTC-7, Winfield Hill wrote:

Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.


--
Thanks,
- Win

Win,

Neat idea but it doesn't seem to work effectively for other than 50% duty cycle. In my simulation it is worse than a simple filter for duty cycles such as 10%.

kw

 

On Tuesday, October 15, 2019 at 1:34:21 PM UTC-4, John Larkin wrote:

On Tue, 15 Oct 2019 10:16:23 -0700 (PDT), keith wright
keith@kjwdesigns.com> wrote:

On Friday, 11 October 2019 12:00:57 UTC-7, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.


--
Thanks,
- Win

Win,

Neat idea but it doesn't seem to work effectively for other than 50% duty cycle. In my simulation it is worse than a simple filter for duty cycles such as 10%.

kw

Would it do any good to sum two PWMs that are out of phase? One more
uP pin, one more resistor.

Sort of like this:

https://www.dropbox.com/s/nnzg7ei2pm4darz/DoubleTach.jpg?raw=1

I dunno what Keith did but Woodward's trick works great for
me. I've meant to post it for years. He sums an equal but
out-of-phase error current into the filtering node. That reduces
the ripple current ~a couple orders of magnitude *before* it gets
to the filter cap.

See piglet's post for the whole enchilada.

After filtering, switch resistance is the next DNL limitation.
A high-precision application will need a switch resistance
cancellation scheme.

The last frontier is delta Tpd in the switches.

Cheers,
James

 

[Lasse Langwadt Christense]

tirsdag den 15. oktober 2019 kl. 19.34.21 UTC+2 skrev John Larkin:

On Tue, 15 Oct 2019 10:16:23 -0700 (PDT), keith wright
keith@kjwdesigns.com> wrote:

On Friday, 11 October 2019 12:00:57 UTC-7, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.


--
Thanks,
- Win

Win,

Neat idea but it doesn't seem to work effectively for other than 50% duty cycle. In my simulation it is worse than a simple filter for duty cycles such as 10%.

kw

Would it do any good to sum two PWMs that are out of phase? One more
uP pin, one more resistor.

Sort of like this:

https://www.dropbox.com/s/nnzg7ei2pm4darz/DoubleTach.jpg?raw=1

https://adn.harmanpro.com/site_elements/resources/854_1425410424/Original_%281996%29_White_Pater_on_Class-I_by_Gerald_Stanley_original.pdf

 

[Phil Hobbs]

On 2019-10-15 07:18, Lasse Langwadt Christensen wrote:

tirsdag den 15. oktober 2019 kl. 08.04.11 UTC+2 skrev Phil Hobbs:
On 2019-10-13 10:03, Lasse Langwadt Christensen wrote:
søndag den 13. oktober 2019 kl. 11.14.27 UTC+2 skrev Phil Hobbs:
On 2019-10-13 04:09, Andy Bennet wrote:
On 13/10/2019 08:19, Phil Hobbs wrote:
On 2019-10-13 01:06, Robert Baer wrote:
Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm
doing a bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one
goes from ~0 to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)



Sooo, there's a bit of pressure to keep the bias very stable,
but it doesn't have to change very often. Accordingly, I'm
tentatively planning to use a 12 to 16-bit PWM with good
filtering. It'll obviously have to be buffered with a
tinylogic gate running from a stiff reference supply, to
prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an
output frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB
of filtering to get the output ripple on the MPPC supply down
to a millivolt or so, so that's 3 RC sections with 33 dB
attenuation each, i.e. corner frequencies of 2.5 Hz to 40 Hz
(TCs of 4 to 60 ms). Not horrible--100k*0.68uF at 16 bits, 40k
and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't
thought of that might limit the accuracy? How good can you
make a PWM, anyway?

Thanks

Phil Hobbs

Use switched filtering?

One approach to the PWM ripple problem is to use a S/H to sample
the filter output at the beginning of the PWM cycle. The subtle
problem is that even if the higher harmonics of the PWM frequency
have died away adequately, the phase of the fundamental ripple
component depends on the PWM code, which hurts the linearity.

Cheers

Phil Hobbs


Um then have a PWM gated constant current source feeding a capacitor,
followed by a s/h.


Yeah, there are lots of ways to do it if you don't mind a bunch of extra
parts.

What I wound up with is a vanilla 12-bit PWM driving a SN74LVC1G04
inverter that's powered by a REF5030 3-ppm/K reference, followed by a
three-stage RC filter.

It's sort of funny, putting in a $5 reference just to drive a five-cent
logic inverter, but that's where error budgets take you sometimes.

isn't something like this http://www.ti.com/product/DAC80501
close to doing it all in one ic?

Thanks, that's a nice part, and about the same price. It needs a bunch
of extra pins though, and they're a very scarce resource ATM.

it does I2C that is only 2 pins

Turned out we needed two DACs, so I bailed on the PWM+reference and
picked a dual 12-bit LTC2633, which was cheaper than just the REF5030.
We're using an I2C EEPROM anyway, so it didn't cost any pins, as you
say--it's just that I2C has nasty lockup states, so we were a bit
reluctant to put any more stuff there.

I used the previous PWM pin to run a PNP to allow turning off the I2C
power just in case, so both the hardware and software humans are happy.

AIUI SMBus is basically I2C with the lockup states fixed--I wonder why
it's apparently still uncommon except in ambient light sensors.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Lasse Langwadt Christense]

onsdag den 16. oktober 2019 kl. 02.07.28 UTC+2 skrev Phil Hobbs:

On 2019-10-15 07:18, Lasse Langwadt Christensen wrote:
tirsdag den 15. oktober 2019 kl. 08.04.11 UTC+2 skrev Phil Hobbs:
On 2019-10-13 10:03, Lasse Langwadt Christensen wrote:
søndag den 13. oktober 2019 kl. 11.14.27 UTC+2 skrev Phil Hobbs:
On 2019-10-13 04:09, Andy Bennet wrote:
On 13/10/2019 08:19, Phil Hobbs wrote:
On 2019-10-13 01:06, Robert Baer wrote:
Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm
doing a bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one
goes from ~0 to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)



Sooo, there's a bit of pressure to keep the bias very stable,
but it doesn't have to change very often. Accordingly, I'm
tentatively planning to use a 12 to 16-bit PWM with good
filtering. It'll obviously have to be buffered with a
tinylogic gate running from a stiff reference supply, to
prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an
output frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB
of filtering to get the output ripple on the MPPC supply down
to a millivolt or so, so that's 3 RC sections with 33 dB
attenuation each, i.e. corner frequencies of 2.5 Hz to 40 Hz
(TCs of 4 to 60 ms). Not horrible--100k*0.68uF at 16 bits, 40k
and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't
thought of that might limit the accuracy? How good can you
make a PWM, anyway?

Thanks

Phil Hobbs

Use switched filtering?

One approach to the PWM ripple problem is to use a S/H to sample
the filter output at the beginning of the PWM cycle. The subtle
problem is that even if the higher harmonics of the PWM frequency
have died away adequately, the phase of the fundamental ripple
component depends on the PWM code, which hurts the linearity.

Cheers

Phil Hobbs


Um then have a PWM gated constant current source feeding a capacitor,
followed by a s/h.


Yeah, there are lots of ways to do it if you don't mind a bunch of extra
parts.

What I wound up with is a vanilla 12-bit PWM driving a SN74LVC1G04
inverter that's powered by a REF5030 3-ppm/K reference, followed by a
three-stage RC filter.

It's sort of funny, putting in a $5 reference just to drive a five-cent
logic inverter, but that's where error budgets take you sometimes.

isn't something like this http://www.ti.com/product/DAC80501
close to doing it all in one ic?

Thanks, that's a nice part, and about the same price. It needs a bunch
of extra pins though, and they're a very scarce resource ATM.

it does I2C that is only 2 pins

Turned out we needed two DACs, so I bailed on the PWM+reference and
picked a dual 12-bit LTC2633, which was cheaper than just the REF5030.
We're using an I2C EEPROM anyway, so it didn't cost any pins, as you
say--it's just that I2C has nasty lockup states, so we were a bit
reluctant to put any more stuff there.

I used the previous PWM pin to run a PNP to allow turning off the I2C
power just in case, so both the hardware and software humans are happy.

AIUI SMBus is basically I2C with the lockup states fixed--I wonder why
it's apparently still uncommon except in ambient light sensors.

I think most things on pc motherboards are SMBus

I guess the 35ms timeout on SMBus could be an issue for bit banging and
SMBus is max 100kHz

 

[George Herold]

On Saturday, October 12, 2019 at 7:17:44 AM UTC-4, piglet wrote:

On 11/10/2019 20:00, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.



Here's an earlier incarnation of Woodward's idea:

https://www.dropbox.com/s/997fixfek6afwga/woodward_dac_precision_ifd.pdf?raw=1

piglet

piglet, that's an elegant scheme. I'm sitting here struggling to see
exactly what R1 is doing. I guess I'll have to write down some equations
with the output impedance of the inverters driving the V1 node included.
(thanks for sharing.)

George H.

 

[piglet]

On 16/10/2019 4:27 am, George Herold wrote:

On Saturday, October 12, 2019 at 7:17:44 AM UTC-4, piglet wrote:
On 11/10/2019 20:00, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.



Here's an earlier incarnation of Woodward's idea:

https://www.dropbox.com/s/997fixfek6afwga/woodward_dac_precision_ifd.pdf?raw=1

piglet

piglet, that's an elegant scheme. I'm sitting here struggling to see
exactly what R1 is doing. I guess I'll have to write down some equations
with the output impedance of the inverters driving the V1 node included.
(thanks for sharing.)

George H.

Hi George, yes R1 compensates for the non-zero output impedance of the
HC04 (three paralleled) switches. Working back from woodward's
description it seems he takes the HC04 Ron per output to be about
40ohms. I guess more modern devices have lower Ron but having R1=R6
elegantly cancels the error.

piglet

 

On Wednesday, October 16, 2019 at 6:07:38 AM UTC-4, piglet wrote:

On 16/10/2019 4:27 am, George Herold wrote:
On Saturday, October 12, 2019 at 7:17:44 AM UTC-4, piglet wrote:
On 11/10/2019 20:00, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.



Here's an earlier incarnation of Woodward's idea:

https://www.dropbox.com/s/997fixfek6afwga/woodward_dac_precision_ifd.pdf?raw=1

piglet

piglet, that's an elegant scheme. I'm sitting here struggling to see
exactly what R1 is doing. I guess I'll have to write down some equations
with the output impedance of the inverters driving the V1 node included.
(thanks for sharing.)

George H.


Hi George, yes R1 compensates for the non-zero output impedance of the
HC04 (three paralleled) switches. Working back from woodward's
description it seems he takes the HC04 Ron per output to be about
40ohms. I guess more modern devices have lower Ron but having R1=R6
elegantly cancels the error.

piglet

Woodward seems to hint, but doesn't outright claim, that R1 cancels
switch resistance error from the low-dac's 1M load. But I've never
been able to prove to myself that it compensates that, or corrects
the high-dac's switch-resistance error.

(ISTM the real answer is that r3=200k means the main dac switch
can tolerate roughly three ohms of switch mismatch before
experiencing an lsb error at certain codes.)

As to Phil's original question, doing some calculations, and reviewing
this old thread, "SMD TC? 4/8/2012", I think the answer is that about
14 bits seems pretty doable with a single PWM DAC. Beyond that needs
splitting the DAC into high and low sections.

Beyond that the more bits, the more filtering, timing accuracy,
output impedance, and filtering start biting pretty hard.

The redoubtable Woodward has addressed these in the following link
by splitting a 32-bit DAC and filtering with a s/h, all doable with
a single analog switch pack and a dual op-amp...

https://www.edn.com/design/other/4326640/DC-accurate-32-bit-DAC-achieves-32-bit-resolution

Cheers,
James Arthur

 

[George Herold]

On Wednesday, October 16, 2019 at 6:07:38 AM UTC-4, piglet wrote:

On 16/10/2019 4:27 am, George Herold wrote:
On Saturday, October 12, 2019 at 7:17:44 AM UTC-4, piglet wrote:
On 11/10/2019 20:00, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.



Here's an earlier incarnation of Woodward's idea:

https://www.dropbox.com/s/997fixfek6afwga/woodward_dac_precision_ifd.pdf?raw=1

piglet

piglet, that's an elegant scheme. I'm sitting here struggling to see
exactly what R1 is doing. I guess I'll have to write down some equations
with the output impedance of the inverters driving the V1 node included.
(thanks for sharing.)

George H.


Hi George, yes R1 compensates for the non-zero output impedance of the
HC04 (three paralleled) switches. Working back from woodward's
description it seems he takes the HC04 Ron per output to be about
40ohms. I guess more modern devices have lower Ron but having R1=R6
elegantly cancels the error.

piglet

OK. Sorry a 'brain cramp' in my analysis... sometimes I make things
more complicated than needed. The next order term in the 'error' is
of order R2/R6, 1/255

Say referring now to Win's chapter 4x.25 for the ripple cancellation.
You obvious need R1=R2, but since C2 is mostly just a DC block cap.
Making it a bit bigger than C1 seems like it might be a good idea.
Comments? (say ~three times bigger for 8 bits)

George H.

 

[George Herold]

On Wednesday, October 16, 2019 at 1:37:25 PM UTC-4, dagmarg...@yahoo.com wrote:

On Wednesday, October 16, 2019 at 6:07:38 AM UTC-4, piglet wrote:
On 16/10/2019 4:27 am, George Herold wrote:
On Saturday, October 12, 2019 at 7:17:44 AM UTC-4, piglet wrote:
On 11/10/2019 20:00, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.



Here's an earlier incarnation of Woodward's idea:

https://www.dropbox.com/s/997fixfek6afwga/woodward_dac_precision_ifd.pdf?raw=1

piglet

piglet, that's an elegant scheme. I'm sitting here struggling to see
exactly what R1 is doing. I guess I'll have to write down some equations
with the output impedance of the inverters driving the V1 node included.
(thanks for sharing.)

George H.


Hi George, yes R1 compensates for the non-zero output impedance of the
HC04 (three paralleled) switches. Working back from woodward's
description it seems he takes the HC04 Ron per output to be about
40ohms. I guess more modern devices have lower Ron but having R1=R6
elegantly cancels the error.

piglet

Woodward seems to hint, but doesn't outright claim, that R1 cancels
switch resistance error from the low-dac's 1M load. But I've never
been able to prove to myself that it compensates that, or corrects
the high-dac's switch-resistance error.

Hi James, glad I can help. I started with all these involved equations.
(goes for a page or two with much head scratching..)
And then I did two simple cases.
One with +Vs on MSBs and LSBs grounded and then
visa versa.* Then it's a simple voltage divider.
In both there is an error that goes as Vs*(1-Ro/R6) where Ro is output
resistance. (Assuming R6>>R2>>Ro)

George H.

*With both at +Vs or gnd there is no error.

(ISTM the real answer is that r3=200k means the main dac switch
can tolerate roughly three ohms of switch mismatch before
experiencing an lsb error at certain codes.)

As to Phil's original question, doing some calculations, and reviewing
this old thread, "SMD TC? 4/8/2012", I think the answer is that about
14 bits seems pretty doable with a single PWM DAC. Beyond that needs
splitting the DAC into high and low sections.

Beyond that the more bits, the more filtering, timing accuracy,
output impedance, and filtering start biting pretty hard.

The redoubtable Woodward has addressed these in the following link
by splitting a 32-bit DAC and filtering with a s/h, all doable with
a single analog switch pack and a dual op-amp...

https://www.edn.com/design/other/4326640/DC-accurate-32-bit-DAC-achieves-32-bit-resolution

Cheers,
James Arthur

 

[George Herold]

On Wednesday, October 16, 2019 at 2:34:47 PM UTC-4, George Herold wrote:

On Wednesday, October 16, 2019 at 1:37:25 PM UTC-4, dagmarg...@yahoo.com wrote:
On Wednesday, October 16, 2019 at 6:07:38 AM UTC-4, piglet wrote:
On 16/10/2019 4:27 am, George Herold wrote:
On Saturday, October 12, 2019 at 7:17:44 AM UTC-4, piglet wrote:
On 11/10/2019 20:00, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.



Here's an earlier incarnation of Woodward's idea:

https://www.dropbox.com/s/997fixfek6afwga/woodward_dac_precision_ifd.pdf?raw=1

piglet

piglet, that's an elegant scheme. I'm sitting here struggling to see
exactly what R1 is doing. I guess I'll have to write down some equations
with the output impedance of the inverters driving the V1 node included.
(thanks for sharing.)

George H.


Hi George, yes R1 compensates for the non-zero output impedance of the
HC04 (three paralleled) switches. Working back from woodward's
description it seems he takes the HC04 Ron per output to be about
40ohms. I guess more modern devices have lower Ron but having R1=R6
elegantly cancels the error.

piglet

Woodward seems to hint, but doesn't outright claim, that R1 cancels
switch resistance error from the low-dac's 1M load. But I've never
been able to prove to myself that it compensates that, or corrects
the high-dac's switch-resistance error.

Hi James, glad I can help. I started with all these involved equations.
(goes for a page or two with much head scratching..)
And then I did two simple cases.
One with +Vs on MSBs and LSBs grounded and then
visa versa.* Then it's a simple voltage divider.
In both there is an error that goes as Vs*(1-Ro/R6) where Ro is output
resistance. (Assuming R6>>R2>>Ro)

Oops the 'error' is only the -Vs*Ro/R6 part.

I didn't know about Stephen Woodward. Has he written any books?
Other good articles?

GH

George H.

*With both at +Vs or gnd there is no error.


(ISTM the real answer is that r3=200k means the main dac switch
can tolerate roughly three ohms of switch mismatch before
experiencing an lsb error at certain codes.)

As to Phil's original question, doing some calculations, and reviewing
this old thread, "SMD TC? 4/8/2012", I think the answer is that about
14 bits seems pretty doable with a single PWM DAC. Beyond that needs
splitting the DAC into high and low sections.

Beyond that the more bits, the more filtering, timing accuracy,
output impedance, and filtering start biting pretty hard.

The redoubtable Woodward has addressed these in the following link
by splitting a 32-bit DAC and filtering with a s/h, all doable with
a single analog switch pack and a dual op-amp...

https://www.edn.com/design/other/4326640/DC-accurate-32-bit-DAC-achieves-32-bit-resolution

Cheers,
James Arthur

 

[George Herold]

On Wednesday, October 16, 2019 at 2:34:47 PM UTC-4, George Herold wrote:

On Wednesday, October 16, 2019 at 1:37:25 PM UTC-4, dagmarg...@yahoo.com wrote:
On Wednesday, October 16, 2019 at 6:07:38 AM UTC-4, piglet wrote:
On 16/10/2019 4:27 am, George Herold wrote:
On Saturday, October 12, 2019 at 7:17:44 AM UTC-4, piglet wrote:
On 11/10/2019 20:00, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.



Here's an earlier incarnation of Woodward's idea:

https://www.dropbox.com/s/997fixfek6afwga/woodward_dac_precision_ifd.pdf?raw=1

piglet

piglet, that's an elegant scheme. I'm sitting here struggling to see
exactly what R1 is doing. I guess I'll have to write down some equations
with the output impedance of the inverters driving the V1 node included.
(thanks for sharing.)

George H.


Hi George, yes R1 compensates for the non-zero output impedance of the
HC04 (three paralleled) switches. Working back from woodward's
description it seems he takes the HC04 Ron per output to be about
40ohms. I guess more modern devices have lower Ron but having R1=R6
elegantly cancels the error.

piglet

Woodward seems to hint, but doesn't outright claim, that R1 cancels
switch resistance error from the low-dac's 1M load. But I've never
been able to prove to myself that it compensates that, or corrects
the high-dac's switch-resistance error.

Hi James, glad I can help. I started with all these involved equations.
(goes for a page or two with much head scratching..)
And then I did two simple cases.
One with +Vs on MSBs and LSBs grounded and then
visa versa.* Then it's a simple voltage divider.
In both there is an error that goes as Vs*(1-Ro/R6) where Ro is output
resistance. (Assuming R6>>R2>>Ro)

George H.

*With both at +Vs or gnd there is no error.

Sorry the above is not quite right... I'll think some more...
There is this 'uncertainty' caused by R3 (200k) and the output voltage.

GH

(ISTM the real answer is that r3=200k means the main dac switch
can tolerate roughly three ohms of switch mismatch before
experiencing an lsb error at certain codes.)

As to Phil's original question, doing some calculations, and reviewing
this old thread, "SMD TC? 4/8/2012", I think the answer is that about
14 bits seems pretty doable with a single PWM DAC. Beyond that needs
splitting the DAC into high and low sections.

Beyond that the more bits, the more filtering, timing accuracy,
output impedance, and filtering start biting pretty hard.

The redoubtable Woodward has addressed these in the following link
by splitting a 32-bit DAC and filtering with a s/h, all doable with
a single analog switch pack and a dual op-amp...

https://www.edn.com/design/other/4326640/DC-accurate-32-bit-DAC-achieves-32-bit-resolution

Cheers,
James Arthur

 

[George Herold]

On Wednesday, October 16, 2019 at 5:42:20 PM UTC-4, George Herold wrote:

On Wednesday, October 16, 2019 at 2:34:47 PM UTC-4, George Herold wrote:
On Wednesday, October 16, 2019 at 1:37:25 PM UTC-4, dagmarg...@yahoo.com wrote:
On Wednesday, October 16, 2019 at 6:07:38 AM UTC-4, piglet wrote:
On 16/10/2019 4:27 am, George Herold wrote:
On Saturday, October 12, 2019 at 7:17:44 AM UTC-4, piglet wrote:
On 11/10/2019 20:00, Winfield Hill wrote:
Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.



Here's an earlier incarnation of Woodward's idea:

https://www.dropbox.com/s/997fixfek6afwga/woodward_dac_precision_ifd.pdf?raw=1

piglet

piglet, that's an elegant scheme. I'm sitting here struggling to see
exactly what R1 is doing. I guess I'll have to write down some equations
with the output impedance of the inverters driving the V1 node included.
(thanks for sharing.)

George H.


Hi George, yes R1 compensates for the non-zero output impedance of the
HC04 (three paralleled) switches. Working back from woodward's
description it seems he takes the HC04 Ron per output to be about
40ohms. I guess more modern devices have lower Ron but having R1=R6
elegantly cancels the error.

piglet

Woodward seems to hint, but doesn't outright claim, that R1 cancels
switch resistance error from the low-dac's 1M load. But I've never
been able to prove to myself that it compensates that, or corrects
the high-dac's switch-resistance error.

Hi James, glad I can help. I started with all these involved equations.
(goes for a page or two with much head scratching..)
And then I did two simple cases.
One with +Vs on MSBs and LSBs grounded and then
visa versa.* Then it's a simple voltage divider.
In both there is an error that goes as Vs*(1-Ro/R6) where Ro is output
resistance. (Assuming R6>>R2>>Ro)

George H.

*With both at +Vs or gnd there is no error.

Sorry the above is not quite right... I'll think some more...
There is this 'uncertainty' caused by R3 (200k) and the output voltage.

OK So the above works when the output voltage is at the 'average' value
and on average no current is flowing through R3.

George H.

GH


(ISTM the real answer is that r3=200k means the main dac switch
can tolerate roughly three ohms of switch mismatch before
experiencing an lsb error at certain codes.)

As to Phil's original question, doing some calculations, and reviewing
this old thread, "SMD TC? 4/8/2012", I think the answer is that about
14 bits seems pretty doable with a single PWM DAC. Beyond that needs
splitting the DAC into high and low sections.

Beyond that the more bits, the more filtering, timing accuracy,
output impedance, and filtering start biting pretty hard.

The redoubtable Woodward has addressed these in the following link
by splitting a 32-bit DAC and filtering with a s/h, all doable with
a single analog switch pack and a dual op-amp...

https://www.edn.com/design/other/4326640/DC-accurate-32-bit-DAC-achieves-32-bit-resolution

Cheers,
James Arthur

 

[piglet]

On 16/10/2019 20:01, George Herold wrote:

I didn't know about Stephen Woodward. Has he written any books?
Other good articles?

No books that I know of. Stephen Woodward has contributed many
Ideas-for-Design to EDN/ED since at least the early 1990s. I always
remember the devastatingly clever things he'd do with PWM'd 4053 analog
switches. Reminds me of the clever tricks Jim Thompson would do with a
TL431

piglet

 

[Winfield Hill]

George Herold wrote...

I read an article on diode laser thermal control that I
found a little confusing...
Here,
https://www.electronicdesign.com/archive/tdl-self-senses-temperature-improve-spectroscopy-accuracy

You could also ask ED to fix their broken links.


--
Thanks,
- Win

 

[Winfield Hill]

George Herold wrote...

I read an article on diode laser thermal control that I found
a little confusing... maybe I should send him an email?

My guess is he'd be happy to respond to an email.

> Did he ever post here?

Not that I recall.


--
Thanks,
- Win