Attainable PWM accuracy?

[Phil Hobbs]

Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias. (See
<https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering. It'll obviously
have to be buffered with a tinylogic gate running from a stiff reference
supply, to prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms). Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy? How good can you make a PWM, anyway?

Thanks

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Rick C]

On Friday, October 11, 2019 at 1:16:18 PM UTC-4, Phil Hobbs wrote:

Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering. It'll obviously
have to be buffered with a tinylogic gate running from a stiff reference
supply, to prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms). Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy? How good can you make a PWM, anyway?

I've always been leery of treating digital components as analog devices. With such a severe dependency on the precision and accuracy of the digital device do you think temperature drift will impact the output? Even if your voltage rail is highly stable, will the output of a gate be stable enough for this application? It appears that you are using not just the timing of the output, but the voltage since you talk about the sag inside the MCU. Are you aware the temperature will also affect the timing and can impact one edge of the pulse more than the other, causing pulse width distortion.

You list frequencies that you would filter the bias control voltage. What happens if the bias varies at a slower rate, such as 1 Hz or 0.1 Hz? I assume that would cause problems.

What sort of circuit do you plan to use to get from logic levels up to 55 volts?

--

Rick C.

- Get 2,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

 

[Phil Hobbs]

On 2019-10-11 14:09, John Larkin wrote:

On Fri, 11 Oct 2019 13:16:07 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering. It'll obviously
have to be buffered with a tinylogic gate running from a stiff reference
supply, to prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms). Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy? How good can you make a PWM, anyway?

Thanks

Phil Hobbs

Straight PWM has the filtering crisis, but it sounds like you can
filter hard and slow.

Then there is the reference voltage stability and rise/fall edge rate
and delay changes with temperature, which are a serious error at high
PWM frequencies.

Yup. I could effectively stiffen the reference by using an extra
inverter to make an inverted copy of the PWM and dump it into a dummy
filter. Too many parts though.

16-bit PWM at 7.5 MHz is 2 ps per LSB. The ARM rise and fall times
will be nanoseconds.

I'm just integrating the duty cycle, so the LSB is 133 ns. A 16-bit PWM
with a 7.5 MHz output frequency would be quite the device.

We use DAC1220 in our thermocouple simulator, which is a 20-bit
delta-sigma DAC, guaranteed monotonic. It's about $12.

AD5664 is a nice quad 16 bit dac for $9.50. There are probably similar
singles.

Does that ARM have a DAC? You could fine-trim the DAC with PWM.

The 845 has a 10-bit DAC. We could combine it with a few-bit PWM, but
we'd have to calibrate it first, for which we'd need a decent ADC. The
on-chip ADC is the usual MCU quality--3 ADU DNL. It's really a 10-bit
ADC with a couple extra tacked on for decoration. The LPC804, which is
a younger and smaller sibling, has a much better ADC.

I mostly care about stability and very low DNL, rather than ultra-fine
settability.

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

On 2019-10-11 13:34, Rick C wrote:

On Friday, October 11, 2019 at 1:16:18 PM UTC-4, Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing
a bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes
from ~0 to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)




Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering. It'll
obviously have to be buffered with a tinylogic gate running from a
stiff reference supply, to prevent voltage sags inside the LPC845
MCU from spoiling the accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an
output frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of
filtering to get the output ripple on the MPPC supply down to a
millivolt or so, so that's 3 RC sections with 33 dB attenuation
each, i.e. corner frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60
ms). Not horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12
bits.

Anything else besides buffering and filtering that I haven't
thought of that might limit the accuracy? How good can you make a
PWM, anyway?

I've always been leery of treating digital components as analog
devices.

A TinyLogic buffer is just four FETs in a package, plus a bit of ESD
protection. And lots of digital things are good for analogue: XOR
phase detectors, for instance. BITD I built a diffraction-based
instrument for controlling critical dimensions in photolithography by
watching the latent image develop during the post-exposure bake step.
It used seven 1x3-inch solar cells arranged as a 7-sided prism, with all
the cathodes running into a single TIA. I switched between them using
the tri-state outputs of a zero-power PALCE22V10Z PAL. Worked
great--nothing else was going on in the PAL, so there was no noise issue.

With such a severe dependency on the precision and accuracy
of the digital device do you think temperature drift will impact the
output? Even if your voltage rail is highly stable, will the output
of a gate be stable enough for this application?

Should be, as long as the first resistor in the filter is much larger
than the FET on-resistance.

It appears that you
are using not just the timing of the output, but the voltage since
you talk about the sag inside the MCU. Are you aware the temperature
will also affect the timing and can impact one edge of the pulse more
than the other, causing pulse width distortion.

Sure. However, the MCU would fail to work if that skew got too bad. In
the 16-bit case, it would have to be a whole PWM clock (4 instruction
clocks) to be a problem.

You list frequencies that you would filter the bias control voltage.
What happens if the bias varies at a slower rate, such as 1 Hz or 0.1
Hz? I assume that would cause problems.

Sure, but that's what the PWM is controlling.

What sort of circuit do you plan to use to get from logic levels up
to 55 volts?

A 3-section, gate-driver-based Cockroft-Walton running off the 24V
supply, with a three-transistor Class A output stage inside the feedback
loop.

Cheers

Phil Hobbs



--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[John Larkin]

On Fri, 11 Oct 2019 13:16:07 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering. It'll obviously
have to be buffered with a tinylogic gate running from a stiff reference
supply, to prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms). Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy? How good can you make a PWM, anyway?

Thanks

Phil Hobbs

Straight PWM has the filtering crisis, but it sounds like you can
filter hard and slow.

Then there is the reference voltage stability and rise/fall edge rate
and delay changes with temperature, which are a serious error at high
PWM frequencies.

16-bit PWM at 7.5 MHz is 2 ps per LSB. The ARM rise and fall times
will be nanoseconds.

We use DAC1220 in our thermocouple simulator, which is a 20-bit
delta-sigma DAC, guaranteed monotonic. It's about $12.

AD5664 is a nice quad 16 bit dac for $9.50. There are probably similar
singles.

Does that ARM have a DAC? You could fine-trim the DAC with PWM.

 

[Rick C]

On Friday, October 11, 2019 at 2:10:00 PM UTC-4, Phil Hobbs wrote:

On 2019-10-11 13:34, Rick C wrote:

What sort of circuit do you plan to use to get from logic levels up
to 55 volts?

A 3-section, gate-driver-based Cockroft-Walton running off the 24V
supply, with a three-transistor Class A output stage inside the feedback
loop.

So you drive this with a voltage? I guess I'm not picturing it. I thought this would be driven by a square wave yet you are filtering the PWM signal..

Another part that I also don't get is how you can use a 16 bit PWM to control something that varies over a range of ~0 to 2E6 between 52 and 55 volts' bias. Is the exact gain not so important? What level of stability and resolution of control are you looking for in this bias voltage?

--

Rick C.

+ Get 2,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

 

[Winfield Hill]

Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.


--
Thanks,
- Win

 

[John Larkin]

On Fri, 11 Oct 2019 14:25:24 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2019-10-11 14:09, John Larkin wrote:
On Fri, 11 Oct 2019 13:16:07 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering. It'll obviously
have to be buffered with a tinylogic gate running from a stiff reference
supply, to prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms). Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy? How good can you make a PWM, anyway?

Thanks

Phil Hobbs

Straight PWM has the filtering crisis, but it sounds like you can
filter hard and slow.

Then there is the reference voltage stability and rise/fall edge rate
and delay changes with temperature, which are a serious error at high
PWM frequencies.

Yup. I could effectively stiffen the reference by using an extra
inverter to make an inverted copy of the PWM and dump it into a dummy
filter. Too many parts though.


16-bit PWM at 7.5 MHz is 2 ps per LSB. The ARM rise and fall times
will be nanoseconds.

I'm just integrating the duty cycle, so the LSB is 133 ns. A 16-bit PWM
with a 7.5 MHz output frequency would be quite the device.

Oh, OK, the PWM *clock* is 7.5M. Duh. I've been living in the fs world
too much lately.

We were just testing a quad TDC with 6 ps LSB and apparently zero
jitter; it's actually measuring less than zero! The ladies who did the
FPGA are celebrating. One is a flamenco dancer and when she's happy
she taps on the floor... loud.

The PWM crisis is that, given some clock, to get more accuracy
(including ripple) you need to add bits, which reduces the output
frequency, which requires a filter with more stopband attenuation and
lower cutoff frequency. That all gangs up.

We use DAC1220 in our thermocouple simulator, which is a 20-bit
delta-sigma DAC, guaranteed monotonic. It's about $12.

AD5664 is a nice quad 16 bit dac for $9.50. There are probably similar
singles.

Does that ARM have a DAC? You could fine-trim the DAC with PWM.

The 845 has a 10-bit DAC. We could combine it with a few-bit PWM, but
we'd have to calibrate it first, for which we'd need a decent ADC. The
on-chip ADC is the usual MCU quality--3 ADU DNL. It's really a 10-bit
ADC with a couple extra tacked on for decoration. The LPC804, which is
a younger and smaller sibling, has a much better ADC.

I mostly care about stability and very low DNL, rather than ultra-fine
settability.

Sounds like your PWM voltage reference may dominate.

 

[Phil Hobbs]

On 2019-10-11 15:54, Andy Bennet wrote:

On 11/10/2019 18:16, Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from
~0 to 2E6 between 52 and 55 volts' bias.  (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often.  Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering.  It'll
obviously have to be buffered with a tinylogic gate running from a
stiff reference supply, to prevent voltage sags inside the LPC845 MCU
from spoiling the accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms).  Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought
of that might limit the accuracy?  How good can you make a PWM, anyway?

Thanks

Phil Hobbs


Rather than PWM, have a look at pulse density modulation which will ease
the filtering requirement. Not sure if this is do-able in software, but
I have used FPGA implementations of this with great success.

Sort of a delta-sigma thing? You can put an M-bit delta-sigma extension
on an N-bit PWM pretty easily using a timer interrupt. I don't think
we could get the required accuracy bit-banging something like that.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

On 2019-10-11 15:00, Winfield Hill wrote:

Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.

Fun, thanks.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

On 2019-10-11 15:40, John Larkin wrote:

On Fri, 11 Oct 2019 14:25:24 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2019-10-11 14:09, John Larkin wrote:
On Fri, 11 Oct 2019 13:16:07 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering. It'll obviously
have to be buffered with a tinylogic gate running from a stiff reference
supply, to prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms). Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy? How good can you make a PWM, anyway?

Thanks

Phil Hobbs

Straight PWM has the filtering crisis, but it sounds like you can
filter hard and slow.

Then there is the reference voltage stability and rise/fall edge rate
and delay changes with temperature, which are a serious error at high
PWM frequencies.

Yup. I could effectively stiffen the reference by using an extra
inverter to make an inverted copy of the PWM and dump it into a dummy
filter. Too many parts though.


16-bit PWM at 7.5 MHz is 2 ps per LSB. The ARM rise and fall times
will be nanoseconds.

I'm just integrating the duty cycle, so the LSB is 133 ns. A 16-bit PWM
with a 7.5 MHz output frequency would be quite the device.


Oh, OK, the PWM *clock* is 7.5M. Duh. I've been living in the fs world
too much lately.

We were just testing a quad TDC with 6 ps LSB and apparently zero
jitter; it's actually measuring less than zero! The ladies who did the
FPGA are celebrating. One is a flamenco dancer and when she's happy
she taps on the floor... loud.

The PWM crisis is that, given some clock, to get more accuracy
(including ripple) you need to add bits, which reduces the output
frequency, which requires a filter with more stopband attenuation and
lower cutoff frequency. That all gangs up.


We use DAC1220 in our thermocouple simulator, which is a 20-bit
delta-sigma DAC, guaranteed monotonic. It's about $12.

AD5664 is a nice quad 16 bit dac for $9.50. There are probably similar
singles.

Does that ARM have a DAC? You could fine-trim the DAC with PWM.

The 845 has a 10-bit DAC. We could combine it with a few-bit PWM, but
we'd have to calibrate it first, for which we'd need a decent ADC. The
on-chip ADC is the usual MCU quality--3 ADU DNL. It's really a 10-bit
ADC with a couple extra tacked on for decoration. The LPC804, which is
a younger and smaller sibling, has a much better ADC.

I mostly care about stability and very low DNL, rather than ultra-fine
settability.

Sounds like your PWM voltage reference may dominate.

It's in a benign environment--securely bolted to a large mild-steel
vacuum chamber in somebody's lab--and runs a gain calibration at
power-up. (We put a LED on the front-end amp board.)

I'm looking at using a REF5030, which has 3 ppm/K drift. It costs $5,
but it's simpler than using a separate DAC. There's nothing else using
SPI on this board, so it also saves me two or three MCU pins.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

On 2019-10-11 15:22, Rick C wrote:

On Friday, October 11, 2019 at 2:10:00 PM UTC-4, Phil Hobbs wrote:
On 2019-10-11 13:34, Rick C wrote:

What sort of circuit do you plan to use to get from logic levels
up to 55 volts?

A 3-section, gate-driver-based Cockroft-Walton running off the 24V
supply, with a three-transistor Class A output stage inside the
feedback loop.

Op amp feedback loop, that is. (sorry)

So you drive this with a voltage? I guess I'm not picturing it. I
thought this would be driven by a square wave yet you are filtering
the PWM signal.

MCU PWM
-> tinylogic inverter running off a REF5030 3V 5 ppm/K reference
-> three stage RC lowpass @ 6 ms
-> op amp with transistor booster to make 0 to -65V
-> inductor network to let the bootstrap work
-> MPPC common anodes.

With a bit of series inductance to control the peak current, the C-W
makes -80 V from +24 and runs at 2 MHz.

Another part that I also don't get is how you can use a 16 bit PWM to
control something that varies over a range of ~0 to 2E6 between 52
and 55 volts' bias. Is the exact gain not so important? What level
of stability and resolution of control are you looking for in this
bias voltage?

I'd like the gain to be stable to 0.1% or better up at 2E6 over 1000
seconds, once the gizmo has warmed up. That way the pictures won't have
visible stripes in them. At a gain slope of 6E5 per volt, that's

|delta Vbias| < 0.001 * 2E6 / 6E5/V = 3 mV in 1000 seconds,

i.e. about 60 ppm. With 70V FS, a 12-bit PWM will get me gain steps of
about 17 mV with 250 ppm, which is 0.5% per step at 2E6. That's fine
enough for most purposes.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[John Larkin]

On Fri, 11 Oct 2019 14:09:52 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2019-10-11 13:34, Rick C wrote:
On Friday, October 11, 2019 at 1:16:18 PM UTC-4, Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing
a bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes
from ~0 to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)




Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering. It'll
obviously have to be buffered with a tinylogic gate running from a
stiff reference supply, to prevent voltage sags inside the LPC845
MCU from spoiling the accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an
output frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of
filtering to get the output ripple on the MPPC supply down to a
millivolt or so, so that's 3 RC sections with 33 dB attenuation
each, i.e. corner frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60
ms). Not horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12
bits.

Anything else besides buffering and filtering that I haven't
thought of that might limit the accuracy? How good can you make a
PWM, anyway?

I've always been leery of treating digital components as analog
devices.

A TinyLogic buffer is just four FETs in a package, plus a bit of ESD
protection. And lots of digital things are good for analogue: XOR
phase detectors, for instance. BITD I built a diffraction-based
instrument for controlling critical dimensions in photolithography by
watching the latent image develop during the post-exposure bake step.
It used seven 1x3-inch solar cells arranged as a 7-sided prism, with all
the cathodes running into a single TIA. I switched between them using
the tri-state outputs of a zero-power PALCE22V10Z PAL. Worked
great--nothing else was going on in the PAL, so there was no noise issue.

With such a severe dependency on the precision and accuracy
of the digital device do you think temperature drift will impact the
output? Even if your voltage rail is highly stable, will the output
of a gate be stable enough for this application?

Should be, as long as the first resistor in the filter is much larger
than the FET on-resistance.

It appears that you
are using not just the timing of the output, but the voltage since
you talk about the sag inside the MCU. Are you aware the temperature
will also affect the timing and can impact one edge of the pulse more
than the other, causing pulse width distortion.

Sure. However, the MCU would fail to work if that skew got too bad. In
the 16-bit case, it would have to be a whole PWM clock (4 instruction
clocks) to be a problem.


You list frequencies that you would filter the bias control voltage.
What happens if the bias varies at a slower rate, such as 1 Hz or 0.1
Hz? I assume that would cause problems.

Sure, but that's what the PWM is controlling.


What sort of circuit do you plan to use to get from logic levels up
to 55 volts?

A 3-section, gate-driver-based Cockroft-Walton running off the 24V
supply, with a three-transistor Class A output stage inside the feedback
loop.

I like using a dual optocoupler and an opamp as a high-voltage linear
amp stage. Parts count and power consumption are low, and it mostly
current limits.

Cheers

Phil Hobbs

Any proper CMOS gate is pure ohmic to the rails, perfectly good for
analog use.

 

[Andy Bennet]

On 11/10/2019 18:16, Phil Hobbs wrote:

Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias.  (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often.  Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering.  It'll obviously
have to be buffered with a tinylogic gate running from a stiff reference
supply, to prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms).  Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy?  How good can you make a PWM, anyway?

Thanks

Phil Hobbs

Rather than PWM, have a look at pulse density modulation which will ease
the filtering requirement. Not sure if this is do-able in software, but
I have used FPGA implementations of this with great success.

 

[Peter]

Winfield Hill <winfieldhill@yahoo.com> wrote

Phil Hobbs wrote...

The '845 can run its PWM clocks ... I'd need about
100 dB of filtering to get the output ripple ...

You could take a look at the x-Chapters section,
4x.25 Ripple Reduction in PWM, where we explore
Stephen Woodward's clever ripple-reduction trick.

https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1

I concluded for my project, that a 16-bit DAC
made more sense, in terms of minimum PCB space.

That's a bit like the 2 phase switching power supplies which AFAIK are
common on PC motherboards. You need much smaller capacitors.

 

[Lasse Langwadt Christense]

fredag den 11. oktober 2019 kl. 21.54.15 UTC+2 skrev Andy Bennet:

On 11/10/2019 18:16, Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias.  (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often.  Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering.  It'll obviously
have to be buffered with a tinylogic gate running from a stiff reference
supply, to prevent voltage sags inside the LPC845 MCU from spoiling the
accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms).  Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy?  How good can you make a PWM, anyway?

Thanks

Phil Hobbs


Rather than PWM, have a look at pulse density modulation which will ease
the filtering requirement. Not sure if this is do-able in software, but
I have used FPGA implementations of this with great success.

you can do a sorta in between; use noise shaping like, delta sigma modulation,
to reduce the bitwidth and implement that with a faster pwm with fewer bits

 

[Tim Williams]

Do you need so many bits if you just add the 50V offset and DAC the
remaining 5ish volts? Well, not too many less, about 3, but still. That's
closer to 12 than 16, or maybe even 8 than 12. Use a 2.5 or 5V PWM ref and
add the offset with op-amps.

As long as you have an op-amp or two in circuit, you might as well use a
3-pole active filter to sharpen up the cutoff. Lower ripple for a given
cutoff, faster response...

(Maybe a 4-pole, with the added pole being a small RC out front to help
arrest the sharp edges, to cover up the active filter not handling edges so
neatly.)

Do you have a DAC sensing the MPPC bias, or multiplication factor, and
servoing on that? That may be justificationi for it.

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

"Phil Hobbs" <pcdhSpamMeSenseless@electrooptical.net> wrote in message
news:cuqdnROW7KJFJT3AnZ2dnUU7-XHNnZ2d@supernews.com...

Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a bias
supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from ~0
to 2E6 between 52 and 55 volts' bias. (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)

Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often. Accordingly, I'm tentatively planning
to use a 12 to 16-bit PWM with good filtering. It'll obviously have to be
buffered with a tinylogic gate running from a stiff reference supply, to
prevent voltage sags inside the LPC845 MCU from spoiling the accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to get
the output ripple on the MPPC supply down to a millivolt or so, so that's
3 RC sections with 33 dB attenuation each, i.e. corner frequencies of 2.5
Hz to 40 Hz (TCs of 4 to 60 ms). Not horrible--100k*0.68uF at 16 bits,
40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought of
that might limit the accuracy? How good can you make a PWM, anyway?

Thanks

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Lasse Langwadt Christense]

fredag den 11. oktober 2019 kl. 22.52.50 UTC+2 skrev John Larkin:

On Fri, 11 Oct 2019 16:17:51 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2019-10-11 15:54, Andy Bennet wrote:
On 11/10/2019 18:16, Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from
~0 to 2E6 between 52 and 55 volts' bias.  (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc..pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often.  Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering.  It'll
obviously have to be buffered with a tinylogic gate running from a
stiff reference supply, to prevent voltage sags inside the LPC845 MCU
from spoiling the accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms).  Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought
of that might limit the accuracy?  How good can you make a PWM, anyway?

Thanks

Phil Hobbs


Rather than PWM, have a look at pulse density modulation which will ease
the filtering requirement. Not sure if this is do-able in software, but
I have used FPGA implementations of this with great success.

Sort of a delta-sigma thing? You can put an M-bit delta-sigma extension
on an N-bit PWM pretty easily using a timer interrupt. I don't think
we could get the required accuracy bit-banging something like that.

Cheers

Phil Hobbs

You can also delta-sigma the LSB of a PWM to effectively add more
bits. That basically interpolates between two PWM levels.

I think that may have filtering advantages. I don't know if a uP can
reasonably do that; we did it in an FPGA.

I guess you could even PWM the LSB of a PWM.

AND a fast and a slow PWM?

in hardware there's also the trick of inverting some or all of the bits
in the counter

 

[Rick C]

On Friday, October 11, 2019 at 3:45:33 PM UTC-4, Phil Hobbs wrote:

On 2019-10-11 15:22, Rick C wrote:
On Friday, October 11, 2019 at 2:10:00 PM UTC-4, Phil Hobbs wrote:
On 2019-10-11 13:34, Rick C wrote:

What sort of circuit do you plan to use to get from logic levels
up to 55 volts?

A 3-section, gate-driver-based Cockroft-Walton running off the 24V
supply, with a three-transistor Class A output stage inside the
feedback loop.

Op amp feedback loop, that is. (sorry)

So you drive this with a voltage? I guess I'm not picturing it. I
thought this would be driven by a square wave yet you are filtering
the PWM signal.

MCU PWM
-> tinylogic inverter running off a REF5030 3V 5 ppm/K reference
-> three stage RC lowpass @ 6 ms
-> op amp with transistor booster to make 0 to -65V
-> inductor network to let the bootstrap work
-> MPPC common anodes.

So if you are just using the PWM to generate an analog voltage to a resolution of 16 bits, why screw with the filtering and crap and not just use a 16 bit DAC? Seems like a lot of drama to avoid using a proper DAC.

With a bit of series inductance to control the peak current, the C-W
makes -80 V from +24 and runs at 2 MHz.

Maybe I'm missing the story here too, but the CW is not part of the above circuit, right? Or is that the source of the power supply for the opamp?

Another part that I also don't get is how you can use a 16 bit PWM to
control something that varies over a range of ~0 to 2E6 between 52
and 55 volts' bias. Is the exact gain not so important? What level
of stability and resolution of control are you looking for in this
bias voltage?

I'd like the gain to be stable to 0.1% or better up at 2E6 over 1000
seconds, once the gizmo has warmed up. That way the pictures won't have
visible stripes in them. At a gain slope of 6E5 per volt, that's

|delta Vbias| < 0.001 * 2E6 / 6E5/V = 3 mV in 1000 seconds,

i.e. about 60 ppm. With 70V FS, a 12-bit PWM will get me gain steps of
about 17 mV with 250 ppm, which is 0.5% per step at 2E6. That's fine
enough for most purposes.

Ok, so you need stability of 60 ppm. Do you think you will get that from the MCU and the driver over temperature? You were talking about one clock cycle, but clearly you need more than that and you were talking about a 16 bit PWM.

I've worked on designs where I wanted to roll ADC/DAC into FPGAs to save board space, cost and I/O pins. People tell me I'm nuts to worry with these issues in most designs. In the future I will refer them to your design.

--

Rick C.

-- Get 2,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

 

[John Larkin]

On Fri, 11 Oct 2019 16:17:51 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2019-10-11 15:54, Andy Bennet wrote:
On 11/10/2019 18:16, Phil Hobbs wrote:
Hi, all,

As part of the aforementioned cathodolumiescence system, I'm doing a
bias supply for multipixel photon counters (MPPCs).

MPPCs are extremely voltage sensitive--the gain of this one goes from
~0 to 2E6 between 52 and 55 volts' bias.  (See
https://www.hamamatsu.com/resources/pdf/ssd/e03_handbook_si_apd_mppc.pdf>.)


Sooo, there's a bit of pressure to keep the bias very stable, but it
doesn't have to change very often.  Accordingly, I'm tentatively
planning to use a 12 to 16-bit PWM with good filtering.  It'll
obviously have to be buffered with a tinylogic gate running from a
stiff reference supply, to prevent voltage sags inside the LPC845 MCU
from spoiling the accuracy.

The '845 can run its PWM clocks at 7.5 MHz, so that would be an output
frequency of 114 Hz to 1.8 kHz. I'd need about 100 dB of filtering to
get the output ripple on the MPPC supply down to a millivolt or so, so
that's 3 RC sections with 33 dB attenuation each, i.e. corner
frequencies of 2.5 Hz to 40 Hz (TCs of 4 to 60 ms).  Not
horrible--100k*0.68uF at 16 bits, 40k and 0.1 uF at 12 bits.

Anything else besides buffering and filtering that I haven't thought
of that might limit the accuracy?  How good can you make a PWM, anyway?

Thanks

Phil Hobbs


Rather than PWM, have a look at pulse density modulation which will ease
the filtering requirement. Not sure if this is do-able in software, but
I have used FPGA implementations of this with great success.

Sort of a delta-sigma thing? You can put an M-bit delta-sigma extension
on an N-bit PWM pretty easily using a timer interrupt. I don't think
we could get the required accuracy bit-banging something like that.

Cheers

Phil Hobbs

You can also delta-sigma the LSB of a PWM to effectively add more
bits. That basically interpolates between two PWM levels.

I think that may have filtering advantages. I don't know if a uP can
reasonably do that; we did it in an FPGA.

I guess you could even PWM the LSB of a PWM.