6 bit things...

[Ricky]

On Wednesday, August 3, 2022 at 4:29:56 PM UTC-4, John Larkin wrote:

On Wed, 3 Aug 2022 14:28:30 -0400, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

jla...@highlandsniptechnology.com wrote:
On Wed, 3 Aug 2022 12:03:11 -0400 (EDT), Martin Rid
martin...@verison.net> wrote:

jla...@highlandsniptechnology.com Wrote in message:r
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?I want to send data over an SFP optical link, in 6-bit things. 0 1 1 0 d \\d repeated, roughly 100 Mbits/secis DC balanced, which SFP likes.

I would still consider it a byte, but sixbit.
You could always call it braille.

Cheers

Maybe \"frame\" sounds better than \"clump.\"



Or \'clod\'. Alternatives abound.

I\'d go with sextet (or sestet, if you\'re feeling poetic).

Cheers

Phil Hobbs
Now one of my guys claims that all we need is

1 0 d1 \\d1 1 0 d2 \\d2 .... etc

four bits per chunk to recover data d. Which is a nibble. I can still
call each 4 bits a frame.

I hate it when people are smarter than I am.

That will only sync if your data changes. If your data stream has a sequence of ones, the data and sync can\'t be distinguished until a zero is sent. You will need a three bit sync pattern for that, or you don\'t need to send the sync for every bit.

If you are ok with data dependencies for aligning to the data, then simply sending d and /d as a pair is easily synchronized to at any data transition. Hmmm.... d,/d,d,/d Where have I seen that before??? I\'m picturing a place in the UK.

Why reinvent the wheel? This doesn\'t even require a separate clock!

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

 

[John Larkin]

On Wed, 3 Aug 2022 21:52:43 +0100, Martin Brown
<\'\'\'newspam\'\'\'@nonad.co.uk> wrote:

On 03/08/2022 21:09, Cydrome Leader wrote:
jlarkin@highlandsniptechnology.com wrote:
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

six bit word.

MIX - for the model 1009 Knuth polyunsaturated virtual computer used 6
bit bytes and 5 bytes to a word in TAOCP. It was partly intended to
break any algorithm that relied on things being a handy power of two.

There\'s no point in a challenge to design the worst CPU architecture,
since it\'s been done so many times already.

 

[John Larkin]

On Wed, 03 Aug 2022 16:32:53 -0400, Joe Gwinn <joegwinn@comcast.net>
wrote:

On Wed, 03 Aug 2022 10:19:49 -0700, John Larkin
jlarkin@highland_atwork_technology.com> wrote:

On Wed, 03 Aug 2022 12:35:16 -0400, Joe Gwinn <joegwinn@comcast.net
wrote:

On Wed, 03 Aug 2022 08:52:08 -0700, jlarkin@highlandsniptechnology.com
wrote:

Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

It would still be a byte. Univac 1108, with 36-bit words.

A byte was always a fraction of a word, but the length of a word was
whatever the computer was designed for. All sizes were tried.

I\'ve worked on digital computers with the following word sizes (in
bits): 12, 16, 24, 32, 36, 48, 64.

There were just as many floating-point formats.

Now days, it has settled down, and words are multiples of 8 bits in
size, usually a power of two. And all FP is IEEE.

The standards folk came up with \"octet\" because byte was so
ill-defined.

Half an octet was sometimes called a nybble. And so on.


I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

If you use 8-bit patterns (best for component availability), but use
only the DC balanced subset, does that suffice?

We could do 8b10b, but that would need an FPGA to generate and
receive. I\'m thinking about a spare-time thing that I could design
without an FPGA or uP, all hardware. My digital people are swamped
with big projects and I need something fun to design.


Or, turn it around. Figure out how many DC-balanced patterns you
need, double it (for growth), and figure out long a word is needed.
Don\'t forget to include some control patterns.


The data is a 1-bit steam from a delta-sigma ADC. I just want to
transport it over fiber, and SFP is the easy way to do that. But SFP
is intended for telecom, ac coupled, intolerant of dc imbalance. Most
SFPs won\'t pass anything below about 1 MHz. But they are crazy fast
and have great AGC.

Is it 100 million bits per second, or symbols per second?

The ADUM7703 can be clocked up to 20 MHz, but we really don\'t need to
do that. 10M would be plenty.

What is being digitized? Voice? Data of some kind?

Some customer\'s analog voltage. Might be a strain gage load cell, for
example. We\'d have some input ranges.

Is there a maximum latency and latency jitter requirement?

Neither, actually. I just want to transport the ADC output correctly.

One-bit delta samples are usually signed, so the minimum is two
symbols. If the voltage being sent is zero, then we\'ll get a steady
+,-,+,-,+, stream, which will have very strong RF spurs and thus
emissions, so need to break this up.

The ADC has a one-bit output over +-320 mV input, and averages 50%
duty cycle at 0 volts in. I just want to transport that bit over a
fiber link.

A zero symbol makes it three, and an idle symbol, makes it four
symbols.


Gigabit Ethernet does something like this, only grander, with two
patterns for every possible symbol to be sent, and they track current
DC balance, and choose which pattern to use that will reduce the
running DC balance.

8b10b does elaborate long-term DC balancing like that. Too much work.

SFPs usually tolerate a little DC imbalance. You can send PWM at, say,
35% to 65%.

Yes, too much trouble. But if you use table lookup, you can get close
enough.

I don\'t want an FPGA or a uP in this box. All my coder-people are too
busy on other projects now. So, a few gates and flipflops.

For instance, have four tables (one per symbol), with unique random
patterns, and choose a pattern from the correct table for the symbol
to be sent. These patterns are all inherently DC balanced, being half
+ and half -, and don\'t have any long runs.

On the receive end, use table lookup to recover the sent symbols.

You will need a sync pattern to establish and maintain symbol framing.
The key property of sync patterns is a sharp single correlation peak
against shifted examples of that pattern. A sync preamble may be
multiple sync symbols concatenated. Sync and idle symbols may be the
same.


Joe Gwinn

 

[Ricky]

On Wednesday, August 3, 2022 at 5:48:23 PM UTC-4, John Larkin wrote:

On Wed, 03 Aug 2022 16:32:53 -0400, Joe Gwinn <joeg...@comcast.net
wrote:

On Wed, 03 Aug 2022 10:19:49 -0700, John Larkin
jlarkin@highland_atwork_technology.com> wrote:

On Wed, 03 Aug 2022 12:35:16 -0400, Joe Gwinn <joeg...@comcast.net
wrote:

On Wed, 03 Aug 2022 08:52:08 -0700, jla...@highlandsniptechnology.com
wrote:

Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

It would still be a byte. Univac 1108, with 36-bit words.

A byte was always a fraction of a word, but the length of a word was
whatever the computer was designed for. All sizes were tried.

I\'ve worked on digital computers with the following word sizes (in
bits): 12, 16, 24, 32, 36, 48, 64.

There were just as many floating-point formats.

Now days, it has settled down, and words are multiples of 8 bits in
size, usually a power of two. And all FP is IEEE.

The standards folk came up with \"octet\" because byte was so
ill-defined.

Half an octet was sometimes called a nybble. And so on.


I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

If you use 8-bit patterns (best for component availability), but use
only the DC balanced subset, does that suffice?

We could do 8b10b, but that would need an FPGA to generate and
receive. I\'m thinking about a spare-time thing that I could design
without an FPGA or uP, all hardware. My digital people are swamped
with big projects and I need something fun to design.


Or, turn it around. Figure out how many DC-balanced patterns you
need, double it (for growth), and figure out long a word is needed.
Don\'t forget to include some control patterns.


The data is a 1-bit steam from a delta-sigma ADC. I just want to
transport it over fiber, and SFP is the easy way to do that. But SFP
is intended for telecom, ac coupled, intolerant of dc imbalance. Most
SFPs won\'t pass anything below about 1 MHz. But they are crazy fast
and have great AGC.

Is it 100 million bits per second, or symbols per second?
The ADUM7703 can be clocked up to 20 MHz, but we really don\'t need to
do that. 10M would be plenty.

What is being digitized? Voice? Data of some kind?
Some customer\'s analog voltage. Might be a strain gage load cell, for
example. We\'d have some input ranges.

Is there a maximum latency and latency jitter requirement?
Neither, actually. I just want to transport the ADC output correctly.

One-bit delta samples are usually signed, so the minimum is two
symbols. If the voltage being sent is zero, then we\'ll get a steady
+,-,+,-,+, stream, which will have very strong RF spurs and thus
emissions, so need to break this up.
The ADC has a one-bit output over +-320 mV input, and averages 50%
duty cycle at 0 volts in. I just want to transport that bit over a
fiber link.

A zero symbol makes it three, and an idle symbol, makes it four
symbols.


Gigabit Ethernet does something like this, only grander, with two
patterns for every possible symbol to be sent, and they track current
DC balance, and choose which pattern to use that will reduce the
running DC balance.

8b10b does elaborate long-term DC balancing like that. Too much work.

SFPs usually tolerate a little DC imbalance. You can send PWM at, say,
35% to 65%.

Yes, too much trouble. But if you use table lookup, you can get close
enough.
I don\'t want an FPGA or a uP in this box. All my coder-people are too
busy on other projects now. So, a few gates and flipflops.

Manchester encoding is one of the simplest things in the world to decode. It\'s also very easy to encode. Look it up. You\'ll be surprised at how easy it is.

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

 

[bitrex]

On 8/3/2022 4:09 PM, Cydrome Leader wrote:

jlarkin@highlandsniptechnology.com wrote:
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

six bit word.

Have you heard the song that\'s just six words long:

<https://youtu.be/SIIvJkSLSfw>

 

[Ricky]

On Wednesday, August 3, 2022 at 6:28:11 PM UTC-4, bitrex wrote:

On 8/3/2022 4:09 PM, Cydrome Leader wrote:
jla...@highlandsniptechnology.com wrote:
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

six bit word.
Have you heard the song that\'s just six words long:

https://youtu.be/SIIvJkSLSfw

The refrain was seven words actually, so not DC balanced.

--

Rick C.

-- Get 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

 

[Jasen Betts]

On 2022-08-03, jlarkin@highlandsniptechnology.com <jlarkin@highlandsniptechnology.com> wrote:
> Is a byte always 8 bits?

no, this is why internet standards use the term \"Octet\" instead

> What can I call a 6-bit byte? A clump?

sixpence? Nintendo called 5 bits of their 10 bit word a nickel.
\"Sextet\" would work also.

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

looks like manchester encoded one bit PWM

> is DC balanced, which SFP likes.

seems heavy on clock and light on data. I\'d call that a symbol.


Is there a better term for the code used to control WS2812 leds than
one bit PWM?
--
Jasen.

 

[Martin Brown]

On 03/08/2022 22:04, John Walliker wrote:

On Wednesday, 3 August 2022 at 21:52:50 UTC+1, Martin Brown wrote:
On 03/08/2022 21:09, Cydrome Leader wrote:
jla...@highlandsniptechnology.com wrote:
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

six bit word.
MIX - for the model 1009 Knuth polyunsaturated virtual computer used 6
bit bytes and 5 bytes to a word in TAOCP. It was partly intended to
break any algorithm that relied on things being a handy power of two.

I never had enough bookshelf space - or money at the time - for the complete
works of Knuth. I don\'t know how he managed to do so much!

You can always add more bookshelves...

My friend and I got Volume I Fundamental Algorithms as undergraduates
and worked through most of the problems including implementing a virtual
Mix machine. We even found a bug in the prime number test example and
sent it off hoping for 2^N dollars in return. It had already been
reported so we just got a nice postcard back from him instead.

Someone borrowed my copy of Seminumerical Algorithms and never gave it
back. I never did get to Sorting and Searching (my friend did).

LaTex markup language remains as one of the side effects of Knuth
finding no suitable markup language for such documents.

ISTR Roff on Unix or the IBM mainframe was the least unsuitable option
at the time and later something odd and nearly Wysiwyg (but not quite)
from Manchester University running on a Sirius PC as a word processor.

https://en.wikipedia.org/wiki/Sirius_Systems_Technology

--
Regards,
Martin Brown

 

[TTman]

On 03/08/2022 16:52, jlarkin@highlandsniptechnology.com wrote:

Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

A byte with 2 null bits...

--
This email has been checked for viruses by Avast antivirus software.
https://www.avast.com/antivirus

 

[John May]

On Thursday, August 4, 2022 at 11:16:11 AM UTC+1, Martin Brown wrote:

On 03/08/2022 22:04, John Walliker wrote:
On Wednesday, 3 August 2022 at 21:52:50 UTC+1, Martin Brown wrote:
On 03/08/2022 21:09, Cydrome Leader wrote:
jla...@highlandsniptechnology.com wrote:
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

six bit word.
MIX - for the model 1009 Knuth polyunsaturated virtual computer used 6
bit bytes and 5 bytes to a word in TAOCP. It was partly intended to
break any algorithm that relied on things being a handy power of two.

I never had enough bookshelf space - or money at the time - for the complete
works of Knuth. I don\'t know how he managed to do so much!
You can always add more bookshelves...

My friend and I got Volume I Fundamental Algorithms as undergraduates
and worked through most of the problems including implementing a virtual
Mix machine. We even found a bug in the prime number test example and
sent it off hoping for 2^N dollars in return. It had already been
reported so we just got a nice postcard back from him instead.

Someone borrowed my copy of Seminumerical Algorithms and never gave it
back. I never did get to Sorting and Searching (my friend did).

LaTex markup language remains as one of the side effects of Knuth
finding no suitable markup language for such documents.

ISTR Roff on Unix or the IBM mainframe was the least unsuitable option
at the time and later something odd and nearly Wysiwyg (but not quite)
from Manchester University running on a Sirius PC as a word processor.

https://en.wikipedia.org/wiki/Sirius_Systems_Technology

--
Regards,
Martin Brown

I think Leslie Lamport deserves a bit of a shout for LaTeX

I was quite attracted to Knuth\'s literate programming ideas for a while, but in multi programmer projects the approach was allways rejected.

 

[Jeroen Belleman]

Martin Brown wrote:

On 03/08/2022 22:04, John Walliker wrote:
On Wednesday, 3 August 2022 at 21:52:50 UTC+1, Martin Brown wrote:
On 03/08/2022 21:09, Cydrome Leader wrote:
jla...@highlandsniptechnology.com wrote:
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

six bit word.
MIX - for the model 1009 Knuth polyunsaturated virtual computer used 6
bit bytes and 5 bytes to a word in TAOCP. It was partly intended to
break any algorithm that relied on things being a handy power of two.

I never had enough bookshelf space - or money at the time - for the
complete
works of Knuth. I don\'t know how he managed to do so much!

You can always add more bookshelves...

My friend and I got Volume I Fundamental Algorithms as undergraduates
and worked through most of the problems including implementing a virtual
Mix machine. We even found a bug in the prime number test example and
sent it off hoping for 2^N dollars in return. It had already been
reported so we just got a nice postcard back from him instead.

Someone borrowed my copy of Seminumerical Algorithms and never gave it
back. I never did get to Sorting and Searching (my friend did).

LaTex markup language remains as one of the side effects of Knuth
finding no suitable markup language for such documents.

ISTR Roff on Unix or the IBM mainframe was the least unsuitable option
at the time and later something odd and nearly Wysiwyg (but not quite)
from Manchester University running on a Sirius PC as a word processor.

https://en.wikipedia.org/wiki/Sirius_Systems_Technology

You can\'t deny that LaTeX makes beautiful documents, and it will
never trash your source files, contrary to some other piece of
$oftware we all love to hate. It sure is weird though.

And don\'t believe the statement that you can concentrate on
contents and forget about the formatting. Still, it\'s my first
choice for slides and text documents, if the choice is mine.

Jeroen Belleman

 

[Dan Purgert]

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA512

Jeroen Belleman wrote:

Martin Brown wrote:
[...]
LaTex markup language remains as one of the side effects of Knuth
finding no suitable markup language for such documents.

You can\'t deny that LaTeX makes beautiful documents, and it will
never trash your source files, contrary to some other piece of
$oftware we all love to hate. It sure is weird though.

And don\'t believe the statement that you can concentrate on
contents and forget about the formatting. Still, it\'s my first
choice for slides and text documents, if the choice is mine.

For the most part, I find that statement to be true. That is not to say
there are never cases where I\'m looking at a page and shifting an image
or something around; but it always feels more like an aesthetic \"last
step\". On the other hand, WYSIWYG editors kind of force one to \"format\"
as they go, which can cause some headaches / loss of momentum in the
writing.


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|_|_|O| Github: https://github.com/dpurgert
|O|O|O| PGP: DDAB 23FB 19FA 7D85 1CC1 E067 6D65 70E5 4CE7 2860

 

[John Larkin]

On Thu, 4 Aug 2022 06:21:33 -0000 (UTC), Jasen Betts
<usenet@revmaps.no-ip.org> wrote:

On 2022-08-03, jlarkin@highlandsniptechnology.com <jlarkin@highlandsniptechnology.com> wrote:
Is a byte always 8 bits?

no, this is why internet standards use the term \"Octet\" instead

What can I call a 6-bit byte? A clump?

sixpence? Nintendo called 5 bits of their 10 bit word a nickel.
\"Sextet\" would work also.

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

looks like manchester encoded one bit PWM

Manchester is ambiguous. A string of 0s looks just like a string of
1s.

One of my guys, on his ferry ride, figured out how to add two bit
times

1 0 d \\d

to get a DC balanced form that is easy to generate and decode. It\'s
terrifyingly clever.

 

[Joe Gwinn]

On Wed, 03 Aug 2022 14:48:12 -0700, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

On Wed, 03 Aug 2022 16:32:53 -0400, Joe Gwinn <joegwinn@comcast.net
wrote:

On Wed, 03 Aug 2022 10:19:49 -0700, John Larkin
jlarkin@highland_atwork_technology.com> wrote:

On Wed, 03 Aug 2022 12:35:16 -0400, Joe Gwinn <joegwinn@comcast.net
wrote:

On Wed, 03 Aug 2022 08:52:08 -0700, jlarkin@highlandsniptechnology.com
wrote:

Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

It would still be a byte. Univac 1108, with 36-bit words.

A byte was always a fraction of a word, but the length of a word was
whatever the computer was designed for. All sizes were tried.

I\'ve worked on digital computers with the following word sizes (in
bits): 12, 16, 24, 32, 36, 48, 64.

There were just as many floating-point formats.

Now days, it has settled down, and words are multiples of 8 bits in
size, usually a power of two. And all FP is IEEE.

The standards folk came up with \"octet\" because byte was so
ill-defined.

Half an octet was sometimes called a nybble. And so on.


I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

If you use 8-bit patterns (best for component availability), but use
only the DC balanced subset, does that suffice?

We could do 8b10b, but that would need an FPGA to generate and
receive. I\'m thinking about a spare-time thing that I could design
without an FPGA or uP, all hardware. My digital people are swamped
with big projects and I need something fun to design.


Or, turn it around. Figure out how many DC-balanced patterns you
need, double it (for growth), and figure out long a word is needed.
Don\'t forget to include some control patterns.


The data is a 1-bit steam from a delta-sigma ADC. I just want to
transport it over fiber, and SFP is the easy way to do that. But SFP
is intended for telecom, ac coupled, intolerant of dc imbalance. Most
SFPs won\'t pass anything below about 1 MHz. But they are crazy fast
and have great AGC.

Is it 100 million bits per second, or symbols per second?

The ADUM7703 can be clocked up to 20 MHz, but we really don\'t need to
do that. 10M would be plenty.


What is being digitized? Voice? Data of some kind?

Some customer\'s analog voltage. Might be a strain gage load cell, for
example. We\'d have some input ranges.

All very low bandwidth stuff. Is it required to transmit absolute
values, or is just the \"AC\" part enough?

Sounds like for instance actual strain values are desired.

Is there a maximum latency and latency jitter requirement?

Neither, actually. I just want to transport the ADC output correctly.

OK.

One-bit delta samples are usually signed, so the minimum is two
symbols. If the voltage being sent is zero, then we\'ll get a steady
+,-,+,-,+, stream, which will have very strong RF spurs and thus
emissions, so need to break this up.

The ADC has a one-bit output over +-320 mV input, and averages 50%
duty cycle at 0 volts in. I just want to transport that bit over a
fiber link.

So the ADC output is a signed bit per sample.

A zero symbol makes it three, and an idle symbol, makes it four
symbols.


Gigabit Ethernet does something like this, only grander, with two
patterns for every possible symbol to be sent, and they track current
DC balance, and choose which pattern to use that will reduce the
running DC balance.

8b10b does elaborate long-term DC balancing like that. Too much work.

SFPs usually tolerate a little DC imbalance. You can send PWM at, say,
35% to 65%.

Yes, too much trouble. But if you use table lookup, you can get close
enough.

I don\'t want an FPGA or a uP in this box. All my coder-people are too
busy on other projects now. So, a few gates and flipflops.

OK. This too can be done, given a large ratio between optical bit
rate and ADC bitrate.

The AGC in the SFP is pretty fast, but the optical bitrate must be
much faster, or the AGC will flatten the desired signal. The SFP
datasheet should define the AGC response speed.

So, pick a convenient optical signaling (flash) rate well above the
AGC reaction speed, so you will be able to recover the sent pattern at
the SFP output.

Here is one possible design:

Choose a ADC sample rate a fraction of the optical rate. The fraction
is determined by choosing orthogonal codes to represent +1, zero, or
-1 ADC outputs to be sent. Also need a frame-start symbol.

The orthogonal codes are chosen from the standard Gold Codes:

..<https://en.wikipedia.org/wiki/Gold_code>

The codes have odd length, and are fairly close to balanced, so one
ought to be able to find some truncated Gold codes of even length
(drop last bit) that are exactly balanced. We need only four such
symbol codes, and a 16-bit code would allow the optical rate to be 16
times the code (ADC output) rate.

There must be a steady stream of ADC symbols, even if ADC output is
zero, to keep the SFP AGC stable.

Generation. Drive a 16-line demux with the optical clock. Make or
don\'t make connections from the demux to an adder, as dictated by the
symbol to be sent. The adder output is used to drive the SFP TX
input.

Reception. Lock a phase-lock loop to the optical flash rate, to
recover the optical clock.

Have one correlator per symbol type, all running in parallel. Given
the near-perfect correlation behavior of Gold codes, the correlator
output will be roughly one unit amplitude except at the pattern
center, where the peak will be about 16 units, so a threshold set at 8
units should enable perfect recovery.

The frame sync symbol is used if we are switching between a reference
voltage and the strain-gage output voltage, to mark where reference
starts. May need an ref-end symbol.

If no correlator peaks for more than a few symbol periods, complain.
The SFP will also tell you if any optical power is being received, if
I recall.

Design the receiver first, as it\'s usually the harder of the two, then
design the transmitter to make the receiver happy.


Joe Gwinn

 

[Clifford Heath]

On 4/8/22 20:26, John May wrote:
> I was quite attracted to Knuth\'s literate programming ideas for a while, but in multi programmer projects the approach was allways rejected.

The difficulty with literate programming is that you need to find
literate programmers.

Modern programming languages tend to assist the programmer to reveal
their intentions to a much greater degree that was e.g. the FORTRAN in
which Knuth wrote TeX.

But programmers still have to have a sense of which things might or
might not be already known or become apparent to another human - meaning
they need to see outside their own heads. That\'s not very common, and
even less so in more productive programmers.

 

[John Larkin]

On Thu, 04 Aug 2022 16:40:53 -0400, Joe Gwinn <joegwinn@comcast.net>
wrote:

On Wed, 03 Aug 2022 14:48:12 -0700, John Larkin
jlarkin@highland_atwork_technology.com> wrote:

On Wed, 03 Aug 2022 16:32:53 -0400, Joe Gwinn <joegwinn@comcast.net
wrote:

On Wed, 03 Aug 2022 10:19:49 -0700, John Larkin
jlarkin@highland_atwork_technology.com> wrote:

On Wed, 03 Aug 2022 12:35:16 -0400, Joe Gwinn <joegwinn@comcast.net
wrote:

On Wed, 03 Aug 2022 08:52:08 -0700, jlarkin@highlandsniptechnology.com
wrote:

Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

It would still be a byte. Univac 1108, with 36-bit words.

A byte was always a fraction of a word, but the length of a word was
whatever the computer was designed for. All sizes were tried.

I\'ve worked on digital computers with the following word sizes (in
bits): 12, 16, 24, 32, 36, 48, 64.

There were just as many floating-point formats.

Now days, it has settled down, and words are multiples of 8 bits in
size, usually a power of two. And all FP is IEEE.

The standards folk came up with \"octet\" because byte was so
ill-defined.

Half an octet was sometimes called a nybble. And so on.


I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

If you use 8-bit patterns (best for component availability), but use
only the DC balanced subset, does that suffice?

We could do 8b10b, but that would need an FPGA to generate and
receive. I\'m thinking about a spare-time thing that I could design
without an FPGA or uP, all hardware. My digital people are swamped
with big projects and I need something fun to design.


Or, turn it around. Figure out how many DC-balanced patterns you
need, double it (for growth), and figure out long a word is needed.
Don\'t forget to include some control patterns.


The data is a 1-bit steam from a delta-sigma ADC. I just want to
transport it over fiber, and SFP is the easy way to do that. But SFP
is intended for telecom, ac coupled, intolerant of dc imbalance. Most
SFPs won\'t pass anything below about 1 MHz. But they are crazy fast
and have great AGC.

Is it 100 million bits per second, or symbols per second?

The ADUM7703 can be clocked up to 20 MHz, but we really don\'t need to
do that. 10M would be plenty.


What is being digitized? Voice? Data of some kind?

Some customer\'s analog voltage. Might be a strain gage load cell, for
example. We\'d have some input ranges.

All very low bandwidth stuff. Is it required to transmit absolute
values, or is just the \"AC\" part enough?

Sounds like for instance actual strain values are desired.



Is there a maximum latency and latency jitter requirement?

Neither, actually. I just want to transport the ADC output correctly.

OK.



One-bit delta samples are usually signed, so the minimum is two
symbols. If the voltage being sent is zero, then we\'ll get a steady
+,-,+,-,+, stream, which will have very strong RF spurs and thus
emissions, so need to break this up.

The ADC has a one-bit output over +-320 mV input, and averages 50%
duty cycle at 0 volts in. I just want to transport that bit over a
fiber link.

So the ADC output is a signed bit per sample.

It\'s an ADUM7703 delta-sigma a/d converter; it doesn\'t actually sample
but runs its stuff continuously. It has a clock input and a single bit
logic output. The duty cycle of the output reports the analog input:
0% duty cycle is -320 mV and 100% is +320 mV. It\'s fully isolated and
crazy precise. Once we convey that logic level to a destination, we
\"decimate\" it into a 16 or 18 or 20 bit value that reflects the input
voltage. The decimation is typically digital, a sinc3 filter, but I
might do it all analog in this case. Decimation becomes a lowpass
filter.

A zero symbol makes it three, and an idle symbol, makes it four
symbols.


Gigabit Ethernet does something like this, only grander, with two
patterns for every possible symbol to be sent, and they track current
DC balance, and choose which pattern to use that will reduce the
running DC balance.

8b10b does elaborate long-term DC balancing like that. Too much work.

SFPs usually tolerate a little DC imbalance. You can send PWM at, say,
35% to 65%.

Yes, too much trouble. But if you use table lookup, you can get close
enough.

I don\'t want an FPGA or a uP in this box. All my coder-people are too
busy on other projects now. So, a few gates and flipflops.

OK. This too can be done, given a large ratio between optical bit
rate and ADC bitrate.

The AGC in the SFP is pretty fast, but the optical bitrate must be
much faster, or the AGC will flatten the desired signal. The SFP
datasheet should define the AGC response speed.

The combination of AGC and AC coupling makes SFPs not work well at
data rates below about 1 MHz. That varies a lot with specific parts.

So, pick a convenient optical signaling (flash) rate well above the
AGC reaction speed, so you will be able to recover the sent pattern at
the SFP output.

Here is one possible design:

Choose a ADC sample rate a fraction of the optical rate. The fraction
is determined by choosing orthogonal codes to represent +1, zero, or
-1 ADC outputs to be sent. Also need a frame-start symbol.

The orthogonal codes are chosen from the standard Gold Codes:

.<https://en.wikipedia.org/wiki/Gold_code

The codes have odd length, and are fairly close to balanced, so one
ought to be able to find some truncated Gold codes of even length
(drop last bit) that are exactly balanced. We need only four such
symbol codes, and a 16-bit code would allow the optical rate to be 16
times the code (ADC output) rate.

There must be a steady stream of ADC symbols, even if ADC output is
zero, to keep the SFP AGC stable.

Generation. Drive a 16-line demux with the optical clock. Make or
don\'t make connections from the demux to an adder, as dictated by the
symbol to be sent. The adder output is used to drive the SFP TX
input.

Reception. Lock a phase-lock loop to the optical flash rate, to
recover the optical clock.

Have one correlator per symbol type, all running in parallel. Given
the near-perfect correlation behavior of Gold codes, the correlator
output will be roughly one unit amplitude except at the pattern
center, where the peak will be about 16 units, so a threshold set at 8
units should enable perfect recovery.

The frame sync symbol is used if we are switching between a reference
voltage and the strain-gage output voltage, to mark where reference
starts. May need an ref-end symbol.

If no correlator peaks for more than a few symbol periods, complain.
The SFP will also tell you if any optical power is being received, if
I recall.

Design the receiver first, as it\'s usually the harder of the two, then
design the transmitter to make the receiver happy.

It\'s really simple; just move the 1-bit logic level output of the ADC
to the destination and recover a clock to know where the bits are.
We\'d clock the ADC at 20 or maybe 10 MHz.

 

[John S]

On 8/3/2022 4:29 PM, John Larkin wrote:

On Wed, 3 Aug 2022 14:28:30 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Wed, 3 Aug 2022 12:03:11 -0400 (EDT), Martin Rid
martin_riddle@verison.net> wrote:

jlarkin@highlandsniptechnology.com Wrote in message:r
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?I want to send data over an SFP optical link, in 6-bit things. 0 1 1 0 d \\d repeated, roughly 100 Mbits/secis DC balanced, which SFP likes.

I would still consider it a byte, but sixbit.
You could always call it braille.

Cheers

Maybe \"frame\" sounds better than \"clump.\"



Or \'clod\'. Alternatives abound.

I\'d go with sextet (or sestet, if you\'re feeling poetic).

Cheers

Phil Hobbs

Now one of my guys claims that all we need is

1 0 d1 \\d1 1 0 d2 \\d2 .... etc

four bits per chunk to recover data d. Which is a nibble. I can still
call each 4 bits a frame.

4 bit is a nybble. Or a dollar.

I hate it when people are smarter than I am.

 

[Phil Hobbs]

John S wrote:

On 8/3/2022 4:29 PM, John Larkin wrote:
On Wed, 3 Aug 2022 14:28:30 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Wed, 3 Aug 2022 12:03:11 -0400 (EDT), Martin Rid
martin_riddle@verison.net> wrote:

jlarkin@highlandsniptechnology.com Wrote in message:r
Is a byte always 8 bits? What can I call a 6-bit byte? A clump?I
want to send data over an SFP optical link, in 6-bit things.   0 1
1 0 d \\d   repeated, roughly 100 Mbits/secis DC balanced, which
SFP likes.

I would still consider it a byte, but sixbit.
You could always call it braille.

Cheers

Maybe \"frame\" sounds better than \"clump.\"



Or \'clod\'.   Alternatives abound.

I\'d go with sextet (or sestet, if you\'re feeling poetic).

Cheers

Phil Hobbs

Now one of my guys claims that all we need is

1 0 d1 \\d1 1 0 d2 \\d2 .... etc

four bits per chunk to recover data d. Which is a nibble. I can still
call each 4 bits a frame.


4 bit is a nybble. Or a dollar.

Nah, two bits is a quarter, so 8 bits is a dollar.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Joe Gwinn]

On Thu, 04 Aug 2022 16:40:43 -0700, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

On Thu, 04 Aug 2022 16:40:53 -0400, Joe Gwinn <joegwinn@comcast.net
wrote:

On Wed, 03 Aug 2022 14:48:12 -0700, John Larkin
jlarkin@highland_atwork_technology.com> wrote:

On Wed, 03 Aug 2022 16:32:53 -0400, Joe Gwinn <joegwinn@comcast.net
wrote:

On Wed, 03 Aug 2022 10:19:49 -0700, John Larkin
jlarkin@highland_atwork_technology.com> wrote:

On Wed, 03 Aug 2022 12:35:16 -0400, Joe Gwinn <joegwinn@comcast.net
wrote:

On Wed, 03 Aug 2022 08:52:08 -0700, jlarkin@highlandsniptechnology.com
wrote:

Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

It would still be a byte. Univac 1108, with 36-bit words.

A byte was always a fraction of a word, but the length of a word was
whatever the computer was designed for. All sizes were tried.

I\'ve worked on digital computers with the following word sizes (in
bits): 12, 16, 24, 32, 36, 48, 64.

There were just as many floating-point formats.

Now days, it has settled down, and words are multiples of 8 bits in
size, usually a power of two. And all FP is IEEE.

The standards folk came up with \"octet\" because byte was so
ill-defined.

Half an octet was sometimes called a nybble. And so on.


I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

If you use 8-bit patterns (best for component availability), but use
only the DC balanced subset, does that suffice?

We could do 8b10b, but that would need an FPGA to generate and
receive. I\'m thinking about a spare-time thing that I could design
without an FPGA or uP, all hardware. My digital people are swamped
with big projects and I need something fun to design.


Or, turn it around. Figure out how many DC-balanced patterns you
need, double it (for growth), and figure out long a word is needed.
Don\'t forget to include some control patterns.


The data is a 1-bit steam from a delta-sigma ADC. I just want to
transport it over fiber, and SFP is the easy way to do that. But SFP
is intended for telecom, ac coupled, intolerant of dc imbalance. Most
SFPs won\'t pass anything below about 1 MHz. But they are crazy fast
and have great AGC.

Is it 100 million bits per second, or symbols per second?

The ADUM7703 can be clocked up to 20 MHz, but we really don\'t need to
do that. 10M would be plenty.


What is being digitized? Voice? Data of some kind?

Some customer\'s analog voltage. Might be a strain gage load cell, for
example. We\'d have some input ranges.

All very low bandwidth stuff. Is it required to transmit absolute
values, or is just the \"AC\" part enough?

Sounds like for instance actual strain values are desired.



Is there a maximum latency and latency jitter requirement?

Neither, actually. I just want to transport the ADC output correctly.

OK.



One-bit delta samples are usually signed, so the minimum is two
symbols. If the voltage being sent is zero, then we\'ll get a steady
+,-,+,-,+, stream, which will have very strong RF spurs and thus
emissions, so need to break this up.

The ADC has a one-bit output over +-320 mV input, and averages 50%
duty cycle at 0 volts in. I just want to transport that bit over a
fiber link.

So the ADC output is a signed bit per sample.

It\'s an ADUM7703 delta-sigma a/d converter; it doesn\'t actually sample
but runs its stuff continuously. It has a clock input and a single bit
logic output. The duty cycle of the output reports the analog input:
0% duty cycle is -320 mV and 100% is +320 mV. It\'s fully isolated and
crazy precise. Once we convey that logic level to a destination, we
\"decimate\" it into a 16 or 18 or 20 bit value that reflects the input
voltage. The decimation is typically digital, a sinc3 filter, but I
might do it all analog in this case. Decimation becomes a lowpass
filter.

The fact that the ADUM7703 is clocked implies that is samples on the
clock. Otherwise, why require a clock input? Datasheet page 4 shows
the relationship.

More at end.

A zero symbol makes it three, and an idle symbol, makes it four
symbols.


Gigabit Ethernet does something like this, only grander, with two
patterns for every possible symbol to be sent, and they track current
DC balance, and choose which pattern to use that will reduce the
running DC balance.

8b10b does elaborate long-term DC balancing like that. Too much work.

SFPs usually tolerate a little DC imbalance. You can send PWM at, say,
35% to 65%.

Yes, too much trouble. But if you use table lookup, you can get close
enough.

I don\'t want an FPGA or a uP in this box. All my coder-people are too
busy on other projects now. So, a few gates and flipflops.

OK. This too can be done, given a large ratio between optical bit
rate and ADC bitrate.

The AGC in the SFP is pretty fast, but the optical bitrate must be
much faster, or the AGC will flatten the desired signal. The SFP
datasheet should define the AGC response speed.

The combination of AGC and AC coupling makes SFPs not work well at
data rates below about 1 MHz. That varies a lot with specific parts.


So, pick a convenient optical signaling (flash) rate well above the
AGC reaction speed, so you will be able to recover the sent pattern at
the SFP output.

Here is one possible design:

Choose a ADC sample rate a fraction of the optical rate. The fraction
is determined by choosing orthogonal codes to represent +1, zero, or
-1 ADC outputs to be sent. Also need a frame-start symbol.

The orthogonal codes are chosen from the standard Gold Codes:

.<https://en.wikipedia.org/wiki/Gold_code

The codes have odd length, and are fairly close to balanced, so one
ought to be able to find some truncated Gold codes of even length
(drop last bit) that are exactly balanced. We need only four such
symbol codes, and a 16-bit code would allow the optical rate to be 16
times the code (ADC output) rate.

There must be a steady stream of ADC symbols, even if ADC output is
zero, to keep the SFP AGC stable.

Generation. Drive a 16-line demux with the optical clock. Make or
don\'t make connections from the demux to an adder, as dictated by the
symbol to be sent. The adder output is used to drive the SFP TX
input.

Reception. Lock a phase-lock loop to the optical flash rate, to
recover the optical clock.

Have one correlator per symbol type, all running in parallel. Given
the near-perfect correlation behavior of Gold codes, the correlator
output will be roughly one unit amplitude except at the pattern
center, where the peak will be about 16 units, so a threshold set at 8
units should enable perfect recovery.

The frame sync symbol is used if we are switching between a reference
voltage and the strain-gage output voltage, to mark where reference
starts. May need an ref-end symbol.

If no correlator peaks for more than a few symbol periods, complain.
The SFP will also tell you if any optical power is being received, if
I recall.

Design the receiver first, as it\'s usually the harder of the two, then
design the transmitter to make the receiver happy.

It\'s really simple; just move the 1-bit logic level output of the ADC
to the destination and recover a clock to know where the bits are.
We\'d clock the ADC at 20 or maybe 10 MHz.

If I\'m understanding the timing diagram on datasheet page 4, one can
have a long string of ones, or of zeros, depending on the input analog
voltage, which has fairly low bandwidth and so can linger at a voltage
for very long durations.

It\'s these long rafts of ones or zeros that I worry will baffle the
SFP\'s AGC function, causing data-dependent link failures.

What make and model of SFP are you looking at?


But one could use two Gold-code symbols, encoding MDATA one and MDATA
zero, and a pair of correlators at the other end of the fiber-optic
link to recover the original MDATA stream.

And, optical SNR matters. If the minimum SNR is high, the tolerance
for non-zero DC balance, is increased. What is the maximum optical
cable length contemplated?


Joe Gwinn

 

[server]

On Wed, 03 Aug 2022 08:52:08 -0700, jlarkin@highlandsniptechnology.com
wrote:

Is a byte always 8 bits? What can I call a 6-bit byte? A clump?

I want to send data over an SFP optical link, in 6-bit things.

0 1 1 0 d \\d repeated, roughly 100 Mbits/sec

is DC balanced, which SFP likes.

Since you are transferring only a single (net) bit, why are you
worrying about the names of the actual frame bits ?

Compare to the situation with asynchronous serial communication. A
UART can usually transfer 5-8 (some up to 14) net data bits, but in
addition to this, the start bit is added, an optional parity bit and
0, 1, 1.5 or 2 stop bits are added, producing a 75 to 16 bit
transmitted frame. You really rarely have to worry about the total
frame size (except for some RS-485 converters).