Xilinx ParallelCable IV vs. Linux

[Neil Glenn Jacobson]

Stephen Williams wrote:

Neil Glenn Jacobson wrote:

Stephen Williams wrote:


Even if this is iMPACT bundled with ISE *6.1i*? I was under the
impression (based on APP notes and the like) that under Linux,
iMPACT starts supporing the PCIV cable at ISE 6.2. Certainly, when
I start impact, the radio button for Parallel Cable IV is grayed
out. Are you saying that when the cable arrives, I'll be able to
plug it in, install the Linux driver, and un-gray the selection?



You know sometimes I wonder just how awake I am...
Yes, Linux usage of the parallel cable was first supported in 6.2i
thus all statements about Xilinx application support refer to release
6.2i and later.
This means that if you are unable to upgrade to 6.2i or later and need
to use the parallel cable and Linux then you are stuck.
The (slower) MultiLINX cable is your only download option on Linux
previous to 6.2i


I use ISE Foundation in support of my Icarus Verilog work. I use
it to make sure Icarus Verilog simulations can support the various
libraries shipped with Xilinx products, and I also use the back end
tools to help me validate the FPGA code generator. (I generate EDIF
files that I feed to map/par and FPGAEdit.)

I have various Xilinx based boards that are a product of day-job,
and also a few other demo boards that people are likely to use while
playing with Icarus Verilog. (A Digilent board, a Wallace JTAG board,
an in-house PPC based board, another in-house board w/ Virtex and ACE...)

Since this is a open source (read: GPL, free) project, I can't really
afford the $2000+ of ISE. In fact, my current ISE 6.1i is a generous
contribution from your employer.

So yes, I'm stuck. But it's not holding me up.


Ooops. I forgot. Xilinx does not release a LInux version of WebPACK.

Nix that previous message.

 

[Sietse Achterop]

Neil Glenn Jacobson wrote:

Stephen Williams wrote:

Neil Glenn Jacobson wrote:


Ooops. I forgot. Xilinx does not release a LInux version of WebPACK.
Nix that previous message.

But could the windows version using wine be used here?
Can the linuxdrivers be used of are they only for the native Linux version of ISE?

I recently bought a Spartan-3 board from NuHorizons in the hope to use
it using WebPACK under wine on Linux.

Regards,
Sietse Achterop
Computing Science department
University of Groningen
The Netherlands

 

[Phil Tomson]

In article <car9vf$tp5$1@nobel.pacific.net.sg>,
Rudolf Usselmann <russelmann@hotmail.com> wrote:

Stephen Williams wrote:


Does anybody know if the Xilinx Paralel cable IV cable can
be made to work under Linux w/ ISE 6.1i.03? And to make it
even more interesting, my Linux is AMD64, will the driver work
at all on this system?


.... and while we're on the subject, the Linux driver source is
itself is pretty basic. Is there programming informatino for the
cable that one can use to write custom software to drive the
device.


Stephen,

not sure if this will help:

I have faced the same problem - not being able to program
Xilinx Devices using Xilinx Software and Xilinx hardware
under linux. So I wrote a small dumb program that can take
a bit stream and directly upload it to an FPGA.

You can find it here: http://www.asics.ws/tools/ljp.c.gz

This works with both Parallel Cable 3 and 4.

Has anyone tried this program with the $99 Xilinx eval board?

Phil

 

[Sietse Achterop]

Phil Tomson wrote:

You can find it here: http://www.asics.ws/tools/ljp.c.gz

This works with both Parallel Cable 3 and 4.

Has anyone tried this program with the $99 Xilinx eval board?

Hello,

I am trying it on the Spartan-3 board of NuHorizon.
This board has, next to the spartan-3chip, a configuration device in the Jtag-chain
so you have to put that one in BYPASS mode, with an 8-bit command.

The ljp.c program doesn't work, firstly because it is for Virtex that have
5 bit jtag-commands, while the spartan-3 has 6 bit commands, as described in
the BSDL-file.

But alas after changing this, the ID-codes can be read properly, and bypass does also
work. But programming doesnt. Both chip's are revision 0 by the way.
The spartan-3 datasheet (part 3: page 38, figure 24) describes some details of how to
program it. But that doesnt help me any further.
As an aside, I make the bitfile with the option "-g StartUpClk:JtagClk" as is mentioned
by the Impact program and in the documentation.

The question is, does the spartan-3 specify the programming in it's datasheet, or is
there some vital part of the specifation missing from the datasheet.
The ljp program follows this, and I tried a lot of variants, also looking in xapp139.pdf about
virtex programming.

If the datasheet is telling the full story it should be fairly trivial to make it work, so I
am afraid I'm missing something, but what?

cheers,
Sietse Achterop


PS. I also tried my luck with the "mitoujtag" program, but I can't get the giveio.sys to function
under wine. Does anyone know how to do this?