Which university produces good analog EEs?

[John Larkin]

On Thu, 04 Oct 2007 18:13:40 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote:

On Wed, 03 Oct 2007 21:10:36 -0700, John Larkin
jjlarkin@highNOTlandTHIStechnologyPART.com> wrote:

[snip]

I had my head MRI'd earlier this year (spare me the predictable
witticisms, guys) and it was noisy and mostly boring. It's the
gradient coils that make the noise.

John

Actually I did also, about two years ago... trying to find a cause for
chronic sinus infections. Nothing found there ;-)

...Jim Thompson

Well, those bacteria don't image very well.

One of my users does MRI micro-imaging, and they *can* resolve
bacteria. But that doesn't (yet) work inside a human body, which is
too big and too wiggly for that sort of resolution.

But imagine, some day, a non-invasive way to scan your body at truly
microscopic resolution; pathology without surgery.

John

 

[John Larkin]

On Thu, 4 Oct 2007 20:36:08 -0400, krw <krw@att.bizzzz> wrote:

In article <1c9Ni.5861$6p6.4832@newssvr25.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...
miso@sushi.com wrote:

[...]


Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.


I certainly would not say "vast". Many times I have pondered the use of
a uC in a design only to come to the conclusion that 50c is still too
expensive. It's amazing how cheap "poor-man's logic" can be.

You must have very small problems. I've never had one of those. ;-)
The project I'm working on now is in a pair of XC2V-6000s (my part)
and a couple of huge (don't know the model) Virtex-4s. I think I'm
only going to fill 5% of it (and fewer I/Os), but...

What's the most expensive FPGA you buy?

Seriously, I think you're only looking at a small niche. I do believe
uCs are the right solution for the vast majority. ...even the
birthday card I got has one in it. :-/

It's fun, now and then, to design for flat-out performance, and damn
the cost.

The problem with using a uP in such projects is if you are designing a
chip, you need to know how to do it with gates as often that is the
smallest and lowest power solution. The ability to hand craft logic is
disappearing rapidly, but is very much needed in mixed mode chips
which are not done on fine geometry processes.


It sure is disappearing, just like analog skills seem to be almost gone
in fresh grad.

I've ripped out many uC solutions for reliability and cost reasons. Same
for PALs/GALs because that's the era back in the late 80's when
mixed/discrete design skills began to tank. The topper was a system
where I ripped out so many (plus went to 100% AC terminations) that the
power supply kept tripping off and one of them blew. We had managed to
get underneath the minimum load. IIRC the PALs was guzzling 30-40mA just
sitting there. Each.

What's the old saying? If they only learn how to use a hammer every
problem will begin to look like a nail. Heck, I've seen one-shots being
done with a uC. That almost made me sick.

One shots make me sick too. ;-)/2

What? Another case of asynchrophobia?

John

 

[Rich Grise]

On Fri, 05 Oct 2007 10:44:27 -0700, John Larkin wrote:

On Thu, 04 Oct 2007 18:13:40 -0700, Jim Thompson
On Wed, 03 Oct 2007 21:10:36 -0700, John Larkin
[snip]

I had my head MRI'd earlier this year (spare me the predictable
witticisms, guys) and it was noisy and mostly boring. It's the
gradient coils that make the noise.

Actually I did also, about two years ago... trying to find a cause for
chronic sinus infections. Nothing found there ;-)

Well, those bacteria don't image very well.

One of my users does MRI micro-imaging, and they *can* resolve
bacteria. But that doesn't (yet) work inside a human body, which is
too big and too wiggly for that sort of resolution.

But imagine, some day, a non-invasive way to scan your body at truly
microscopic resolution; pathology without surgery.

They've been doing this in sci-fi for decades. They have one on the
Enterprise, there was one on the Nostromo, etc.

What if you could scan to an atomic level, transmit the data to a
remote location, and build an identical copy? Would there be two
of you? Or if they wake up the guy at the destination, is that
where you'd wake up? [1]

Then, of course, you have the dilemma of the source passenger...

Cheers!
Rich
[1] I know, it's impossible to simultaneously measure the position
and motion of anything, thanks to Mr. Heisenberg. ;-)

 

[Tim Williams]

"Jim Thompson" <To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote in
message news:4hkcg3l7b7ljf86j4kgms3gdmehii1jpp9@4ax.com...

Of course not.... People of your party have little substance.

Why are leftist weenies such jerks?

Because you're such a jerk. They're just jerking back.

Tim

--
Deep Fryer: A very philosophical monk.
Website @ http://webpages.charter.net/dawill/tmoranwms

 

[Joerg]

John Larkin wrote:

On Thu, 4 Oct 2007 20:36:08 -0400, krw <krw@att.bizzzz> wrote:


In article <1c9Ni.5861$6p6.4832@newssvr25.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

miso@sushi.com wrote:

[...]


Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.


I certainly would not say "vast". Many times I have pondered the use of
a uC in a design only to come to the conclusion that 50c is still too
expensive. It's amazing how cheap "poor-man's logic" can be.

You must have very small problems. I've never had one of those. ;-)
The project I'm working on now is in a pair of XC2V-6000s (my part)
and a couple of huge (don't know the model) Virtex-4s. I think I'm
only going to fill 5% of it (and fewer I/Os), but...


What's the most expensive FPGA you buy?

Seems every year they come out with a new fat cat FPGA that almost has
to be delivered with a Brinks truck. Plus a 2nd mortgage for the new
design suite because, of course, the last release from eight months ago
is now totally outdated and obsolete.

Seriously, I think you're only looking at a small niche. I do believe
uCs are the right solution for the vast majority. ...even the
birthday card I got has one in it. :-/


It's fun, now and then, to design for flat-out performance, and damn
the cost.

I get to do that about once per decade. But for me the real fun begins
when the client says "Nice. Now, can you do this for under seven bucks
fifty?"

The problem with using a uP in such projects is if you are designing a
chip, you need to know how to do it with gates as often that is the
smallest and lowest power solution. The ability to hand craft logic is
disappearing rapidly, but is very much needed in mixed mode chips
which are not done on fine geometry processes.


It sure is disappearing, just like analog skills seem to be almost gone
in fresh grad.

I've ripped out many uC solutions for reliability and cost reasons. Same
for PALs/GALs because that's the era back in the late 80's when
mixed/discrete design skills began to tank. The topper was a system
where I ripped out so many (plus went to 100% AC terminations) that the
power supply kept tripping off and one of them blew. We had managed to
get underneath the minimum load. IIRC the PALs was guzzling 30-40mA just
sitting there. Each.

What's the old saying? If they only learn how to use a hammer every
problem will begin to look like a nail. Heck, I've seen one-shots being
done with a uC. That almost made me sick.

One shots make me sick too. ;-)/2


What? Another case of asynchrophobia?

ROFL!

--
Regards, Joerg

http://www.analogconsultants.com

 

[Spehro Pefhany]

On Thu, 04 Oct 2007 17:14:37 GMT, the renowned Joerg
<notthisjoergsch@removethispacbell.net> wrote:

What's the old saying? If they only learn how to use a hammer every
problem will begin to look like a nail. Heck, I've seen one-shots being
done with a uC. That almost made me sick.

It makes me sick to see a trimpot used where one could use a cheap
micro with a *calibrated* RC oscillator on-chip and get 2-3%
guaranteed accuracy over temperature. The extra gates are just to make
this on-chip *analog* oscillator do what you want. ;-)



Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com

 

[Joerg]

Spehro Pefhany wrote:

On Thu, 04 Oct 2007 17:14:37 GMT, the renowned Joerg
notthisjoergsch@removethispacbell.net> wrote:


What's the old saying? If they only learn how to use a hammer every
problem will begin to look like a nail. Heck, I've seen one-shots being
done with a uC. That almost made me sick.


It makes me sick to see a trimpot used where one could use a cheap
micro with a *calibrated* RC oscillator on-chip and get 2-3%
guaranteed accuracy over temperature. The extra gates are just to make
this on-chip *analog* oscillator do what you want. ;-)

No trimpots in my designs. At least not in the last 20+ years. Watch
crystals and resonators are dirt cheap and the 4060 is, too. For faster
stuff I often use NTSC color carrier crystals but I guess that party is
going to be over when the US goes digital. Not looking forward to that.
Darn, I though it'd last until I retire.

--
Regards, Joerg

http://www.analogconsultants.com

 

[krw]

In article <f5yNi.73$y9.64@newsfe06.lga>, tmoranwms@gmail.com says...

"Jim Thompson" <To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote in
message news:4hkcg3l7b7ljf86j4kgms3gdmehii1jpp9@4ax.com...
Of course not.... People of your party have little substance.

Why are leftist weenies such jerks?

Because you're such a jerk. They're just jerking back.

Yep, when Jim gets a nibble on the line he jerks to set the hook.
You weenies jerk back, running with the hook, line, and sinker.
....so predictable.

--
Keith

 

[krw]

In article <KqrNi.770$lE2.614@newssvr22.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

krw wrote:

In article <1c9Ni.5861$6p6.4832@newssvr25.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

miso@sushi.com wrote:

[...]


Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.


I certainly would not say "vast". Many times I have pondered the use of
a uC in a design only to come to the conclusion that 50c is still too
expensive. It's amazing how cheap "poor-man's logic" can be.


You must have very small problems. I've never had one of those. ;-)
The project I'm working on now is in a pair of XC2V-6000s (my part)
and a couple of huge (don't know the model) Virtex-4s. I think I'm
only going to fill 5% of it (and fewer I/Os), but...


Well, if the sky is the limit in terms of cost ...

Most of my jobs have been that way[*]. Thinking back, I can't
remember one where the parts cost was in the top three engineering
problems (schedule was usually #1). The engineering costs always
swamped the production costs (or were pretty much fixed, as in the
case of the processors). Thinking harder, I take that back, there
was one project where cost was a huge driver (a series of encrypting
LAN adapters), but that project was canceled due to lack of interest.

[*]One engineer in the group spec'ed a LF156 up to $50ea., thirty
years ago. I'm not quite that bad. I was using stock LF356s for
similar work at the time.

Seriously, I think you're only looking at a small niche. I do believe
uCs are the right solution for the vast majority. ...even the
birthday card I got has one in it. :-/


Ok, Chinese 4-bit micros exempted. Those can be had under 10c. But the
programmers should master Mandarin.

Manderin in 4-bits? ;-)

The problem with using a uP in such projects is if you are designing a
chip, you need to know how to do it with gates as often that is the
smallest and lowest power solution. The ability to hand craft logic is
disappearing rapidly, but is very much needed in mixed mode chips
which are not done on fine geometry processes.


It sure is disappearing, just like analog skills seem to be almost gone
in fresh grad.

I've ripped out many uC solutions for reliability and cost reasons. Same
for PALs/GALs because that's the era back in the late 80's when
mixed/discrete design skills began to tank. The topper was a system
where I ripped out so many (plus went to 100% AC terminations) that the
power supply kept tripping off and one of them blew. We had managed to
get underneath the minimum load. IIRC the PALs was guzzling 30-40mA just
sitting there. Each.

What's the old saying? If they only learn how to use a hammer every
problem will begin to look like a nail. Heck, I've seen one-shots being
done with a uC. That almost made me sick.


One shots make me sick too. ;-)/2


I don't use them, I use 74HC14 or CD40106 sections. Even as PWM chips.

Did that once. My copy of the databook for a 87C51 didn't have the
paragraph saying that an interrupt had to be asserted, then
deasserted to bring the processor out of sleep. I had no room left
on the card and a couple of spare sections of 74HCXX stuff laying
around.

--
Keith

 

[Joel Kolstad]

"Joerg" <notthisjoergsch@removethispacbell.net> wrote in message
news:0YRNi.6882$6p6.5727@newssvr25.news.prodigy.net...

For faster stuff I often use NTSC color carrier crystals but I guess that
party is going to be over when the US goes digital.

The party just moved to other frequencies, such as 12.8MHz which is used in a
bazillion PLL-based RF synthesizers in cell phones. AFAIK, it's about the
cheapest way to get a 2.5PPM crystal (in small quantities).

Darn, I though it'd last until I retire.

I suspect that the likes of All Electronics will have them for at least
another decade. When are you retiring?

---Joel

 

[krw]

In article <a2ucg35u48ig1q4kj8s061tki8cnihu41t@4ax.com>,
jjlarkin@highNOTlandTHIStechnologyPART.com says...

On Thu, 4 Oct 2007 20:36:08 -0400, krw <krw@att.bizzzz> wrote:

In article <1c9Ni.5861$6p6.4832@newssvr25.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...
miso@sushi.com wrote:

[...]


Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.


I certainly would not say "vast". Many times I have pondered the use of
a uC in a design only to come to the conclusion that 50c is still too
expensive. It's amazing how cheap "poor-man's logic" can be.

You must have very small problems. I've never had one of those. ;-)
The project I'm working on now is in a pair of XC2V-6000s (my part)
and a couple of huge (don't know the model) Virtex-4s. I think I'm
only going to fill 5% of it (and fewer I/Os), but...

What's the most expensive FPGA you buy?

The most expensive I personally spec'ed was an SCX600E in, IIRC '99,
while they the Virtex-E family were still engineering prototypes.
They were $1200ea. As expensive as those things were, I had far more
invested in software to program them than the chips themselves.
Performance was an issue on that project.

I'm pretty sure the things I'm working on now are quite a bit more
than that; 10x the size, twice the pins, and rated for UncleS.

Seriously, I think you're only looking at a small niche. I do believe
uCs are the right solution for the vast majority. ...even the
birthday card I got has one in it. :-/

It's fun, now and then, to design for flat-out performance, and damn
the cost.

Often I've had projects where performance wasn't even the real issue.
Like I said, cost rarely, if ever, was.

The problem with using a uP in such projects is if you are designing a
chip, you need to know how to do it with gates as often that is the
smallest and lowest power solution. The ability to hand craft logic is
disappearing rapidly, but is very much needed in mixed mode chips
which are not done on fine geometry processes.


It sure is disappearing, just like analog skills seem to be almost gone
in fresh grad.

I've ripped out many uC solutions for reliability and cost reasons. Same
for PALs/GALs because that's the era back in the late 80's when
mixed/discrete design skills began to tank. The topper was a system
where I ripped out so many (plus went to 100% AC terminations) that the
power supply kept tripping off and one of them blew. We had managed to
get underneath the minimum load. IIRC the PALs was guzzling 30-40mA just
sitting there. Each.

What's the old saying? If they only learn how to use a hammer every
problem will begin to look like a nail. Heck, I've seen one-shots being
done with a uC. That almost made me sick.

One shots make me sick too. ;-)/2

What? Another case of asynchrophobia?

More acousticophobia, but I'm not a NASCAR fan either. They go off
in weeds. I don't like it when my designs do. It usually causes
long weeks (though I've been pulling 60hr weeks for a month or so).

--
Keith

 

[Spehro Pefhany]

On Sat, 6 Oct 2007 17:31:54 -0400, the renowned krw <krw@att.bizzzz>
wrote:

In article <KqrNi.770$lE2.614@newssvr22.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...
krw wrote:

In article <1c9Ni.5861$6p6.4832@newssvr25.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

miso@sushi.com wrote:

[...]


Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.


I certainly would not say "vast". Many times I have pondered the use of
a uC in a design only to come to the conclusion that 50c is still too
expensive. It's amazing how cheap "poor-man's logic" can be.


You must have very small problems. I've never had one of those. ;-)
The project I'm working on now is in a pair of XC2V-6000s (my part)
and a couple of huge (don't know the model) Virtex-4s. I think I'm
only going to fill 5% of it (and fewer I/Os), but...


Well, if the sky is the limit in terms of cost ...

Most of my jobs have been that way[*]. Thinking back, I can't
remember one where the parts cost was in the top three engineering
problems (schedule was usually #1). The engineering costs always
swamped the production costs (or were pretty much fixed, as in the
case of the processors). Thinking harder, I take that back, there
was one project where cost was a huge driver (a series of encrypting
LAN adapters), but that project was canceled due to lack of interest.

[*]One engineer in the group spec'ed a LF156 up to $50ea., thirty
years ago. I'm not quite that bad. I was using stock LF356s for
similar work at the time.

Seriously, I think you're only looking at a small niche. I do believe
uCs are the right solution for the vast majority. ...even the
birthday card I got has one in it. :-/


Ok, Chinese 4-bit micros exempted. Those can be had under 10c. But the
programmers should master Mandarin.

Manderin in 4-bits? ;-)

The 4-bit ones should cost 50 cents, right?

Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com

 

[krw]

In article <ct8gg31smmqeras17c73rjoddcgak6m5pd@4ax.com>,
speffSNIP@interlogDOTyou.knowwhat says...

On Sat, 6 Oct 2007 17:31:54 -0400, the renowned krw <krw@att.bizzzz
wrote:

In article <KqrNi.770$lE2.614@newssvr22.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...
krw wrote:

In article <1c9Ni.5861$6p6.4832@newssvr25.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

miso@sushi.com wrote:

[...]


Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.


I certainly would not say "vast". Many times I have pondered the use of
a uC in a design only to come to the conclusion that 50c is still too
expensive. It's amazing how cheap "poor-man's logic" can be.


You must have very small problems. I've never had one of those. ;-)
The project I'm working on now is in a pair of XC2V-6000s (my part)
and a couple of huge (don't know the model) Virtex-4s. I think I'm
only going to fill 5% of it (and fewer I/Os), but...


Well, if the sky is the limit in terms of cost ...

Most of my jobs have been that way[*]. Thinking back, I can't
remember one where the parts cost was in the top three engineering
problems (schedule was usually #1). The engineering costs always
swamped the production costs (or were pretty much fixed, as in the
case of the processors). Thinking harder, I take that back, there
was one project where cost was a huge driver (a series of encrypting
LAN adapters), but that project was canceled due to lack of interest.

[*]One engineer in the group spec'ed a LF156 up to $50ea., thirty
years ago. I'm not quite that bad. I was using stock LF356s for
similar work at the time.

Seriously, I think you're only looking at a small niche. I do believe
uCs are the right solution for the vast majority. ...even the
birthday card I got has one in it. :-/


Ok, Chinese 4-bit micros exempted. Those can be had under 10c. But the
programmers should master Mandarin.

Manderin in 4-bits? ;-)

The 4-bit ones should cost 50 cents, right?

And two haircuts.

--
Keith

 

[Joerg]

Joel Kolstad wrote:

"Joerg" <notthisjoergsch@removethispacbell.net> wrote in message
news:0YRNi.6882$6p6.5727@newssvr25.news.prodigy.net...

For faster stuff I often use NTSC color carrier crystals but I guess that
party is going to be over when the US goes digital.


The party just moved to other frequencies, such as 12.8MHz which is used in a
bazillion PLL-based RF synthesizers in cell phones. AFAIK, it's about the
cheapest way to get a 2.5PPM crystal (in small quantities).

Aha! Thanks, that will be entered into the local wiki file this instant.

Darn, I though it'd last until I retire.


I suspect that the likes of All Electronics will have them for at least
another decade. When are you retiring?

Oh, 10-15 years from now I want to slow down and start doing other
stuff, more in the direction of church and volunteering. But I don't
think I'll ever stop with electronics until I croak.

For my designs stuff has to be available at the mainstream distributors
and manufacturers. So if the client's purchasers ask for half a million
parts they should not hear a thud at the other end of the phone line.

--
Regards, Joerg

http://www.analogconsultants.com

 

[Joerg]

krw wrote:

In article <a2ucg35u48ig1q4kj8s061tki8cnihu41t@4ax.com>,
jjlarkin@highNOTlandTHIStechnologyPART.com says...

On Thu, 4 Oct 2007 20:36:08 -0400, krw <krw@att.bizzzz> wrote:


In article <1c9Ni.5861$6p6.4832@newssvr25.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

miso@sushi.com wrote:

[...]


Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.


I certainly would not say "vast". Many times I have pondered the use of
a uC in a design only to come to the conclusion that 50c is still too
expensive. It's amazing how cheap "poor-man's logic" can be.

You must have very small problems. I've never had one of those. ;-)
The project I'm working on now is in a pair of XC2V-6000s (my part)
and a couple of huge (don't know the model) Virtex-4s. I think I'm
only going to fill 5% of it (and fewer I/Os), but...

What's the most expensive FPGA you buy?


The most expensive I personally spec'ed was an SCX600E in, IIRC '99,
while they the Virtex-E family were still engineering prototypes.
They were $1200ea. As expensive as those things were, I had far more
invested in software to program them than the chips themselves.
Performance was an issue on that project.

I'm pretty sure the things I'm working on now are quite a bit more
than that; 10x the size, twice the pins, and rated for UncleS.


Seriously, I think you're only looking at a small niche. I do believe
uCs are the right solution for the vast majority. ...even the
birthday card I got has one in it. :-/

It's fun, now and then, to design for flat-out performance, and damn
the cost.


Often I've had projects where performance wasn't even the real issue.
Like I said, cost rarely, if ever, was.


The problem with using a uP in such projects is if you are designing a
chip, you need to know how to do it with gates as often that is the
smallest and lowest power solution. The ability to hand craft logic is
disappearing rapidly, but is very much needed in mixed mode chips
which are not done on fine geometry processes.


It sure is disappearing, just like analog skills seem to be almost gone
in fresh grad.

I've ripped out many uC solutions for reliability and cost reasons. Same
for PALs/GALs because that's the era back in the late 80's when
mixed/discrete design skills began to tank. The topper was a system
where I ripped out so many (plus went to 100% AC terminations) that the
power supply kept tripping off and one of them blew. We had managed to
get underneath the minimum load. IIRC the PALs was guzzling 30-40mA just
sitting there. Each.

What's the old saying? If they only learn how to use a hammer every
problem will begin to look like a nail. Heck, I've seen one-shots being
done with a uC. That almost made me sick.

One shots make me sick too. ;-)/2

What? Another case of asynchrophobia?


More acousticophobia, but I'm not a NASCAR fan either. They go off
in weeds. I don't like it when my designs do. It usually causes
long weeks (though I've been pulling 60hr weeks for a month or so).

Brace yourself for 70 hours or more if the universities don't start
cranking out engineers with more useful hardware knowledge.

--
Regards, Joerg

http://www.analogconsultants.com

 

[Rich Grise]

On Sat, 06 Oct 2007 19:10:26 -0500, Spehro Pefhany wrote:

On Sat, 6 Oct 2007 17:31:54 -0400, the renowned krw <krw@att.bizzzz
notthisjoergsch@removethispacbell.net says...
krw wrote:
Ok, Chinese 4-bit micros exempted. Those can be had under 10c. But the
programmers should master Mandarin.

Manderin in 4-bits? ;-)

The 4-bit ones should cost 50 cents, right?

In deep threads, my newsreader's header window truncates subject
lines.

This one came up "Re: Which university produces good anal" ;-)

Cheers!
Rich

 

[Tim Williams]

"Rich Grise" <rich@example.net> wrote in message
newsan.2007.10.08.16.13.19.620809@example.net...

In deep threads, my newsreader's header window truncates subject
lines.

This one came up "Re: Which university produces good anal" ;-)

Y'mean like this?
http://webpages.charter.net/dawill/Images/AnalogSubject.gif

Joerg, shame on you! ;-)

Tim

--
Deep Fryer: A very philosophical monk.
Website @ http://webpages.charter.net/dawill/tmoranwms

 

[Rich Grise]

On Mon, 08 Oct 2007 13:27:41 -0500, Tim Williams wrote:

"Rich Grise" <rich@example.net> wrote in message
newsan.2007.10.08.16.13.19.620809@example.net...
In deep threads, my newsreader's header window truncates subject lines.

This one came up "Re: Which university produces good anal" ;-)

Y'mean like this?
http://webpages.charter.net/dawill/Images/AnalogSubject.gif

Exactly, but in my window, it sas from Spehro.

Cheers!
Rich

 

[Spehro Pefhany]

On Mon, 08 Oct 2007 19:25:01 GMT, the renowned Rich Grise
<rich@example.net> wrote:

On Mon, 08 Oct 2007 13:27:41 -0500, Tim Williams wrote:

"Rich Grise" <rich@example.net> wrote in message
newsan.2007.10.08.16.13.19.620809@example.net...
In deep threads, my newsreader's header window truncates subject lines.

This one came up "Re: Which university produces good anal" ;-)

Y'mean like this?
http://webpages.charter.net/dawill/Images/AnalogSubject.gif


Exactly, but in my window, it sas from Spehro.

Cheers!
Rich

You need to add 3" to your monitor..

 

[Rich Grise]

On Mon, 08 Oct 2007 15:51:49 -0500, Spehro Pefhany wrote:

On Mon, 08 Oct 2007 19:25:01 GMT, the renowned Rich Grise
On Mon, 08 Oct 2007 13:27:41 -0500, Tim Williams wrote:

"Rich Grise" <rich@example.net> wrote in message
newsan.2007.10.08.16.13.19.620809@example.net...
In deep threads, my newsreader's header window truncates subject
lines.

This one came up "Re: Which university produces good anal" ;-)

Y'mean like this?
http://webpages.charter.net/dawill/Images/AnalogSubject.gif

Exactly, but in my window, it sas from Spehro.

You need to add 3" to your monitor..

Yeah - my last 20" just died recently, so I'm using a back-up
17". I tossed the 20", because it'd probably be cheaper to get
a new flat-screen than try to get it fixed. )-;

Thanks,
Rich