Which university produces good analog EEs?

In article <1191229725.673736.51460@r29g2000hsg.googlegroups.com>,
miso@sushi.com says...
On Sep 30, 7:00 am, Joerg <notthisjoerg...@removethispacbell.net
wrote:
m...@sushi.com wrote:
On Sep 28, 12:01 pm, Joerg <notthisjoerg...@removethispacbell.net
wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 11:05:46 -0700, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 10:23:30 -0700, m...@sushi.com wrote:

On Sep 25, 3:45 pm, Joerg <notthisjoerg...@removethispacbell.net
wrote:

Hello Folks,

Happens a lot these days, last time an hour ago: Someone is looking for
an analog/mixed signal engineer (this time low power design). I could do
it but they absolutely want to have someone on staff. Which I can't do.
So, I often try to convince them to settle for a youngster who gets
coached now and then, instead of sitting there a year from now still
trying to find the perfect candidate.

Which US or Canadian university lets off the best analog/mixed EEs? I
know, I know, many can't even solder etc. It ain't like it used to be.
But there has got to be an alma mater that sticks out. Or maybe a
particular institute at one. And please, no pissing contests.

--
Regards, Joerg

http://www.analogconsultants.com

I never interviewed a Georgia Tech grad, but Marshall Leach, Jr.
certain has the credentials.
http://users.ece.gatech.edu/~mleach/

I've interviewed plenty of UC Berkeley grads, and you could find an
analog designer there.This doesn't mean every grad from UCB will know
analog. The worse Ivy League has got to be hands down MIT. I assume it
was a good university at one time given it's reputation. But I
interviewed undergrads that didn't know basic s-plane stability
issues, as if they don't teach classic control theory anymore What
little analog they knew was bipolar.

Probably only the duds applied to your company ;-)

However I never had control systems, per se, undergrad... just a very
good math background to understand it if I needed it. (and that was
more than 45 years ago.)

Took non-linear control systems in grad school. Instructor scared the
piss out of me by announcing that, to weed down the class size, he was
giving an exam in undergrad control systems... pass or walk :-(

I got the best score, and "A" as my final grade ;-)

A real surprise are the University of Toronto grads. These guys know
analog and signal processing.

I don't know any of those.

The trouble with low power (assuming you mean micropower) is you
really need to be a careful designer, especially if the chip is
designed to have low quiescent power but handle high current. You also
need the benefit of seeing a few designs that didn't work, hopefully
not your own but from the company portfolio of goofs. One of the
classic bugs is designing micropower bandgaps, only to have them get
pumped from an on-board switcher. You have to throw in all sorts of
parasitics to make sure nothing sneaks into your reference.

Yep :-(

Maybe that's why there are no (cheap) ultralow brethren to the TLV431.
If you want less than 10uA cathode current on the board level it either
becomes very expensive, very large or you can forget about a reference.

Hardly a week goes by that I don't design a micro-power BandGap into a
chip ;-)

Dang, I just knew you'd say that ...

For us board level guys the situation looks pretty dire.

--
Regards, Joerg

http://www.analogconsultants.com

Micropower bandgaps show up in really mundane areas of chip design
nowadays, such as POR. Really overkill, but because customers know it
can be done, they expect it to be done. If you reverse engineer Maxim
chips, you'll find a bandgap comparator circuit in the POR. Plenty of
patents on such circuits, but never litigated to my knowledge. They do
save power since the bandgap and comparator are folded into one
circuit.

Yes, on chips this is no problem but no company has marketed those
individually at a decent price. Meaning the sub-10uA references are
usually not very suitable for mass production because you can't have a
reference in there that costs more than all the rest of the board. So we
have to use tricks such as pulsing and storing.

One reason why POR/BOR circuits contain precise references is that the
chips they are on need it elsewhere as well. For example, a uC with an
ADC on board. The often touted "cheat reference" consisting of four
equal resistors hung onto the rail doesn't cut the mustard.

One of the trickier micropower circuits are those in thermal shutdown.
That is where leakage can really kill you, so parasitics are required.
However, it isn't exactly rocket science.

BTW, I forgot to mention it, but UCLA has a fair amount of analog
design classes. Lastly, there is the Swiss Federal Institute of
Technology (or close to that). They have all sorts of papers on
dynamic biasing scheme, i.e. schemes to make micropower op amps slew
quickly by boosting tail current, etc.

We didn't have much luck with UCLA so far. They didn't understand my
module specs and couldn't even solder. Had to let them go. Europe would
be an option but the immigration procedure is a real hassle. Plus there
will be an expensive international move required unless you catch them
right after their degree. Europe doesn't have such an extreme shortage
of analog guys because larger companies there are often foolish. Some of
them consider anyone over 40 a geezer that needs to be replaced by a
kid. The consequences are very visible, for example with NXP's web site.

--
Regards, Joerg

http://www.analogconsultants.com

Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
Click to expand...
certainly over the discrete implementation you suggest.

--
Keith
 
In article <13fqp60d1ihvr52@corp.supernews.com>, lugnut808
@nospam.yahoo.com says...
Joerg wrote:

Chris Jones wrote:

Joerg wrote:

But it's already there. Guys like Jim have tons of designs ready to go.
All it would take is getting it into the market. AFAICT something like a
1uA cathode current version of a common ref chip would really take off
in the marketplace, provided it's less than 10c in qties. It doesn't
even need to be adjustable of have a large compliance range.


The 10c part is the problem - the stock market analysts probably won't
knowingly let a semiconductor company embark on a new product with less
that 50% gross margin, and that sounds hard for 10c, tested etc. Anyway
their marketing guys would get some big ideas and try to sell it for $1.50
then cancel it a couple of years later because nobody bought it. On the
other hand, maybe there is a Chinese semi mfg who would be happy to accept
a bit less margin.
Click to expand...
You'd better have a 50% gross margin, in that business. At the cost
of the fab and the support people (forgetting inventory and the
inevitable losers), it's a necessity. China doesn't seem to have
economics as its first priority, as US companies must.

--
Keith
 
On Mon, 1 Oct 2007 20:43:08 -0400, the renowned krw <krw@att.bizzzz>
wrote:

In article <13fqp60d1ihvr52@corp.supernews.com>, lugnut808
@nospam.yahoo.com says...
Joerg wrote:

Chris Jones wrote:

Joerg wrote:

But it's already there. Guys like Jim have tons of designs ready to go.
All it would take is getting it into the market. AFAICT something like a
1uA cathode current version of a common ref chip would really take off
in the marketplace, provided it's less than 10c in qties. It doesn't
even need to be adjustable of have a large compliance range.


The 10c part is the problem - the stock market analysts probably won't
knowingly let a semiconductor company embark on a new product with less
that 50% gross margin, and that sounds hard for 10c, tested etc. Anyway
their marketing guys would get some big ideas and try to sell it for $1.50
then cancel it a couple of years later because nobody bought it. On the
other hand, maybe there is a Chinese semi mfg who would be happy to accept
a bit less margin.

You'd better have a 50% gross margin, in that business. At the cost
of the fab and the support people (forgetting inventory and the
inevitable losers), it's a necessity. China doesn't seem to have
economics as its first priority, as US companies must.
Click to expand...
Nah, they're just as greedy, opportunistic and short-sighted, just
with lower costs and a different environment. Warms the cockles of
your heart, it does.


Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
 
On Mon, 01 Oct 2007 22:21:00 -0500, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

On Mon, 1 Oct 2007 20:43:08 -0400, the renowned krw <krw@att.bizzzz
wrote:

In article <13fqp60d1ihvr52@corp.supernews.com>, lugnut808
@nospam.yahoo.com says...
Joerg wrote:

Chris Jones wrote:

Joerg wrote:

But it's already there. Guys like Jim have tons of designs ready to go.
All it would take is getting it into the market. AFAICT something like a
1uA cathode current version of a common ref chip would really take off
in the marketplace, provided it's less than 10c in qties. It doesn't
even need to be adjustable of have a large compliance range.


The 10c part is the problem - the stock market analysts probably won't
knowingly let a semiconductor company embark on a new product with less
that 50% gross margin, and that sounds hard for 10c, tested etc. Anyway
their marketing guys would get some big ideas and try to sell it for $1.50
then cancel it a couple of years later because nobody bought it. On the
other hand, maybe there is a Chinese semi mfg who would be happy to accept
a bit less margin.

You'd better have a 50% gross margin, in that business. At the cost
of the fab and the support people (forgetting inventory and the
inevitable losers), it's a necessity. China doesn't seem to have
economics as its first priority, as US companies must.

Nah, they're just as greedy, opportunistic and short-sighted, just
with lower costs and a different environment. Warms the cockles of
your heart, it does.
Click to expand...
From commies to neocons, in one generation!

John
 
John Larkin wrote:

On Sun, 30 Sep 2007 15:32:48 GMT, Joerg
notthisjoergsch@removethispacbell.net> wrote:


RST Engineering (jw) wrote:


...and some really nice HF RF linear power amplifier devices.


Ok, yeah, of course you can still get some of the really big tubes. But
those aren't practical and economical for a small HV circuit while the
old TV ballast triode might have been.



Cute trick: use an HV rectifier, like a 1B3, and control its filament
voltage to make it an amplifier. I used to do that when I was a kid...
flashlight battery, rheostat to filament (with long plastic shaft!),
neon sign transformer, charging a bank of oil caps, with the loop
closed manually. You could run the xenon flashtubes just below the
point where they'd fire spontaneously.
Click to expand...
Neat! I wonder what the achievable loop bandwidth would be ...


Amazing I'm still alive.
Click to expand...

I guess many of us wonder about that. I remember dropping a tool into my
2nd shortwave power amp. BADABANG! 5kV on the plates and an oil-cooled
transformer the size of a shoe box. It could push all the gusto of a
230V/16A circuit into the HV node if needed. The amp before that was
built when I head no money for luxuries such as transformers so I rigged
up a tripler from 230VAC to around 900VDC. Tons of caps, lots of power.
Of course, German power plugs are not keyed ... One day one of the caps
decided it was time. Ceiling lights dimmed, me scratching my head
because there was no dimmer. Phssst ... BAM! The can had taken a chunk
out of the ceiling plaster and whitish fluff rained down on me. Oh man,
if I would have had my face over that amp.

--
Regards, Joerg

http://www.analogconsultants.com
 
krw wrote:

In article <IxYKi.1745$P21.675@newssvr19.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

Phil Hobbs wrote:


Joerg wrote:


Phil Hobbs wrote:


Joerg wrote:


Phil Hobbs wrote:


Joerg wrote:


Hello Folks,

Happens a lot these days, last time an hour ago: Someone is
looking for an analog/mixed signal engineer (this time low power
design). I could do it but they absolutely want to have someone on
staff. Which I can't do. So, I often try to convince them to
settle for a youngster who gets coached now and then, instead of
sitting there a year from now still trying to find the perfect
candidate.

Which US or Canadian university lets off the best analog/mixed
EEs? I know, I know, many can't even solder etc. It ain't like it
used to be. But there has got to be an alma mater that sticks out.
Or maybe a particular institute at one. And please, no pissing
contests.


Try out Montana State and the University of Colorado.


Thanks, that's a start. I just fear that guys who've lived in places
like that would not enjoy Bay Area life (I wouldn't). But definitely
worth a try.


It's amazing what a W-2 form can do to motivate someone--ask me how I
know, I've lived in NY for 20 years now.


Has to have the right numbers in there. Big bucks will motivate. It's
just that in the Bay Area it needs to be really big bucks.

It's also a matter of lifestyle. Country folks (like me) may tough it
out for a while but many of our neighbors are Bay Area transplants.
People who packed it all up the millisecond they retired.


I hate the Bay Area--I went to school there, and very nearly went to
work at HP Labs on Page Mill Road in Palo Alto, which was about six
blocks from where I lived at the time...but fortunately IBM's offer came
through before HP's. If I believed in chance, I'd feel lucky. As it
is, I feel blessed. ;)

Cheers,

Phil "Same lab for 18 years now" Hobbs


Poughkeepsie? That's where my father had to go, looong flights back in
them days. He worked at IBM in Germany.


I worked in P'ok for 19 years. Great place to be *from*.


It would definitely be too cold up there for my wife. Her ideal place
would be where winter simply doesn't happen. Like Hawaii, but there is
no work for me and getting to clients would take forever.


From there, we moved North 200 miles but looking to get out for
somewhat warmer climes now (the instant the house sells). The
Winters do suck and it looks like we'll be there one more. :-(
Click to expand...
Good luck selling, won't be easy these days :-(

A friend did that years ago and found Arkansas to be a good place. He
said they don't tax you out of the house there. Unfortunately he had a
fatal stroke a few years later.

--
Regards, Joerg

http://www.analogconsultants.com
 
In article <5ktMi.2078$hI7.1676@newssvr17.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...
krw wrote:

In article <IxYKi.1745$P21.675@newssvr19.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

Phil Hobbs wrote:


Joerg wrote:


Phil Hobbs wrote:


Joerg wrote:


Phil Hobbs wrote:


Joerg wrote:


Hello Folks,

Happens a lot these days, last time an hour ago: Someone is
looking for an analog/mixed signal engineer (this time low power
design). I could do it but they absolutely want to have someone on
staff. Which I can't do. So, I often try to convince them to
settle for a youngster who gets coached now and then, instead of
sitting there a year from now still trying to find the perfect
candidate.

Which US or Canadian university lets off the best analog/mixed
EEs? I know, I know, many can't even solder etc. It ain't like it
used to be. But there has got to be an alma mater that sticks out.
Or maybe a particular institute at one. And please, no pissing
contests.


Try out Montana State and the University of Colorado.


Thanks, that's a start. I just fear that guys who've lived in places
like that would not enjoy Bay Area life (I wouldn't). But definitely
worth a try.


It's amazing what a W-2 form can do to motivate someone--ask me how I
know, I've lived in NY for 20 years now.


Has to have the right numbers in there. Big bucks will motivate. It's
just that in the Bay Area it needs to be really big bucks.

It's also a matter of lifestyle. Country folks (like me) may tough it
out for a while but many of our neighbors are Bay Area transplants.
People who packed it all up the millisecond they retired.


I hate the Bay Area--I went to school there, and very nearly went to
work at HP Labs on Page Mill Road in Palo Alto, which was about six
blocks from where I lived at the time...but fortunately IBM's offer came
through before HP's. If I believed in chance, I'd feel lucky. As it
is, I feel blessed. ;)

Cheers,

Phil "Same lab for 18 years now" Hobbs


Poughkeepsie? That's where my father had to go, looong flights back in
them days. He worked at IBM in Germany.


I worked in P'ok for 19 years. Great place to be *from*.


It would definitely be too cold up there for my wife. Her ideal place
would be where winter simply doesn't happen. Like Hawaii, but there is
no work for me and getting to clients would take forever.


From there, we moved North 200 miles but looking to get out for
somewhat warmer climes now (the instant the house sells). The
Winters do suck and it looks like we'll be there one more. :-(


Good luck selling, won't be easy these days :-(
Click to expand...
Yeah, buyers are pretty slim. Amazingly the higher-end and the
bottom stuff is selling. The stuff in the middle is sitting. We've
had some interest, but they all have had something to sell too.

A friend did that years ago and found Arkansas to be a good place. He
said they don't tax you out of the house there. Unfortunately he had a
fatal stroke a few years later.
Click to expand...
We're looking at KY, though if I find something (long term) that's
interesting we'll go wherever. I'm kinda picky though. I've turned
down some possibilities that didn't look all that great. I think I
can afford to retire in KY, though I really don't want to. I'm doing
a short-term contract in OH now just to keep from going insane (and
help pay VT taxes). The work is fine but being away from home sucks.

I had a run-in with A-Fib early this year and am on medications that
keep my BP rather low (half of what it was when I was in A-Fib and
the sphygmomanometer tilted), so I hope I can escape a stroke. My
brother had one a few years ago. He still has many resulting from it
and can't talk well. His was likely caused by the doctors mucking
with his heart though.

--
Keith
 
In article <m4e3g39kmscs5do20ok7sfdolsam240v8p@4ax.com>,
speffSNIP@interlogDOTyou.knowwhat says...
On Mon, 1 Oct 2007 20:43:08 -0400, the renowned krw <krw@att.bizzzz
wrote:

In article <13fqp60d1ihvr52@corp.supernews.com>, lugnut808
@nospam.yahoo.com says...
Joerg wrote:

Chris Jones wrote:

Joerg wrote:

But it's already there. Guys like Jim have tons of designs ready to go.
All it would take is getting it into the market. AFAICT something like a
1uA cathode current version of a common ref chip would really take off
in the marketplace, provided it's less than 10c in qties. It doesn't
even need to be adjustable of have a large compliance range.


The 10c part is the problem - the stock market analysts probably won't
knowingly let a semiconductor company embark on a new product with less
that 50% gross margin, and that sounds hard for 10c, tested etc. Anyway
their marketing guys would get some big ideas and try to sell it for $1.50
then cancel it a couple of years later because nobody bought it. On the
other hand, maybe there is a Chinese semi mfg who would be happy to accept
a bit less margin.

You'd better have a 50% gross margin, in that business. At the cost
of the fab and the support people (forgetting inventory and the
inevitable losers), it's a necessity. China doesn't seem to have
economics as its first priority, as US companies must.

Nah, they're just as greedy, opportunistic and short-sighted, just
with lower costs and a different environment.
Click to expand...
I disagree. Many of their businesses make no sense, other than as
loss-leaders to "build market share". Of course many corporate
yahoos here are falling for the line and investing in China too.

Warms the cockles of your heart, it does.
Click to expand...
Kinda like the Japaneese a couple of decades ago.

--
Keith
 
On Oct 1, 5:43 pm, krw <k...@att.bizzzz> wrote:
In article <1191229725.673736.51...@r29g2000hsg.googlegroups.com>,
m...@sushi.com says...

On Sep 30, 7:00 am, Joerg <notthisjoerg...@removethispacbell.net
wrote:
m...@sushi.com wrote:
On Sep 28, 12:01 pm, Joerg <notthisjoerg...@removethispacbell.net
wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 11:05:46 -0700, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 10:23:30 -0700, m...@sushi.com wrote:

On Sep 25, 3:45 pm, Joerg <notthisjoerg...@removethispacbell.net
wrote:

Hello Folks,

Happens a lot these days, last time an hour ago: Someone is looking for
an analog/mixed signal engineer (this time low power design). I could do
it but they absolutely want to have someone on staff. Which I can't do.
So, I often try to convince them to settle for a youngster who gets
coached now and then, instead of sitting there a year from now still
trying to find the perfect candidate.

Which US or Canadian university lets off the best analog/mixed EEs? I
know, I know, many can't even solder etc. It ain't like it used to be.
But there has got to be an alma mater that sticks out. Or maybe a
particular institute at one. And please, no pissing contests.

--
Regards, Joerg

http://www.analogconsultants.com

I never interviewed a Georgia Tech grad, but Marshall Leach, Jr.
certain has the credentials.
http://users.ece.gatech.edu/~mleach/

I've interviewed plenty of UC Berkeley grads, and you could find an
analog designer there.This doesn't mean every grad from UCB will know
analog. The worse Ivy League has got to be hands down MIT. I assume it
was a good university at one time given it's reputation. But I
interviewed undergrads that didn't know basic s-plane stability
issues, as if they don't teach classic control theory anymore What
little analog they knew was bipolar.

Probably only the duds applied to your company ;-)

However I never had control systems, per se, undergrad... just a very
good math background to understand it if I needed it. (and that was
more than 45 years ago.)

Took non-linear control systems in grad school. Instructor scared the
piss out of me by announcing that, to weed down the class size, he was
giving an exam in undergrad control systems... pass or walk :-(

I got the best score, and "A" as my final grade ;-)

A real surprise are the University of Toronto grads. These guys know
analog and signal processing.

I don't know any of those.

The trouble with low power (assuming you mean micropower) is you
really need to be a careful designer, especially if the chip is
designed to have low quiescent power but handle high current. You also
need the benefit of seeing a few designs that didn't work, hopefully
not your own but from the company portfolio of goofs. One of the
classic bugs is designing micropower bandgaps, only to have them get
pumped from an on-board switcher. You have to throw in all sorts of
parasitics to make sure nothing sneaks into your reference.

Yep :-(

Maybe that's why there are no (cheap) ultralow brethren to the TLV431.
If you want less than 10uA cathode current on the board level it either
becomes very expensive, very large or you can forget about a reference.

Hardly a week goes by that I don't design a micro-power BandGap into a
chip ;-)

Dang, I just knew you'd say that ...

For us board level guys the situation looks pretty dire.

--
Regards, Joerg

http://www.analogconsultants.com

Micropower bandgaps show up in really mundane areas of chip design
nowadays, such as POR. Really overkill, but because customers know it
can be done, they expect it to be done. If you reverse engineer Maxim
chips, you'll find a bandgap comparator circuit in the POR. Plenty of
patents on such circuits, but never litigated to my knowledge. They do
save power since the bandgap and comparator are folded into one
circuit.

Yes, on chips this is no problem but no company has marketed those
individually at a decent price. Meaning the sub-10uA references are
usually not very suitable for mass production because you can't have a
reference in there that costs more than all the rest of the board. So we
have to use tricks such as pulsing and storing.

One reason why POR/BOR circuits contain precise references is that the
chips they are on need it elsewhere as well. For example, a uC with an
ADC on board. The often touted "cheat reference" consisting of four
equal resistors hung onto the rail doesn't cut the mustard.

One of the trickier micropower circuits are those in thermal shutdown.
That is where leakage can really kill you, so parasitics are required.
However, it isn't exactly rocket science.

BTW, I forgot to mention it, but UCLA has a fair amount of analog
design classes. Lastly, there is the Swiss Federal Institute of
Technology (or close to that). They have all sorts of papers on
dynamic biasing scheme, i.e. schemes to make micropower op amps slew
quickly by boosting tail current, etc.

We didn't have much luck with UCLA so far. They didn't understand my
module specs and couldn't even solder. Had to let them go. Europe would
be an option but the immigration procedure is a real hassle. Plus there
will be an expensive international move required unless you catch them
right after their degree. Europe doesn't have such an extreme shortage
of analog guys because larger companies there are often foolish. Some of
them consider anyone over 40 a geezer that needs to be replaced by a
kid. The consequences are very visible, for example with NXP's web site.

--
Regards, Joerg

http://www.analogconsultants.com

Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.

--
Keith
Click to expand...
The problem with using a uP in such projects is if you are designing a
chip, you need to know how to do it with gates as often that is the
smallest and lowest power solution. The ability to hand craft logic is
disappearing rapidly, but is very much needed in mixed mode chips
which are not done on fine geometry processes.
 
miso@sushi.com miso@sushi.com posted to sci.electronics.design:

On Oct 1, 5:43 pm, krw <k...@att.bizzzz> wrote:
In article <1191229725.673736.51...@r29g2000hsg.googlegroups.com>,
m...@sushi.com says...

On Sep 30, 7:00 am, Joerg <notthisjoerg...@removethispacbell.net
wrote:
m...@sushi.com wrote:
On Sep 28, 12:01 pm, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 11:05:46 -0700, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 10:23:30 -0700, m...@sushi.com wrote:

On Sep 25, 3:45 pm, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Hello Folks,

Happens a lot these days, last time an hour ago: Someone
is looking for an analog/mixed signal engineer (this
time low power design). I could do it but they
absolutely want to have someone on staff. Which I can't
do. So, I often try to convince them to settle for a
youngster who gets coached now and then, instead of
sitting there a year from now still trying to find the
perfect candidate.

Which US or Canadian university lets off the best
analog/mixed EEs? I know, I know, many can't even solder
etc. It ain't like it used to be. But there has got to
be an alma mater that sticks out. Or maybe a particular
institute at one. And please, no pissing contests.

--
Regards, Joerg

http://www.analogconsultants.com

I never interviewed a Georgia Tech grad, but Marshall
Leach, Jr. certain has the credentials.
http://users.ece.gatech.edu/~mleach/

I've interviewed plenty of UC Berkeley grads, and you
could find an analog designer there.This doesn't mean
every grad from UCB will know analog. The worse Ivy
League has got to be hands down MIT. I assume it was a
good university at one time given it's reputation. But I
interviewed undergrads that didn't know basic s-plane
stability issues, as if they don't teach classic control
theory anymore What little analog they knew was bipolar.

Probably only the duds applied to your company ;-)

However I never had control systems, per se, undergrad...
just a very
good math background to understand it if I needed it.
(and that was more than 45 years ago.)

Took non-linear control systems in grad school.
Instructor scared the piss out of me by announcing that,
to weed down the class size, he was giving an exam in
undergrad control systems... pass or walk :-(

I got the best score, and "A" as my final grade ;-)

A real surprise are the University of Toronto grads.
These guys know analog and signal processing.

I don't know any of those.

The trouble with low power (assuming you mean micropower)
is you really need to be a careful designer, especially
if the chip is designed to have low quiescent power but
handle high current. You also need the benefit of seeing
a few designs that didn't work, hopefully not your own
but from the company portfolio of goofs. One of the
classic bugs is designing micropower bandgaps, only to
have them get pumped from an on-board switcher. You have
to throw in all sorts of parasitics to make sure nothing
sneaks into your reference.

Yep :-(

Maybe that's why there are no (cheap) ultralow brethren to
the TLV431. If you want less than 10uA cathode current on
the board level it either becomes very expensive, very
large or you can forget about a reference.

Hardly a week goes by that I don't design a micro-power
BandGap into a chip ;-)

Dang, I just knew you'd say that ...

For us board level guys the situation looks pretty dire.

--
Regards, Joerg

http://www.analogconsultants.com

Micropower bandgaps show up in really mundane areas of chip
design nowadays, such as POR. Really overkill, but because
customers know it can be done, they expect it to be done. If
you reverse engineer Maxim chips, you'll find a bandgap
comparator circuit in the POR. Plenty of patents on such
circuits, but never litigated to my knowledge. They do save
power since the bandgap and comparator are folded into one
circuit.

Yes, on chips this is no problem but no company has marketed
those individually at a decent price. Meaning the sub-10uA
references are usually not very suitable for mass production
because you can't have a reference in there that costs more
than all the rest of the board. So we have to use tricks such
as pulsing and storing.

One reason why POR/BOR circuits contain precise references is
that the chips they are on need it elsewhere as well. For
example, a uC with an ADC on board. The often touted "cheat
reference" consisting of four equal resistors hung onto the
rail doesn't cut the mustard.

One of the trickier micropower circuits are those in thermal
shutdown. That is where leakage can really kill you, so
parasitics are required. However, it isn't exactly rocket
science.

BTW, I forgot to mention it, but UCLA has a fair amount of
analog design classes. Lastly, there is the Swiss Federal
Institute of Technology (or close to that). They have all
sorts of papers on dynamic biasing scheme, i.e. schemes to
make micropower op amps slew quickly by boosting tail
current, etc.

We didn't have much luck with UCLA so far. They didn't
understand my module specs and couldn't even solder. Had to let
them go. Europe would be an option but the immigration
procedure is a real hassle. Plus there will be an expensive
international move required unless you catch them right after
their degree. Europe doesn't have such an extreme shortage of
analog guys because larger companies there are often foolish.
Some of them consider anyone over 40 a geezer that needs to be
replaced by a kid. The consequences are very visible, for
example with NXP's web site.

--
Regards, Joerg

http://www.analogconsultants.com

Oh yeah, the lack of soldering skills. That would require the
student to have actually built something. These younguns just
know how to program. You've seen the posts where a pic uP is the
solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.

--
Keith

The problem with using a uP in such projects is if you are designing
a chip, you need to know how to do it with gates as often that is
the smallest and lowest power solution. The ability to hand craft
logic is disappearing rapidly, but is very much needed in mixed mode
chips which are not done on fine geometry processes.
Click to expand...
OK. I know this might sound a bit weird but, it seems that mixed mode
in not chasing minimum geometry devices like digital is. I can see
some reasons for this, but some of the issues can be reduced by some
thoughtful scale reduction. Is the issue that the tools cannot keep
up?
 
On Wed, 03 Oct 2007 06:46:04 GMT, JosephKK
<joseph_barrett@sbcglobal.net> wrote:

[snip]
OK. I know this might sound a bit weird but, it seems that mixed mode
in not chasing minimum geometry devices like digital is. I can see
some reasons for this, but some of the issues can be reduced by some
thoughtful scale reduction.
Click to expand...
Sub 0.18u devices leak like sieves... not very conducive to quality
analog work.

Is the issue that the tools cannot keep
up?
Click to expand...
No. Models is models is models....

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave
 
On Wed, 03 Oct 2007 07:23:33 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote:

On Wed, 03 Oct 2007 06:46:04 GMT, JosephKK
joseph_barrett@sbcglobal.net> wrote:

[snip]

OK. I know this might sound a bit weird but, it seems that mixed mode
in not chasing minimum geometry devices like digital is. I can see
some reasons for this, but some of the issues can be reduced by some
thoughtful scale reduction.

Sub 0.18u devices leak like sieves... not very conducive to quality
analog work.
Click to expand...
What's the reason that you can't make, say, 10u or 2u devices on a
0.18u process?


Is the issue that the tools cannot keep
up?

No. Models is models is models....

...Jim Thompson
Click to expand...
Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
 
On Wed, 03 Oct 2007 06:46:04 GMT, JosephKK
<joseph_barrett@sbcglobal.net> wrote:

miso@sushi.com miso@sushi.com posted to sci.electronics.design:

On Oct 1, 5:43 pm, krw <k...@att.bizzzz> wrote:
In article <1191229725.673736.51...@r29g2000hsg.googlegroups.com>,
m...@sushi.com says...

On Sep 30, 7:00 am, Joerg <notthisjoerg...@removethispacbell.net
wrote:
m...@sushi.com wrote:
On Sep 28, 12:01 pm, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 11:05:46 -0700, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 10:23:30 -0700, m...@sushi.com wrote:

On Sep 25, 3:45 pm, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Hello Folks,

Happens a lot these days, last time an hour ago: Someone
is looking for an analog/mixed signal engineer (this
time low power design). I could do it but they
absolutely want to have someone on staff. Which I can't
do. So, I often try to convince them to settle for a
youngster who gets coached now and then, instead of
sitting there a year from now still trying to find the
perfect candidate.

Which US or Canadian university lets off the best
analog/mixed EEs? I know, I know, many can't even solder
etc. It ain't like it used to be. But there has got to
be an alma mater that sticks out. Or maybe a particular
institute at one. And please, no pissing contests.

--
Regards, Joerg

http://www.analogconsultants.com

I never interviewed a Georgia Tech grad, but Marshall
Leach, Jr. certain has the credentials.
http://users.ece.gatech.edu/~mleach/

I've interviewed plenty of UC Berkeley grads, and you
could find an analog designer there.This doesn't mean
every grad from UCB will know analog. The worse Ivy
League has got to be hands down MIT. I assume it was a
good university at one time given it's reputation. But I
interviewed undergrads that didn't know basic s-plane
stability issues, as if they don't teach classic control
theory anymore What little analog they knew was bipolar.

Probably only the duds applied to your company ;-)

However I never had control systems, per se, undergrad...
just a very
good math background to understand it if I needed it.
(and that was more than 45 years ago.)

Took non-linear control systems in grad school.
Instructor scared the piss out of me by announcing that,
to weed down the class size, he was giving an exam in
undergrad control systems... pass or walk :-(

I got the best score, and "A" as my final grade ;-)

A real surprise are the University of Toronto grads.
These guys know analog and signal processing.

I don't know any of those.

The trouble with low power (assuming you mean micropower)
is you really need to be a careful designer, especially
if the chip is designed to have low quiescent power but
handle high current. You also need the benefit of seeing
a few designs that didn't work, hopefully not your own
but from the company portfolio of goofs. One of the
classic bugs is designing micropower bandgaps, only to
have them get pumped from an on-board switcher. You have
to throw in all sorts of parasitics to make sure nothing
sneaks into your reference.

Yep :-(

Maybe that's why there are no (cheap) ultralow brethren to
the TLV431. If you want less than 10uA cathode current on
the board level it either becomes very expensive, very
large or you can forget about a reference.

Hardly a week goes by that I don't design a micro-power
BandGap into a chip ;-)

Dang, I just knew you'd say that ...

For us board level guys the situation looks pretty dire.

--
Regards, Joerg

http://www.analogconsultants.com

Micropower bandgaps show up in really mundane areas of chip
design nowadays, such as POR. Really overkill, but because
customers know it can be done, they expect it to be done. If
you reverse engineer Maxim chips, you'll find a bandgap
comparator circuit in the POR. Plenty of patents on such
circuits, but never litigated to my knowledge. They do save
power since the bandgap and comparator are folded into one
circuit.

Yes, on chips this is no problem but no company has marketed
those individually at a decent price. Meaning the sub-10uA
references are usually not very suitable for mass production
because you can't have a reference in there that costs more
than all the rest of the board. So we have to use tricks such
as pulsing and storing.

One reason why POR/BOR circuits contain precise references is
that the chips they are on need it elsewhere as well. For
example, a uC with an ADC on board. The often touted "cheat
reference" consisting of four equal resistors hung onto the
rail doesn't cut the mustard.

One of the trickier micropower circuits are those in thermal
shutdown. That is where leakage can really kill you, so
parasitics are required. However, it isn't exactly rocket
science.

BTW, I forgot to mention it, but UCLA has a fair amount of
analog design classes. Lastly, there is the Swiss Federal
Institute of Technology (or close to that). They have all
sorts of papers on dynamic biasing scheme, i.e. schemes to
make micropower op amps slew quickly by boosting tail
current, etc.

We didn't have much luck with UCLA so far. They didn't
understand my module specs and couldn't even solder. Had to let
them go. Europe would be an option but the immigration
procedure is a real hassle. Plus there will be an expensive
international move required unless you catch them right after
their degree. Europe doesn't have such an extreme shortage of
analog guys because larger companies there are often foolish.
Some of them consider anyone over 40 a geezer that needs to be
replaced by a kid. The consequences are very visible, for
example with NXP's web site.

--
Regards, Joerg

http://www.analogconsultants.com

Oh yeah, the lack of soldering skills. That would require the
student to have actually built something. These younguns just
know how to program. You've seen the posts where a pic uP is the
solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.

--
Keith

The problem with using a uP in such projects is if you are designing
a chip, you need to know how to do it with gates as often that is
the smallest and lowest power solution. The ability to hand craft
logic is disappearing rapidly, but is very much needed in mixed mode
chips which are not done on fine geometry processes.

OK. I know this might sound a bit weird but, it seems that mixed mode
in not chasing minimum geometry devices like digital is. I can see
some reasons for this, but some of the issues can be reduced by some
thoughtful scale reduction. Is the issue that the tools cannot keep
up?
Click to expand...
There's the wirebond issue, too. Lots of chips are size-limited by the
i/o connections, so there's no point in making the devices smaller. A
billion dram bits on a chip is good, but a million opamps doesn't make
sense.

John
 
On Wed, 03 Oct 2007 11:08:31 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

On Wed, 03 Oct 2007 07:23:33 -0700, Jim Thompson
To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote:

On Wed, 03 Oct 2007 06:46:04 GMT, JosephKK
joseph_barrett@sbcglobal.net> wrote:

[snip]

OK. I know this might sound a bit weird but, it seems that mixed mode
in not chasing minimum geometry devices like digital is. I can see
some reasons for this, but some of the issues can be reduced by some
thoughtful scale reduction.

Sub 0.18u devices leak like sieves... not very conducive to quality
analog work.

What's the reason that you can't make, say, 10u or 2u devices on a
0.18u process?
Click to expand...
You can, except the 0.18u feature-size VERTICAL dimension is still
there, plus the doping levels are still the same as well.

HOWEVER, I work regularly on mixed device processes. The current
project has multiple diffusions and implants, so I have 3V, 2V and
1.25V devices available.

Is the issue that the tools cannot keep
up?

No. Models is models is models....

...Jim Thompson

Best regards,
Spehro Pefhany
Click to expand...
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave
 
krw wrote:

In article <5ktMi.2078$hI7.1676@newssvr17.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

krw wrote:


In article <IxYKi.1745$P21.675@newssvr19.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...


Phil Hobbs wrote:



Joerg wrote:



Phil Hobbs wrote:



Joerg wrote:



Phil Hobbs wrote:



Joerg wrote:



Hello Folks,

Happens a lot these days, last time an hour ago: Someone is
looking for an analog/mixed signal engineer (this time low power
design). I could do it but they absolutely want to have someone on
staff. Which I can't do. So, I often try to convince them to
settle for a youngster who gets coached now and then, instead of
sitting there a year from now still trying to find the perfect
candidate.

Which US or Canadian university lets off the best analog/mixed
EEs? I know, I know, many can't even solder etc. It ain't like it
used to be. But there has got to be an alma mater that sticks out.
Or maybe a particular institute at one. And please, no pissing
contests.


Try out Montana State and the University of Colorado.


Thanks, that's a start. I just fear that guys who've lived in places
like that would not enjoy Bay Area life (I wouldn't). But definitely
worth a try.


It's amazing what a W-2 form can do to motivate someone--ask me how I
know, I've lived in NY for 20 years now.


Has to have the right numbers in there. Big bucks will motivate. It's
just that in the Bay Area it needs to be really big bucks.

It's also a matter of lifestyle. Country folks (like me) may tough it
out for a while but many of our neighbors are Bay Area transplants.
People who packed it all up the millisecond they retired.


I hate the Bay Area--I went to school there, and very nearly went to
work at HP Labs on Page Mill Road in Palo Alto, which was about six
blocks from where I lived at the time...but fortunately IBM's offer came
through before HP's. If I believed in chance, I'd feel lucky. As it
is, I feel blessed. ;)

Cheers,

Phil "Same lab for 18 years now" Hobbs


Poughkeepsie? That's where my father had to go, looong flights back in
them days. He worked at IBM in Germany.


I worked in P'ok for 19 years. Great place to be *from*.



It would definitely be too cold up there for my wife. Her ideal place
would be where winter simply doesn't happen. Like Hawaii, but there is
no work for me and getting to clients would take forever.


From there, we moved North 200 miles but looking to get out for
somewhat warmer climes now (the instant the house sells). The
Winters do suck and it looks like we'll be there one more. :-(


Good luck selling, won't be easy these days :-(


Yeah, buyers are pretty slim. Amazingly the higher-end and the
bottom stuff is selling. The stuff in the middle is sitting. We've
had some interest, but they all have had something to sell too.


A friend did that years ago and found Arkansas to be a good place. He
said they don't tax you out of the house there. Unfortunately he had a
fatal stroke a few years later.


We're looking at KY, though if I find something (long term) that's
interesting we'll go wherever. I'm kinda picky though. I've turned
down some possibilities that didn't look all that great. I think I
can afford to retire in KY, though I really don't want to. I'm doing
a short-term contract in OH now just to keep from going insane (and
help pay VT taxes). The work is fine but being away from home sucks.

I had a run-in with A-Fib early this year and am on medications that
keep my BP rather low (half of what it was when I was in A-Fib and
the sphygmomanometer tilted), so I hope I can escape a stroke. My
brother had one a few years ago. He still has many resulting from it
and can't talk well. His was likely caused by the doctors mucking
with his heart though.
Click to expand...
If that A-Fib isn't treatable in a classic way check this out:

http://www.prorhythm.com/HIFU_ablation_catheter.htm

Unfortunately they went with a bit too much flashplayer glitz so I
cannot see the site well. If you ever take that route rest asssured that
the patient iso has been designed by yours truly :)

--
Regards, Joerg

http://www.analogconsultants.com
 
In article <1191381789.178535.304840@57g2000hsv.googlegroups.com>,
miso@sushi.com says...
On Oct 1, 5:43 pm, krw <k...@att.bizzzz> wrote:
In article <1191229725.673736.51...@r29g2000hsg.googlegroups.com>,
m...@sushi.com says...
Click to expand...
<snip>

Oh yeah, the lack of soldering skills. That would require the student
to have actually built something. These younguns just know how to
program. You've seen the posts where a pic uP is the solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.

--
Keith

The problem with using a uP in such projects is if you are designing a
chip, you need to know how to do it with gates as often that is the
smallest and lowest power solution. The ability to hand craft logic is
disappearing rapidly, but is very much needed in mixed mode chips
which are not done on fine geometry processes.

If you're designing a chip you aren't going to be using a PIC, now
Click to expand...
are you? Hint: you won't likely be using "memory elements" and
combinatorial logic to build state machines either.

--
Keith
 
On Oct 2, 11:46 pm, JosephKK <joseph_barr...@sbcglobal.net> wrote:
m...@sushi.com m...@sushi.com posted to sci.electronics.design:



On Oct 1, 5:43 pm, krw <k...@att.bizzzz> wrote:
In article <1191229725.673736.51...@r29g2000hsg.googlegroups.com>,
m...@sushi.com says...

On Sep 30, 7:00 am, Joerg <notthisjoerg...@removethispacbell.net
wrote:
m...@sushi.com wrote:
On Sep 28, 12:01 pm, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 11:05:46 -0700, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Jim Thompson wrote:

On Fri, 28 Sep 2007 10:23:30 -0700, m...@sushi.com wrote:

On Sep 25, 3:45 pm, Joerg
notthisjoerg...@removethispacbell.net> wrote:

Hello Folks,

Happens a lot these days, last time an hour ago: Someone
is looking for an analog/mixed signal engineer (this
time low power design). I could do it but they
absolutely want to have someone on staff. Which I can't
do. So, I often try to convince them to settle for a
youngster who gets coached now and then, instead of
sitting there a year from now still trying to find the
perfect candidate.

Which US or Canadian university lets off the best
analog/mixed EEs? I know, I know, many can't even solder
etc. It ain't like it used to be. But there has got to
be an alma mater that sticks out. Or maybe a particular
institute at one. And please, no pissing contests.

--
Regards, Joerg

http://www.analogconsultants.com

I never interviewed a Georgia Tech grad, but Marshall
Leach, Jr. certain has the credentials.
http://users.ece.gatech.edu/~mleach/

I've interviewed plenty of UC Berkeley grads, and you
could find an analog designer there.This doesn't mean
every grad from UCB will know analog. The worse Ivy
League has got to be hands down MIT. I assume it was a
good university at one time given it's reputation. But I
interviewed undergrads that didn't know basic s-plane
stability issues, as if they don't teach classic control
theory anymore What little analog they knew was bipolar.

Probably only the duds applied to your company ;-)

However I never had control systems, per se, undergrad...
just a very
good math background to understand it if I needed it.
(and that was more than 45 years ago.)

Took non-linear control systems in grad school.
Instructor scared the piss out of me by announcing that,
to weed down the class size, he was giving an exam in
undergrad control systems... pass or walk :-(

I got the best score, and "A" as my final grade ;-)

A real surprise are the University of Toronto grads.
These guys know analog and signal processing.

I don't know any of those.

The trouble with low power (assuming you mean micropower)
is you really need to be a careful designer, especially
if the chip is designed to have low quiescent power but
handle high current. You also need the benefit of seeing
a few designs that didn't work, hopefully not your own
but from the company portfolio of goofs. One of the
classic bugs is designing micropower bandgaps, only to
have them get pumped from an on-board switcher. You have
to throw in all sorts of parasitics to make sure nothing
sneaks into your reference.

Yep :-(

Maybe that's why there are no (cheap) ultralow brethren to
the TLV431. If you want less than 10uA cathode current on
the board level it either becomes very expensive, very
large or you can forget about a reference.

Hardly a week goes by that I don't design a micro-power
BandGap into a chip ;-)

Dang, I just knew you'd say that ...

For us board level guys the situation looks pretty dire.

--
Regards, Joerg

http://www.analogconsultants.com

Micropower bandgaps show up in really mundane areas of chip
design nowadays, such as POR. Really overkill, but because
customers know it can be done, they expect it to be done. If
you reverse engineer Maxim chips, you'll find a bandgap
comparator circuit in the POR. Plenty of patents on such
circuits, but never litigated to my knowledge. They do save
power since the bandgap and comparator are folded into one
circuit.

Yes, on chips this is no problem but no company has marketed
those individually at a decent price. Meaning the sub-10uA
references are usually not very suitable for mass production
because you can't have a reference in there that costs more
than all the rest of the board. So we have to use tricks such
as pulsing and storing.

One reason why POR/BOR circuits contain precise references is
that the chips they are on need it elsewhere as well. For
example, a uC with an ADC on board. The often touted "cheat
reference" consisting of four equal resistors hung onto the
rail doesn't cut the mustard.

One of the trickier micropower circuits are those in thermal
shutdown. That is where leakage can really kill you, so
parasitics are required. However, it isn't exactly rocket
science.

BTW, I forgot to mention it, but UCLA has a fair amount of
analog design classes. Lastly, there is the Swiss Federal
Institute of Technology (or close to that). They have all
sorts of papers on dynamic biasing scheme, i.e. schemes to
make micropower op amps slew quickly by boosting tail
current, etc.

We didn't have much luck with UCLA so far. They didn't
understand my module specs and couldn't even solder. Had to let
them go. Europe would be an option but the immigration
procedure is a real hassle. Plus there will be an expensive
international move required unless you catch them right after
their degree. Europe doesn't have such an extreme shortage of
analog guys because larger companies there are often foolish.
Some of them consider anyone over 40 a geezer that needs to be
replaced by a kid. The consequences are very visible, for
example with NXP's web site.

--
Regards, Joerg

http://www.analogconsultants.com

Oh yeah, the lack of soldering skills. That would require the
student to have actually built something. These younguns just
know how to program. You've seen the posts where a pic uP is the
solutions to any
task, not a state machine comprised of memory elements and
combinational logic.

For the vast majority of applications, a uC is the right solution,
certainly over the discrete implementation you suggest.

--
Keith

The problem with using a uP in such projects is if you are designing
a chip, you need to know how to do it with gates as often that is
the smallest and lowest power solution. The ability to hand craft
logic is disappearing rapidly, but is very much needed in mixed mode
chips which are not done on fine geometry processes.

OK. I know this might sound a bit weird but, it seems that mixed mode
in not chasing minimum geometry devices like digital is. I can see
some reasons for this, but some of the issues can be reduced by some
thoughtful scale reduction. Is the issue that the tools cannot keep
up?
Click to expand...
Finer geometry means lower voltage. This can impact dynamic range. The
gain is lower due to higher gds and onset of impact ionization. This
is somewhat offset by higher gm, but the net effect is less gain.
Matching is better with finer geometry, and VT0 is better controlled
due to less influence by qss.
 
In article <yQVMi.57474$YL5.1045@newssvr29.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...
krw wrote:

In article <5ktMi.2078$hI7.1676@newssvr17.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...

krw wrote:


In article <IxYKi.1745$P21.675@newssvr19.news.prodigy.net>,
notthisjoergsch@removethispacbell.net says...


Phil Hobbs wrote:



Joerg wrote:



Phil Hobbs wrote:



Joerg wrote:



Phil Hobbs wrote:



Joerg wrote:



Hello Folks,

Happens a lot these days, last time an hour ago: Someone is
looking for an analog/mixed signal engineer (this time low power
design). I could do it but they absolutely want to have someone on
staff. Which I can't do. So, I often try to convince them to
settle for a youngster who gets coached now and then, instead of
sitting there a year from now still trying to find the perfect
candidate.

Which US or Canadian university lets off the best analog/mixed
EEs? I know, I know, many can't even solder etc. It ain't like it
used to be. But there has got to be an alma mater that sticks out.
Or maybe a particular institute at one. And please, no pissing
contests.


Try out Montana State and the University of Colorado.


Thanks, that's a start. I just fear that guys who've lived in places
like that would not enjoy Bay Area life (I wouldn't). But definitely
worth a try.


It's amazing what a W-2 form can do to motivate someone--ask me how I
know, I've lived in NY for 20 years now.


Has to have the right numbers in there. Big bucks will motivate. It's
just that in the Bay Area it needs to be really big bucks.

It's also a matter of lifestyle. Country folks (like me) may tough it
out for a while but many of our neighbors are Bay Area transplants.
People who packed it all up the millisecond they retired.


I hate the Bay Area--I went to school there, and very nearly went to
work at HP Labs on Page Mill Road in Palo Alto, which was about six
blocks from where I lived at the time...but fortunately IBM's offer came
through before HP's. If I believed in chance, I'd feel lucky. As it
is, I feel blessed. ;)

Cheers,

Phil "Same lab for 18 years now" Hobbs


Poughkeepsie? That's where my father had to go, looong flights back in
them days. He worked at IBM in Germany.


I worked in P'ok for 19 years. Great place to be *from*.



It would definitely be too cold up there for my wife. Her ideal place
would be where winter simply doesn't happen. Like Hawaii, but there is
no work for me and getting to clients would take forever.


From there, we moved North 200 miles but looking to get out for
somewhat warmer climes now (the instant the house sells). The
Winters do suck and it looks like we'll be there one more. :-(


Good luck selling, won't be easy these days :-(


Yeah, buyers are pretty slim. Amazingly the higher-end and the
bottom stuff is selling. The stuff in the middle is sitting. We've
had some interest, but they all have had something to sell too.


A friend did that years ago and found Arkansas to be a good place. He
said they don't tax you out of the house there. Unfortunately he had a
fatal stroke a few years later.


We're looking at KY, though if I find something (long term) that's
interesting we'll go wherever. I'm kinda picky though. I've turned
down some possibilities that didn't look all that great. I think I
can afford to retire in KY, though I really don't want to. I'm doing
a short-term contract in OH now just to keep from going insane (and
help pay VT taxes). The work is fine but being away from home sucks.

I had a run-in with A-Fib early this year and am on medications that
keep my BP rather low (half of what it was when I was in A-Fib and
the sphygmomanometer tilted), so I hope I can escape a stroke. My
brother had one a few years ago. He still has many resulting from it
and can't talk well. His was likely caused by the doctors mucking
with his heart though.


If that A-Fib isn't treatable in a classic way check this out:
Click to expand...
Mine was. Just a jump start, after six weeks on Coumadin, two of
which I was also on Lovenox (*expensive*).

http://www.prorhythm.com/HIFU_ablation_catheter.htm
Click to expand...
Interesting. They talked about ablation (not for me) and a friend
had it done. I was never clear why/how it worked. That site
explained it rather simply.

Unfortunately they went with a bit too much flashplayer glitz so I
cannot see the site well. If you ever take that route rest asssured that
the patient iso has been designed by yours truly :)
Click to expand...
I'm hoping I don't have to go through that again. What a pain,
daytime TV sucks, and not cheap either.

From what JohnL has said, he likely did the guts of the MRI machine I
was inspecting the innards of, too. Good company here! ;-)

--
Keith
 
On Wed, 3 Oct 2007 22:51:41 -0400, krw <krw@att.bizzzz> wrote:


I'm hoping I don't have to go through that again. What a pain,
daytime TV sucks, and not cheap either.

From what JohnL has said, he likely did the guts of the MRI machine I
was inspecting the innards of, too. Good company here! ;-)
Click to expand...
No, I only do the gradient drivers for small-bore stuff, like 4" and
8" machines for imaging lab animals, and even smaller micro-imaging
systems. Those can be dinky but fast high-precision, 100 amp, 170-volt
(17 KW per axis!) drivers. The full-body stuff is much higher power,
always switchers (Copley is pretty good) and slower and a lot noisier.

I had my head MRI'd earlier this year (spare me the predictable
witticisms, guys) and it was noisy and mostly boring. It's the
gradient coils that make the noise.

John
 
thank u very much u just raised my hope i thought that our
universities in egypt are so what too say primative in practical and
specially
in analog design
but for a change
i think analog/mixed design is reviving again it's the chance
i my self am designing a VGA for a communication channel AFE
well it may be a sand particale compared to the whole design but those
digital geeks using VHDL and denying the ability of human
to get new designs of his own can't do it never because it just need
the talent and someone loves Transistors
Analog era will never end it's the backbone of every thing even
digital they just need the finnest as they need less numbers these
days
any way if someone knows a college in US that will help an egyption
student like me to get his master at in analog/mixed design
(considering i can't be a penny)
i'll be glad of him

yours
gad elsayed,mina
 
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