VHDL CODING

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how to make a low pass fir filter in vhdl for filtering an ecg signal?
 
On 24/11/17 03:35, ovidesai503@gmail.com wrote:
how to make a low pass fir filter in vhdl for filtering an ecg signal?
This is very easy! Just 3 steps
1. Open your favorite editor and create a file named ecg_filter.vhd
2. Write the code
3. Save the file
 
On Thu, 23 Nov 2017 18:35:21 -0800, ovidesai503 wrote:

how to make a low pass fir filter in vhdl for filtering an ecg signal?

ECG signals have a bandwidth that's quite low, not even as high as
telephony-quality audio. This means that you can sample at frequencies
low enough to do all the filtering in software on a small, cheap
microcontroller.

Do you have a particular reason for wanting to do this in VHDL, as that
implies an FPGA or ASIC?

Allan
 

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