C
Chris Jones
Guest
On 03/09/2020 00:39, jlarkin@highlandsniptechnology.com wrote:
own ideal amplifier model. The transistor level models converge more
reliably too, in my experience. I have often had to modify vendor models
to stop them from preventing convergence or causing timestep too small
problems - that was a real waste of time. Simulation time is usually not
a problem these days, but if it were, then they could provide two
models, which they already have anyway.
Yes, though if I wanted the wrong answer quickly I could easily make myOn Wed, 2 Sep 2020 22:52:53 +1000, Chris Jones
lugnut808@spam.yahoo.com> wrote:
On 02/09/2020 04:17, John Larkin wrote:
On Tue, 1 Sep 2020 18:25:20 +0100, David Nadlinger
david@klickverbot.at> wrote:
On 01.09.20 5:44 pm, jlarkin@highlandsniptechnology.com wrote:
An ECL-output comparator is an open emitter, so add a cap and a weak
pulldown to make a stretcher. Since the \'582 is a dual, use the other
half as a discriminator on the stretched pulse.
The 582 is expensive. One of the slower parts, like a 561, would work
at these speeds.
Well, the source pulses in our case were ~5 ps, and only some 100 ps (at
the trigger level) out of the photodiode. For a one-off lab gadget like
this, it seemed less complex to first square it up as faithfully as
possible while keeping the rising edge intact, and then manipulate the
cleanly driven logic signals. Parts cost is of less relevance than the
inelegance of my solution here.
Are you pulse picking? I developed a pretty cool Pockels Cell driver
for a biggish laser company who didn\'t buy many.
http://www.highlandtechnology.com/DSS/T850DS.shtml
Using a dual like the ADCMP561 (the ADCMP582 is a single) for a
stretcher is indeed a good suggestion, though. Speaking of which, what
actually happens in practice if you drive fast comparators like those
with a pulse shorter than the specified minimum pulse width? I\'ve never
triedâ¦
Right, 582 is an expensive single. We use them when we absolutely have
to.
I wish Analog would add the ADCMP comparator models to LT Spice, so we
could simulate cases like the one you suggest.
I\'m not sure that I would trust the models when used outside the
datasheet operating conditions. I\'m sure they have internal transistor
level ADICE models that would accurately predict behaviour in these
conditions, but then IIRC they tend to give some idealised model to
customers instead of the accurate transistor level model. I can\'t
understand the motivation for this. The idea that this would stop a
competitor from reverse-engineering it is silly - 1. any serious
competitor would easily be able to open one up and extract the schematic
and 2. they probably already bought the competitor anyway.
Probably for simulation speed.
own ideal amplifier model. The transistor level models converge more
reliably too, in my experience. I have often had to modify vendor models
to stop them from preventing convergence or causing timestep too small
problems - that was a real waste of time. Simulation time is usually not
a problem these days, but if it were, then they could provide two
models, which they already have anyway.