Using Altera LPM megafunctions in Quartus II and VHDL in gen

[fp]

Shannon wrote:

Oh I forgot one last thing. What do people think of the book:

RTL Hardware Design Using VHDL: Coding for Efficiency, Portability,
and Scalability by Pong P. Chu.

I was thinking of adding that one to my new collection:

The Designer's Guide to VHDL, Second Edition By: Peter J. Ashenden
VHDL for Logic Synthesis By: Andrew Rushton
Circuit Design with VHDL By: Volnei A. Pedroni
A VHDL Synthesis Primer, Second Edition By: Jayaram Bhasker

Shannon,

I have both Ashenden and Chu books. The Ashenden one covers the VHDL
language and is good for modeling and testbench development. The Chu
book focuses on hardware design and covers only a subset of VHDL and is
good for synthesis. The two books are actually complementary. I feel
they are the leading texts in the two areas.

The Chu book advocates a coding style in which the VHDL code reflects
the hardware structure. I like this approach but some people feel it
is not "abstract" enough. There is a sample chapter on line and
you can read it and decide whether you like it or not.

There are two advanced features in the book. One is two chapters in
parameterized design. This will be very helpful if you are going to
develop reusable IP modules. The other is a comprehensive chapter on
synchronization and data transfer between two clock domains. It is an
important topic if you are serious about the digital system design.

Hope this helps.

S.C.