Transforming vector position to binary value

I owe some folk an apology.

"Jonathan Bromley" <jonathan.bromley@doulos.com> wrote in
message news:bovsnb$6o5$1$830fa7b3@news.demon.co.uk...

Don't be silly; if it's in a Xilinx appnote, it's _ipso facto_
conventional :)
Click to expand...
When I wrote that, my intent was only to poke mild fun at
the fact that Xilinx appnotes are such a pervasive part
of the FPGA design culture that they almost *define* what's
conventional. But I didn't write it very well, and it was
misunderstood as a slur on the quality of Xilinx material.
That would have been quite absurd and I unreservedly
apologise for any offence.

Xilinx apps people have done us all a great service over
the years by sharing a huge variety of tips and techniques
(some conventional, some highly creative). I've had many
occasions to be grateful for that.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail: jonathan.bromley@doulos.com
Fax: +44 (0)1425 471573 Web: http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
I can't agree with you on this. I fail to see how what you wrote could be
offensive, nor do I see how anyone who's in the FPGA world could conclude or
extrapolate that something is being said about the quality of Xilinx's app
notes. But, then again, I'm biased, I use their chips and love them.


~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
0_0_0_0_@pacbell.net
where
"0_0_0_0_" = "martineu"





"Jonathan Bromley" <jonathan.bromley@doulos.com> wrote in message
news:bpcpim$5v3$1$8300dec7@news.demon.co.uk...
I owe some folk an apology.

"Jonathan Bromley" <jonathan.bromley@doulos.com> wrote in
message news:bovsnb$6o5$1$830fa7b3@news.demon.co.uk...

Don't be silly; if it's in a Xilinx appnote, it's _ipso facto_
conventional :)

When I wrote that, my intent was only to poke mild fun at
the fact that Xilinx appnotes are such a pervasive part
of the FPGA design culture that they almost *define* what's
conventional. But I didn't write it very well, and it was
misunderstood as a slur on the quality of Xilinx material.
That would have been quite absurd and I unreservedly
apologise for any offence.

Xilinx apps people have done us all a great service over
the years by sharing a huge variety of tips and techniques
(some conventional, some highly creative). I've had many
occasions to be grateful for that.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW,
UK
Tel: +44 (0)1425 471223 mail:
jonathan.bromley@doulos.com
Fax: +44 (0)1425 471573 Web:
http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
Click to expand...
 
Mea culpa. I was the one who misinterpreted Jonathan's tongue-in-cheek
remarks and complained to him. Call me paranoid, but I don't like the
label "conventional".
Big misunderstanding. 'nough said.
Peter Alfke
====================
Martin Euredjian wrote:
I can't agree with you on this. I fail to see how what you wrote could be
offensive, nor do I see how anyone who's in the FPGA world could conclude or
extrapolate that something is being said about the quality of Xilinx's app
notes. But, then again, I'm biased, I use their chips and love them.

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
0_0_0_0_@pacbell.net
where
"0_0_0_0_" = "martineu"

"Jonathan Bromley" <jonathan.bromley@doulos.com> wrote in message
news:bpcpim$5v3$1$8300dec7@news.demon.co.uk...
I owe some folk an apology.

"Jonathan Bromley" <jonathan.bromley@doulos.com> wrote in
message news:bovsnb$6o5$1$830fa7b3@news.demon.co.uk...

Don't be silly; if it's in a Xilinx appnote, it's _ipso facto_
conventional :)

When I wrote that, my intent was only to poke mild fun at
the fact that Xilinx appnotes are such a pervasive part
of the FPGA design culture that they almost *define* what's
conventional. But I didn't write it very well, and it was
misunderstood as a slur on the quality of Xilinx material.
That would have been quite absurd and I unreservedly
apologise for any offence.

Xilinx apps people have done us all a great service over
the years by sharing a huge variety of tips and techniques
(some conventional, some highly creative). I've had many
occasions to be grateful for that.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW,
UK
Tel: +44 (0)1425 471223 mail:
jonathan.bromley@doulos.com
Fax: +44 (0)1425 471573 Web:
http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
Click to expand...
 
There's nothing conventional about any of this technology. An ex-boss of
mine used to say: "The second guy who saw the wheel thought it was obvious".
That, by the way, was the only sign of intelligence the guy displayed as far
as I know.

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
0_0_0_0_@pacbell.net
where
"0_0_0_0_" = "martineu"
 
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