Split Ground/Power planes for sensitive analog, vs glitchy digital...

[server]

On Sat, 22 Jul 2023 14:21:14 -0700, John Larkin
<jlarkin@highlandSNIPMEtechnology.com> wrote:

I work with one giant organization whose religion includes
single-point grounding not only for multiple boards in a box, but for
entire building-sized systems. That gets absurd. Sometimes their stuff
works, typically after six iterations and three or four years.

In industrial control systems you often use a 6 wire system, three
phases (P1, P2, P3), Neutral (N) Protective Earth (PE) and
Technical/Functional Earth (TE/FE) to carry different kinds of
currents and avoid harmful voltage drops.

The N is polluted by unbalanced single phase loads, especially those
with rectifiers. The N potential in different mains sockets on a site
can be several volts from each other. It is mot a good idea having
some kind of signal ground connection between equipment in two mains
sockets (especially in TN-C systems).

Originally he PE connection was intended to only carry the ground
fault current and reliably blow the fuse. Nowadays the mains EMC
filter capacitors are connected to the PE network, polluting the PE
network with all kinds of high frequency currents, causing
interference voltages between different equipment (even in TN-S).

TE/FE network is supposed not to carry any current and thus no voltage
differences between equipment and hence it can be as a reference for
unbalanced measurement.

Of course this requires that the N, PE and TE/FE networks are kept
separate within the whole industrial site and only connect together
the main busbars together at a single point with heavy jumpers.The
jumpers can be removed during commissioning to verify that N, PE and
TE/FE networks are really separate on the whole site.

Most problems with this system is when local installers note that an
equipment has separate N, PE and TE/FE connections that they are \"at
the sane\" potential and wire then together at the equipment and
connect all to N. :-( You really have to watch what these local
installers are doing.

Fortunately most industrial analog measurements are still 4-20 mA
current loop, which are more or less optoisolated and do not need a
separate ground reference. Signals can be transferred for hundreds of
meters. Serial connections are often optoisolated, Ethernet uses
standard magnetics and optical fibers are used especially in high
interference environments.

One should remember that there is NOT a universal ground potential but
all kinds of (very) local reference potentials at ,ore or less
different potentials..

 

[Phil Hobbs]

Ricky <gnuarm.deletethisbit@gmail.com> wrote:

On Saturday, July 22, 2023 at 5:59:09 PM UTC-4, Dimiter_Popoff wrote:
On 7/23/2023 0:39, John Larkin wrote:
On Sat, 22 Jul 2023 23:45:00 +0300, Dimiter_Popoff <d...@tgi-sci.com
wrote:

On 7/22/2023 23:17, Ricky wrote:
I took a class many years ago, where they talked about creating
separate power and ground planes for the analog and digital circuitry
on a board. Of course, the ground planes would be joined at one
location, typically under the chip that had both analog and digital
signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other than
over the analog ground planes, of course. Some people are telling me
this is a bad idea, as if I have totally separate ground planes.

Any comments?


Just think currents. I do split planes when I have currents I don\'t
want to see go into sensitive analog areas - e.g. DC-DC converters
can be nicely contained within themselves and connect to the main
GND plane where you want their output current to go through.

Basically the rule is do it with reason, if you don\'t know why
you split a plane just don\'t, luck will likely be on your side
if you don\'t.
And of course make sure not to route fast signals across splits,
the return current flows through the plane just underneath the trace;
cut that and you have a discontinuity, potentially a killer one.

I\'ve TDR tested microstrips that cross ground splits or cuts, or
transition from running over a ground to over a power pour. At 30 pS
resolution, the crossing is generally invisible.
How close to the discontinued plane was the next one the signal
would have gone through?

In a multilayer board, plane-plane capacitance is high so a trace
doesn\'t notice changing reference planes. AC-wise, the board is a
monolithic equipotential brick.
Well unless the alternate plane is far enough (say 1mm). But I guess
you are talking multiple layers, 0.1mm or so separation, which I
can believe (have not done that sort of test).

Hard right angles are usually TDR invisible too, or so small a
discontinuity that few signals would care.

There\'s a lot of folklore in PCB design.

Hard right angles sound more like folklore, I can understand how
some signals could care (not experienced any of it though).

The right angle trace effect is real, but people often use the wrong
explanation, such as \"the signal flying off the end of the wire, rather
than making the turn\" (I\'ve actually had someone tell me that with a
straight face). The simple fact is that the corner represents a lumped
capacitance in the trace. Often, that is of no consequence. Sometimes
it is of consequence. Depends on all the many details.

Rounding the corner makes the lumped capacitance a much, much lower value
to the point of vanishing. Making it a pair of 45 degree bends does a
pretty good job too.

Interestingly, up in the near IR, it gets really hard to make currents in
metals turn corners.

Cheers

Phil Hobbs
--
Dr Philip C D Hobbs Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics,
Electro-optics, Photonics, Analog Electronics

 

[John Larkin]

On Sun, 23 Jul 2023 17:25:00 -0000 (UTC), Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

Ricky <gnuarm.deletethisbit@gmail.com> wrote:
On Saturday, July 22, 2023 at 5:59:09?PM UTC-4, Dimiter_Popoff wrote:
On 7/23/2023 0:39, John Larkin wrote:
On Sat, 22 Jul 2023 23:45:00 +0300, Dimiter_Popoff <d...@tgi-sci.com
wrote:

On 7/22/2023 23:17, Ricky wrote:
I took a class many years ago, where they talked about creating
separate power and ground planes for the analog and digital circuitry
on a board. Of course, the ground planes would be joined at one
location, typically under the chip that had both analog and digital
signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other than
over the analog ground planes, of course. Some people are telling me
this is a bad idea, as if I have totally separate ground planes.

Any comments?


Just think currents. I do split planes when I have currents I don\'t
want to see go into sensitive analog areas - e.g. DC-DC converters
can be nicely contained within themselves and connect to the main
GND plane where you want their output current to go through.

Basically the rule is do it with reason, if you don\'t know why
you split a plane just don\'t, luck will likely be on your side
if you don\'t.
And of course make sure not to route fast signals across splits,
the return current flows through the plane just underneath the trace;
cut that and you have a discontinuity, potentially a killer one.

I\'ve TDR tested microstrips that cross ground splits or cuts, or
transition from running over a ground to over a power pour. At 30 pS
resolution, the crossing is generally invisible.
How close to the discontinued plane was the next one the signal
would have gone through?

In a multilayer board, plane-plane capacitance is high so a trace
doesn\'t notice changing reference planes. AC-wise, the board is a
monolithic equipotential brick.
Well unless the alternate plane is far enough (say 1mm). But I guess
you are talking multiple layers, 0.1mm or so separation, which I
can believe (have not done that sort of test).

Hard right angles are usually TDR invisible too, or so small a
discontinuity that few signals would care.

There\'s a lot of folklore in PCB design.

Hard right angles sound more like folklore, I can understand how
some signals could care (not experienced any of it though).

The right angle trace effect is real, but people often use the wrong
explanation, such as \"the signal flying off the end of the wire, rather
than making the turn\" (I\'ve actually had someone tell me that with a
straight face). The simple fact is that the corner represents a lumped
capacitance in the trace. Often, that is of no consequence. Sometimes
it is of consequence. Depends on all the many details.

Rounding the corner makes the lumped capacitance a much, much lower value
to the point of vanishing. Making it a pair of 45 degree bends does a
pretty good job too.


Interestingly, up in the near IR, it gets really hard to make currents in
metals turn corners.

Cheers

Phil Hobbs

Fiber optics dosn\'t like sharp bends either.

Here\'s a TDR experiment.

https://www.dropbox.com/scl/fi/73jkj4t784u6iobeuat4z/DSC02677.JPG?rlkey=db6elmspkbku683f1d8rp839e&raw=1

https://www.dropbox.com/scl/fi/agrqmwnp065le234otkdu/DSC02679.JPG?rlkey=htxsfqcviay7ds5cbu1tpu4jz&raw=1

The right angles are basically part of the background junk. The big
bump is the via. The connector transitions are pretty bumpy too.

RA\'s are not something worth worrying about for most logic design.
Maybe GigaComm logic with 35 ps edges. Certainly not CMOS.

 

[Gerhard Hoffmann]

Am 23.07.23 um 20:00 schrieb John Larkin:

Here\'s a TDR experiment.

https://www.dropbox.com/scl/fi/73jkj4t784u6iobeuat4z/DSC02677.JPG?rlkey=db6elmspkbku683f1d8rp839e&raw=1

https://www.dropbox.com/scl/fi/agrqmwnp065le234otkdu/DSC02679.JPG?rlkey=htxsfqcviay7ds5cbu1tpu4jz&raw=1

The right angles are basically part of the background junk. The big
bump is the via. The connector transitions are pretty bumpy too.

RA\'s are not something worth worrying about for most logic design.
Maybe GigaComm logic with 35 ps edges. Certainly not CMOS.

My experiment is about the same:



<
https://www.flickr.com/photos/137684711@N07/52973542168/in/datetaken/ >

The SMA on the 4 layer board is much much better with the cut outs on
layer 2 and 3. Maybe even very slightly inductive.
The normal SMA for 2 layers was a capacitive disaster on 4 layers. The 2
SMA transitions are where 2 \"ears\" are on the trace.

The setup:
<
https://www.flickr.com/photos/137684711@N07/52973631607/in/datetaken/ >

The result, TDR and through:
<
https://www.flickr.com/photos/137684711@N07/52973101726/in/datetaken/ >
The microstrip is only 10 mils wide, correct is 11.5 mil for 50 Ohms.


Risetime is still OK, including port savers and semi rigid:
<
https://www.flickr.com/photos/137684711@N07/52973557048/in/datetaken/lightbox/

cheers, Gerhard

 

[whit3rd]

On Sunday, July 23, 2023 at 11:00:42 AM UTC-7, John Larkin wrote:

On Sun, 23 Jul 2023 17:25:00 -0000 (UTC), Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

Ricky <gnuarm.del...@gmail.com> wrote:
On Saturday, July 22, 2023 at 5:59:09?PM UTC-4, Dimiter_Popoff wrote:
On 7/23/2023 0:39, John Larkin wrote:
On Sat, 22 Jul 2023 23:45:00 +0300, Dimiter_Popoff <d...@tgi-sci.com
wrote:

On 7/22/2023 23:17, Ricky wrote:
I took a class many years ago, where they talked about creating
separate power and ground planes for the analog and digital circuitry
on a board. Of course, the ground planes would be joined at one
location, typically under the chip that had both analog and digital
signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other than
over the analog ground planes, of course. Some people are telling me
this is a bad idea, as if I have totally separate ground planes.

Any comments?


Just think currents. I do split planes when I have currents I don\'t
want to see go into sensitive analog areas - e.g. DC-DC converters
can be nicely contained within themselves and connect to the main
GND plane where you want their output current to go through.

Basically the rule is do it with reason, if you don\'t know why
you split a plane just don\'t, luck will likely be on your side
if you don\'t.
And of course make sure not to route fast signals across splits,
the return current flows through the plane just underneath the trace;
cut that and you have a discontinuity, potentially a killer one.

I\'ve TDR tested microstrips that cross ground splits or cuts, or
transition from running over a ground to over a power pour. At 30 pS
resolution, the crossing is generally invisible.
How close to the discontinued plane was the next one the signal
would have gone through?

In a multilayer board, plane-plane capacitance is high so a trace
doesn\'t notice changing reference planes. AC-wise, the board is a
monolithic equipotential brick.
Well unless the alternate plane is far enough (say 1mm). But I guess
you are talking multiple layers, 0.1mm or so separation, which I
can believe (have not done that sort of test).

Hard right angles are usually TDR invisible too, or so small a
discontinuity that few signals would care.

There\'s a lot of folklore in PCB design.

Hard right angles sound more like folklore, I can understand how
some signals could care (not experienced any of it though).

The right angle trace effect is real, but people often use the wrong
explanation, such as \"the signal flying off the end of the wire, rather
than making the turn\" (I\'ve actually had someone tell me that with a
straight face). The simple fact is that the corner represents a lumped
capacitance in the trace. Often, that is of no consequence. Sometimes
it is of consequence. Depends on all the many details.

Both capacitance and inductance are affected, it isn\'t the same
impedance-per-mm as the straight-line trace.

> Fiber optics doesn\'t like sharp bends either.

That is a result of internal strains, which REALLY change the impedance
(even obliterate the anisotropy of the medium); gotta love the polarized
light show. It\'s a very similar phenomenon, for all that it\'s photon
waves instead of sea-of-electrons.

It makes some pretty pictures
<https://www.ptc-stress.com/wp-content/uploads/2021/04/3-preform.jpg>

 

[John Larkin]

On Sun, 23 Jul 2023 21:09:15 +0200, Gerhard Hoffmann <dk4xp@arcor.de>
wrote:

Am 23.07.23 um 20:00 schrieb John Larkin:

Here\'s a TDR experiment.

https://www.dropbox.com/scl/fi/73jkj4t784u6iobeuat4z/DSC02677.JPG?rlkey=db6elmspkbku683f1d8rp839e&raw=1

https://www.dropbox.com/scl/fi/agrqmwnp065le234otkdu/DSC02679.JPG?rlkey=htxsfqcviay7ds5cbu1tpu4jz&raw=1

The right angles are basically part of the background junk. The big
bump is the via. The connector transitions are pretty bumpy too.

RA\'s are not something worth worrying about for most logic design.
Maybe GigaComm logic with 35 ps edges. Certainly not CMOS.

My experiment is about the same:




https://www.flickr.com/photos/137684711@N07/52973542168/in/datetaken/

The SMA on the 4 layer board is much much better with the cut outs on
layer 2 and 3. Maybe even very slightly inductive.
The normal SMA for 2 layers was a capacitive disaster on 4 layers. The 2
SMA transitions are where 2 \"ears\" are on the trace.

The setup:

https://www.flickr.com/photos/137684711@N07/52973631607/in/datetaken/

The result, TDR and through:

https://www.flickr.com/photos/137684711@N07/52973101726/in/datetaken/
The microstrip is only 10 mils wide, correct is 11.5 mil for 50 Ohms.


Risetime is still OK, including port savers and semi rigid:

https://www.flickr.com/photos/137684711@N07/52973557048/in/datetaken/lightbox/



cheers, Gerhard

Nice.

The serious microwave SMAs cost serious money, so we buy a very nice
Shining Star edge-launch that has a fat center pin, so that gets a fat
pad which is a lumped capacitance. The fix for that is to cut away
some of the internal planes under the pin.

We simulated that with ATLC and it works very well.

https://www.dropbox.com/scl/fo/rvggb2up0rdmvblzqe6lw/h?rlkey=i0q04sxzs0vbf6dxp3pr6zx0p&dl=0

\"Rob1\" is the final stackup.

 

[Phil Hobbs]

On 2023-07-22 17:29, John Larkin wrote:

On Sat, 22 Jul 2023 13:38:40 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 22. juli 2023 kl. 22.17.42 UTC+2 skrev Ricky:
I took a class many years ago, where they talked about creating
separate power and ground planes for the analog and digital
circuitry on a board. Of course, the ground planes would be
joined at one location, typically under the chip that had both
analog and digital signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other
than over the analog ground planes, of course. Some people are
telling me this is a bad idea, as if I have totally separate
ground planes.

Any comments?


https://resources.altium.com/p/splitting-planes-good-bad-and-ugly


\"But, perhaps one of the most important takeaways is that you should
NEVER, EVER split ground planes.\"

That\'s all you need to read.

I have a few times cut a C shape into a ground plane to create a
peninsula that is mostly free of ground loop potentials. I tucked
some nanovolt opamp circuits there. But that\'s not a separate plane
and the open side of the C only adds micro-ohms to the peninsula from
the overall plane.

That trick is also good with surface mount voltage references, which
tend to be vulnerable to board stress.

Sensitive high-Z things also benefit from bootstrapping a bit of the
ground plane.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

On 2023-07-24 00:21, whit3rd wrote:

On Sunday, July 23, 2023 at 11:00:42 AM UTC-7, John Larkin wrote:
On Sun, 23 Jul 2023 17:25:00 -0000 (UTC), Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:

Ricky <gnuarm.del...@gmail.com> wrote:
On Saturday, July 22, 2023 at 5:59:09?PM UTC-4, Dimiter_Popoff wrote:
On 7/23/2023 0:39, John Larkin wrote:
On Sat, 22 Jul 2023 23:45:00 +0300, Dimiter_Popoff <d...@tgi-sci.com
wrote:

On 7/22/2023 23:17, Ricky wrote:
I took a class many years ago, where they talked about creating
separate power and ground planes for the analog and digital circuitry
on a board. Of course, the ground planes would be joined at one
location, typically under the chip that had both analog and digital
signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other than
over the analog ground planes, of course. Some people are telling me
this is a bad idea, as if I have totally separate ground planes.

Any comments?


Just think currents. I do split planes when I have currents I don\'t
want to see go into sensitive analog areas - e.g. DC-DC converters
can be nicely contained within themselves and connect to the main
GND plane where you want their output current to go through.

Basically the rule is do it with reason, if you don\'t know why
you split a plane just don\'t, luck will likely be on your side
if you don\'t.
And of course make sure not to route fast signals across splits,
the return current flows through the plane just underneath the trace;
cut that and you have a discontinuity, potentially a killer one.

I\'ve TDR tested microstrips that cross ground splits or cuts, or
transition from running over a ground to over a power pour. At 30 pS
resolution, the crossing is generally invisible.
How close to the discontinued plane was the next one the signal
would have gone through?

In a multilayer board, plane-plane capacitance is high so a trace
doesn\'t notice changing reference planes. AC-wise, the board is a
monolithic equipotential brick.
Well unless the alternate plane is far enough (say 1mm). But I guess
you are talking multiple layers, 0.1mm or so separation, which I
can believe (have not done that sort of test).

Hard right angles are usually TDR invisible too, or so small a
discontinuity that few signals would care.

There\'s a lot of folklore in PCB design.

Hard right angles sound more like folklore, I can understand how
some signals could care (not experienced any of it though).

The right angle trace effect is real, but people often use the wrong
explanation, such as \"the signal flying off the end of the wire, rather
than making the turn\" (I\'ve actually had someone tell me that with a
straight face). The simple fact is that the corner represents a lumped
capacitance in the trace. Often, that is of no consequence. Sometimes
it is of consequence. Depends on all the many details.

Both capacitance and inductance are affected, it isn\'t the same
impedance-per-mm as the straight-line trace.

Fiber optics doesn\'t like sharp bends either.

That is a result of internal strains, which REALLY change the impedance
(even obliterate the anisotropy of the medium); gotta love the polarized
light show. It\'s a very similar phenomenon, for all that it\'s photon
waves instead of sea-of-electrons.

It makes some pretty pictures
https://www.ptc-stress.com/wp-content/uploads/2021/04/3-preform.jpg

The bend effect birefringence is quite small, and doesn\'t scatter light
out of the fiber--it just screws up the polarization. Polarization
compensators rely on bend birefringence to make the equivalent of three
rotatable retarders--two quarter-wave and one half-wave. Thor Labs has
a page on that:
<https://www.thorlabs.com/newgrouppage9.cfm?objectgroup_ID=343>.

The light loss that you see when you bend the fiber in your fingers is
actually a coupled-mode effect. When you bend the fiber into a circle,
there is some radius at which the fiber mode will phase-match to a
free-space wave in the cladding.

As you bend it tighter, that radius gets closer, and eventually the
resulting coupling gets pretty strong.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[John Larkin]

On Tue, 25 Jul 2023 13:56:19 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-07-22 17:29, John Larkin wrote:
On Sat, 22 Jul 2023 13:38:40 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 22. juli 2023 kl. 22.17.42 UTC+2 skrev Ricky:
I took a class many years ago, where they talked about creating
separate power and ground planes for the analog and digital
circuitry on a board. Of course, the ground planes would be
joined at one location, typically under the chip that had both
analog and digital signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other
than over the analog ground planes, of course. Some people are
telling me this is a bad idea, as if I have totally separate
ground planes.

Any comments?


https://resources.altium.com/p/splitting-planes-good-bad-and-ugly


\"But, perhaps one of the most important takeaways is that you should
NEVER, EVER split ground planes.\"

That\'s all you need to read.

I have a few times cut a C shape into a ground plane to create a
peninsula that is mostly free of ground loop potentials. I tucked
some nanovolt opamp circuits there. But that\'s not a separate plane
and the open side of the C only adds micro-ohms to the peninsula from
the overall plane.


That trick is also good with surface mount voltage references, which
tend to be vulnerable to board stress.

Sensitive high-Z things also benefit from bootstrapping a bit of the
ground plane.

Cheers

Phil Hobbs

I recently tried bootstrapping a bit of plane. It\'s a triggered
phase-locked 50 MHz Colpitts oscillator and the horrible tempco of the
FR4 capacitance (something like +9000 PPM/K) was wrecking the
oscillator stability.

So I drove a guard patch, cut out of the ground plane under the
oscillator, from the source of the SAV541 oscillator transistor. That
made things worse.

It worked better to just cut a square-ish hole in the layer 2 ground
plane and some power planes below, to reduce the overall capacitances.

I had a batch of custom 3.3 pF N4500 caps made too, to tweak the
tempco to flat at the nominal operating temperature.

Bootstrapping a bit of plane makes sense for lower-frequency stuff.
But the bootstrap driver needs to be super low noise too.

 

[Phil Hobbs]

John Larkin <jlarkin@highlandSNIPMEtechnology.com> wrote:

On Tue, 25 Jul 2023 13:56:19 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 2023-07-22 17:29, John Larkin wrote:
On Sat, 22 Jul 2023 13:38:40 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

lørdag den 22. juli 2023 kl. 22.17.42 UTC+2 skrev Ricky:
I took a class many years ago, where they talked about creating
separate power and ground planes for the analog and digital
circuitry on a board. Of course, the ground planes would be
joined at one location, typically under the chip that had both
analog and digital signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other
than over the analog ground planes, of course. Some people are
telling me this is a bad idea, as if I have totally separate
ground planes.

Any comments?


https://resources.altium.com/p/splitting-planes-good-bad-and-ugly


\"But, perhaps one of the most important takeaways is that you should
NEVER, EVER split ground planes.\"

That\'s all you need to read.

I have a few times cut a C shape into a ground plane to create a
peninsula that is mostly free of ground loop potentials. I tucked
some nanovolt opamp circuits there. But that\'s not a separate plane
and the open side of the C only adds micro-ohms to the peninsula from
the overall plane.


That trick is also good with surface mount voltage references, which
tend to be vulnerable to board stress.

Sensitive high-Z things also benefit from bootstrapping a bit of the
ground plane.

Cheers

Phil Hobbs

I recently tried bootstrapping a bit of plane. It\'s a triggered
phase-locked 50 MHz Colpitts oscillator and the horrible tempco of the
FR4 capacitance (something like +9000 PPM/K) was wrecking the
oscillator stability.

So I drove a guard patch, cut out of the ground plane under the
oscillator, from the source of the SAV541 oscillator transistor. That
made things worse.

It worked better to just cut a square-ish hole in the layer 2 ground
plane and some power planes below, to reduce the overall capacitances.

I had a batch of custom 3.3 pF N4500 caps made too, to tweak the
tempco to flat at the nominal operating temperature.

Bootstrapping a bit of plane makes sense for lower-frequency stuff.

I do it with faster stuff than that, and it works great, eventually.

> But the bootstrap driver needs to be super low noise too.

Yup. Hundreds of picovolts to maybe a nanovolt in 1 Hz

It’s interesting that it didn’t help the tempco problem. I expect it may
have been all the different phases of the 50 MHz that occur in an
oscillator—the bootstrap waveform couldn’t be right for all of them.

TIAs are simpler that way.

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC /
Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics

 

[server]

On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
<gnuarm.deletethisbit@gmail.com> wrote:

I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board. Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?

That reminds me about some ancient EL families operating with
something like Vcc= +1 V and Vee= -4 V so that logical levels were
around Vbb=0 V.

With modern 3.3 V logic families, why not operate with a bipolar (say
+/- 1.65 V) supply and the analog side at say +/-5 V ? There would be
no high currents in the 0 V plane, it would just carry the return
current of signals between the analog and digital worlds.

 

[Anthony William Sloman]

On Wednesday, July 26, 2023 at 1:47:57 PM UTC+10, upsid...@downunder.com wrote:

On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:
I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board. Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?
That reminds me about some ancient EL families operating with
something like Vcc= +1 V and Vee= -4 V so that logical levels were
around Vbb=0 V.

With modern 3.3 V logic families, why not operate with a bipolar (say
+/- 1.65 V) supply and the analog side at say +/-5 V ? There would be
no high currents in the 0 V plane, it would just carry the return
current of signals between the analog and digital worlds.

It\'s been done - sort of.

LVDS used sub-ECL voltage swings from +1.0V up to 1.4V, and differential signalling

https://www.ti.com/lit/an/snla165/snla165.pdf

If you need a quiet back-plane that\'s one way to get it.

--
Bill Sloman, Sydney

 

[Jasen Betts]

On 2023-07-23, Anthony William Sloman <bill.sloman@ieee.org> wrote:

On Sunday, July 23, 2023 at 7:21:31 AM UTC+10, John Larkin wrote:
On Sat, 22 Jul 2023 13:43:13 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:
On Saturday, July 22, 2023 at 4:33:25?PM UTC-4, John Larkin wrote:
On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:

I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board. Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?

Almost always best is one solid ground plane for everything, bolted to
the metal case through every available spacer and bracket and
connector shell. We standardize on layer 2 for the ground plane, and
occasionally also layer 5 (of 6) mostly to keep the copper balanced
when we don\'t need a bunch of power planes..

Handle any microvolt ground loops properly of course.

There\'s no reason for any two grounds to be at different potentials.

It there\'s current flowing through either of them. there\'s a [potential drop along the current path.

The IC people think *their* single chip is the center of the universe, and that the two system grounds should only meet under their single chip.

Hmmm... Why would two ground planes be at different potentials if they are connected? Perhaps you missed where I said, \"joined at one location\".

Don\'t be obnoxious or nobody will want to help.

It\'s a legitimate question. The non-obnoxious response would have been to draw his attention the fact there there\'s always a voltage drop along a current path.

I do dream of super-conducting ground planes, but they are probably a long way off.

Last week an ambient superconductor was announced, could take a few
years until it\'s in commercial production. (also contains lead, so they
may need to find an alternative - also could be a mistake these guys have a
reputation)

--
Jasen.
🇺🇦 Слава Україні

 

[Flyguy]

On Monday, July 31, 2023 at 1:30:44 AM UTC-7, Jasen Betts wrote:

On 2023-07-23, Anthony William Sloman <bill....@ieee.org> wrote:
On Sunday, July 23, 2023 at 7:21:31 AM UTC+10, John Larkin wrote:
On Sat, 22 Jul 2023 13:43:13 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:
On Saturday, July 22, 2023 at 4:33:25?PM UTC-4, John Larkin wrote:
On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:

I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board. Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.

The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?

Almost always best is one solid ground plane for everything, bolted to
the metal case through every available spacer and bracket and
connector shell. We standardize on layer 2 for the ground plane, and
occasionally also layer 5 (of 6) mostly to keep the copper balanced
when we don\'t need a bunch of power planes..

Handle any microvolt ground loops properly of course.

There\'s no reason for any two grounds to be at different potentials..

It there\'s current flowing through either of them. there\'s a [potential drop along the current path.

The IC people think *their* single chip is the center of the universe, and that the two system grounds should only meet under their single chip.

Hmmm... Why would two ground planes be at different potentials if they are connected? Perhaps you missed where I said, \"joined at one location\".

Don\'t be obnoxious or nobody will want to help.

It\'s a legitimate question. The non-obnoxious response would have been to draw his attention the fact there there\'s always a voltage drop along a current path.

I do dream of super-conducting ground planes, but they are probably a long way off.
Last week an ambient superconductor was announced, could take a few
years until it\'s in commercial production. (also contains lead, so they
may need to find an alternative - also could be a mistake these guys have a
reputation)

--
Jasen.
🇺🇦 Слава Україні

Here is an excellent guide for high-speed pc board layout:
https://s3vi.ndc.nasa.gov/ssri-kb/static/resources/High-Speed%20PCB%20Design%20Guide.pdf

 

[Joerg]

On 7/22/23 1:43 PM, Ricky wrote:

On Saturday, July 22, 2023 at 4:33:25 PM UTC-4, John Larkin wrote:
On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:

I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board. ...

For the vast majority of situations that is a bad idea. Often tought by
acedemians who never really designed anything meaningful for industry,
inclusing some at our university.

Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.

And like John said, of course that chip is the only one in the universe
that needs access to two or more of the grounds

The minute there is one more device like that the whole concept goes
kablouie.

The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?
Almost always best is one solid ground plane for everything, bolted to
the metal case through every available spacer and bracket and
connector shell. We standardize on layer 2 for the ground plane, and
occasioanlly also layer 5 (of 6) mostly to keep the copper balanced
when we don\'t need a bunch of power planes..

Handle any microvolt ground loops properly of course.

There\'s no reason for any two grounds to be at different potentials.

The IC people think *their* single chip is the center of the universe,
and that the two system grounds should only meet under their single
chip.

Hmmm... Why would two ground planes be at different potentials if they are connected? Perhaps you missed where I said, \"joined at one location\".

Think of two grounds as a dipole. Yeah, they are connected somewhere in
the center but in RF terms that hardly means anything. Case in point:
All the yagi antennas I ever built have a driven element that is one
contiguous aluminum tube, no separation in the middle. Yet they radiate
and receive as calculated. When you look at the gamma match concept I
use to feed those it might become more clear where disaster can strike
in a split ground system:

https://www.electronics-notes.com/articles/antennas-propagation/antenna-theory/antenna-gamma-impedance-matching.php

Another (noisy) IC, transistor stage or whatever somewhere off center
connecting to one of the ground planes will make the whole contraption
radiate. That can cause you to fail radiated and sometimes even
conducted EMC. It also \"receives\", which may cause you to fail the
susceptibility test which is nowadays part of the EMC test protocol.

The idea is that some circuitry, such as a switching power converter or a power hungry IC, puts large currents in the ground plane, which do not limit themselves to the immediate area under that circuit.

Connecting the two ground planes at one spot, limits the impact of these currents to the digital plane.

In practice it usually doesn\'t. RF always tries to find another path
around it, and finds it.

Of course, there is always more to a design than one such detail. This still requires the elimination of ground loops from other ground connections, such as off board.

Exactly, and in practice you often can\'t. Outside stuff has to connect
to your system. Mains power, protective earth, some sensors, maybe a
keyboard, a touch screen that by its very nature can be touched by a
conductive human finger, and so on.

I\'ve been on the beat for many decades. In all that time I never saw a
mixed-signal design with a split ground that worked reliably. Many times
I was called in as a consultant to \"make it work\", upon which I removed
all the ground splits. Often against vehement protests on the part of
client engineers. My own designs never had split grounds and they always
worked.

There are very few exceptions. In sensitive audio setups an occasional
split can make sense but in my experience even there it\'s rare. Then
there are safety rules. For example, in med-tech we must often maintain
full defibrillator-proof isolation when used in cardiac situations,
meaning it has to withstand 5kV. There the grounds aren\'t connected
anywhere.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[John Walliker]

On Monday, 31 July 2023 at 20:14:46 UTC+1, Joerg wrote:

On 7/22/23 1:43 PM, Ricky wrote:
On Saturday, July 22, 2023 at 4:33:25 PM UTC-4, John Larkin wrote:
On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:

I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board.. ...


For the vast majority of situations that is a bad idea. Often tought by
acedemians who never really designed anything meaningful for industry,
inclusing some at our university.
Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.
And like John said, of course that chip is the only one in the universe
that needs access to two or more of the grounds

The minute there is one more device like that the whole concept goes
kablouie.

The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?
Almost always best is one solid ground plane for everything, bolted to
the metal case through every available spacer and bracket and
connector shell. We standardize on layer 2 for the ground plane, and
occasioanlly also layer 5 (of 6) mostly to keep the copper balanced
when we don\'t need a bunch of power planes..

Handle any microvolt ground loops properly of course.

There\'s no reason for any two grounds to be at different potentials.

The IC people think *their* single chip is the center of the universe,
and that the two system grounds should only meet under their single
chip.

Hmmm... Why would two ground planes be at different potentials if they are connected? Perhaps you missed where I said, \"joined at one location\".

Think of two grounds as a dipole. Yeah, they are connected somewhere in
the center but in RF terms that hardly means anything. Case in point:
All the yagi antennas I ever built have a driven element that is one
contiguous aluminum tube, no separation in the middle. Yet they radiate
and receive as calculated. When you look at the gamma match concept I
use to feed those it might become more clear where disaster can strike
in a split ground system:

https://www.electronics-notes.com/articles/antennas-propagation/antenna-theory/antenna-gamma-impedance-matching.php

Another (noisy) IC, transistor stage or whatever somewhere off center
connecting to one of the ground planes will make the whole contraption
radiate. That can cause you to fail radiated and sometimes even
conducted EMC. It also \"receives\", which may cause you to fail the
susceptibility test which is nowadays part of the EMC test protocol.
The idea is that some circuitry, such as a switching power converter or a power hungry IC, puts large currents in the ground plane, which do not limit themselves to the immediate area under that circuit.

Connecting the two ground planes at one spot, limits the impact of these currents to the digital plane.

In practice it usually doesn\'t. RF always tries to find another path
around it, and finds it.
Of course, there is always more to a design than one such detail. This still requires the elimination of ground loops from other ground connections, such as off board.

Exactly, and in practice you often can\'t. Outside stuff has to connect
to your system. Mains power, protective earth, some sensors, maybe a
keyboard, a touch screen that by its very nature can be touched by a
conductive human finger, and so on.

I\'ve been on the beat for many decades. In all that time I never saw a
mixed-signal design with a split ground that worked reliably. Many times
I was called in as a consultant to \"make it work\", upon which I removed
all the ground splits. Often against vehement protests on the part of
client engineers. My own designs never had split grounds and they always
worked.

+1 John

There are very few exceptions. In sensitive audio setups an occasional
split can make sense but in my experience even there it\'s rare. Then
there are safety rules. For example, in med-tech we must often maintain
full defibrillator-proof isolation when used in cardiac situations,
meaning it has to withstand 5kV. There the grounds aren\'t connected
anywhere.

--
Regards, Joerg

http://www.analogconsultants.com/

 

[Ricky]

On Monday, July 31, 2023 at 3:14:46 PM UTC-4, Joerg wrote:

On 7/22/23 1:43 PM, Ricky wrote:
On Saturday, July 22, 2023 at 4:33:25 PM UTC-4, John Larkin wrote:
On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:

I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board.. ...


For the vast majority of situations that is a bad idea. Often tought by
acedemians who never really designed anything meaningful for industry,
inclusing some at our university.

\"Acedemians\" such as the chip designers? I guess their chips are not assembled onto boards for qualification.

Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.
And like John said, of course that chip is the only one in the universe
that needs access to two or more of the grounds

The minute there is one more device like that the whole concept goes
kablouie.

That simply shows you don\'t understand the concept. Larkin says he uses the same idea. He simply rationalizes it as being different by saying he only cuts the area on \"three sides\" rather than talking about how they are connected.

You are ignoring that each chip which needs such a scheme can have its own analog ground area. Or, if the two chips can be placed side by side, they can share the connection between the common analog and digital ground planes. If neither is possible, then, no, this won\'t work. But then there are exactly zero techniques that work for every situation. In particular, the single, board wide ground area is not the best approach for some designs.

The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?
Almost always best is one solid ground plane for everything, bolted to
the metal case through every available spacer and bracket and
connector shell. We standardize on layer 2 for the ground plane, and
occasioanlly also layer 5 (of 6) mostly to keep the copper balanced
when we don\'t need a bunch of power planes..

Handle any microvolt ground loops properly of course.

There\'s no reason for any two grounds to be at different potentials.

The IC people think *their* single chip is the center of the universe,
and that the two system grounds should only meet under their single
chip.

Hmmm... Why would two ground planes be at different potentials if they are connected? Perhaps you missed where I said, \"joined at one location\".

Think of two grounds as a dipole. Yeah, they are connected somewhere in
the center but in RF terms that hardly means anything. Case in point:
All the yagi antennas I ever built have a driven element that is one
contiguous aluminum tube, no separation in the middle. Yet they radiate
and receive as calculated. When you look at the gamma match concept I
use to feed those it might become more clear where disaster can strike
in a split ground system:

https://www.electronics-notes.com/articles/antennas-propagation/antenna-theory/antenna-gamma-impedance-matching.php

Another (noisy) IC, transistor stage or whatever somewhere off center
connecting to one of the ground planes will make the whole contraption
radiate. That can cause you to fail radiated and sometimes even
conducted EMC. It also \"receives\", which may cause you to fail the
susceptibility test which is nowadays part of the EMC test protocol.

I don\'t know why you are trying to make antennas on the ground plane. There should be very, very little current flowing through the connection between the analog and digital ground areas, so very insignificant radiation.

As for susceptibility, how does the connection make the design more susceptible? Even an intact ground plane is susceptible to received radiation. It produces very little voltage because of the low resistance of the plane. Two connected planes can be connected with as low a resistance as desired, again, minimizing the induced voltage.

The idea is that some circuitry, such as a switching power converter or a power hungry IC, puts large currents in the ground plane, which do not limit themselves to the immediate area under that circuit.

Connecting the two ground planes at one spot, limits the impact of these currents to the digital plane.

In practice it usually doesn\'t. RF always tries to find another path
around it, and finds it.

You aren\'t making sense. What RF from what source? What other paths?

Of course, there is always more to a design than one such detail. This still requires the elimination of ground loops from other ground connections, such as off board.

Exactly, and in practice you often can\'t. Outside stuff has to connect
to your system. Mains power, protective earth, some sensors, maybe a
keyboard, a touch screen that by its very nature can be touched by a
conductive human finger, and so on.

I\'ve been on the beat for many decades. In all that time I never saw a
mixed-signal design with a split ground that worked reliably. Many times
I was called in as a consultant to \"make it work\", upon which I removed
all the ground splits. Often against vehement protests on the part of
client engineers. My own designs never had split grounds and they always
worked.

I can\'t speak to designs I know nothing of. When you talk about \"split planes\", you make it sound like they are not connected. My concept is exactly like the scheme that Larkin uses. We only differ by how much connection is made between them. Larkin is simply afraid to extend the scheme to its fullest, practical use.

There are very few exceptions. In sensitive audio setups an occasional
split can make sense but in my experience even there it\'s rare.

Ok, so then you agree with the concept. Thank you.

Then
there are safety rules. For example, in med-tech we must often maintain
full defibrillator-proof isolation when used in cardiac situations,
meaning it has to withstand 5kV. There the grounds aren\'t connected
anywhere.

And yet, you manage to not have excessive noise, yes?

You seem to actually be saying all methods work. Ok, I won\'t disagree. I simply find the use of borders around noisy, or sensitive circuits, is a good way to isolate noise. You seem to agree, but, like Larkin, get all wigged out by talking about this being a reasonable idea, even though you eventually admit that it works.

I think enough has been said about this. There\'s nothing new in your post. You are agreeing with Larkin, who also agrees with me. You both simply have trouble admitting that you agree.

--

Rick C.

--- Get 1,000 miles of free Supercharging
--- Tesla referral code - https://ts.la/richard11209

 

[John Larkin]

On Mon, 31 Jul 2023 15:10:02 -0700 (PDT), Ricky
<gnuarm.deletethisbit@gmail.com> wrote:

On Monday, July 31, 2023 at 3:14:46?PM UTC-4, Joerg wrote:
On 7/22/23 1:43 PM, Ricky wrote:
On Saturday, July 22, 2023 at 4:33:25?PM UTC-4, John Larkin wrote:
On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:

I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board. ...


For the vast majority of situations that is a bad idea. Often tought by
acedemians who never really designed anything meaningful for industry,
inclusing some at our university.

\"Acedemians\" such as the chip designers? I guess their chips are not assembled onto boards for qualification.


Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.
And like John said, of course that chip is the only one in the universe
that needs access to two or more of the grounds

The minute there is one more device like that the whole concept goes
kablouie.

That simply shows you don\'t understand the concept. Larkin says he uses the same idea. He simply rationalizes it as being different by saying he only cuts the area on \"three sides\" rather than talking about how they are connected.

Pot of maybe a thousand board designs, I think I have done that twice,
both times for boards with thermocouple inputs and high power drivers
nearby. Just diverting some ground-plane currents around a sheltered
niche.

You are ignoring that each chip which needs such a scheme can have its own analog ground area. Or, if the two chips can be placed side by side, they can share the connection between the common analog and digital ground planes. If neither is possible, then, no, this won\'t work. But then there are exactly zero techniques that work for every situation. In particular, the single, board wide ground area is not the best approach for some designs.


The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?
Almost always best is one solid ground plane for everything, bolted to
the metal case through every available spacer and bracket and
connector shell. We standardize on layer 2 for the ground plane, and
occasioanlly also layer 5 (of 6) mostly to keep the copper balanced
when we don\'t need a bunch of power planes..

Handle any microvolt ground loops properly of course.

There\'s no reason for any two grounds to be at different potentials.

The IC people think *their* single chip is the center of the universe,
and that the two system grounds should only meet under their single
chip.

Hmmm... Why would two ground planes be at different potentials if they are connected? Perhaps you missed where I said, \"joined at one location\".

Think of two grounds as a dipole. Yeah, they are connected somewhere in
the center but in RF terms that hardly means anything. Case in point:
All the yagi antennas I ever built have a driven element that is one
contiguous aluminum tube, no separation in the middle. Yet they radiate
and receive as calculated. When you look at the gamma match concept I
use to feed those it might become more clear where disaster can strike
in a split ground system:

https://www.electronics-notes.com/articles/antennas-propagation/antenna-theory/antenna-gamma-impedance-matching.php

Another (noisy) IC, transistor stage or whatever somewhere off center
connecting to one of the ground planes will make the whole contraption
radiate. That can cause you to fail radiated and sometimes even
conducted EMC. It also \"receives\", which may cause you to fail the
susceptibility test which is nowadays part of the EMC test protocol.

I don\'t know why you are trying to make antennas on the ground plane. There should be very, very little current flowing through the connection between the analog and digital ground areas, so very insignificant radiation.

As for susceptibility, how does the connection make the design more susceptible? Even an intact ground plane is susceptible to received radiation. It produces very little voltage because of the low resistance of the plane. Two connected planes can be connected with as low a resistance as desired, again, minimizing the induced voltage.


The idea is that some circuitry, such as a switching power converter or a power hungry IC, puts large currents in the ground plane, which do not limit themselves to the immediate area under that circuit.

Connecting the two ground planes at one spot, limits the impact of these currents to the digital plane.

In practice it usually doesn\'t. RF always tries to find another path
around it, and finds it.

You aren\'t making sense. What RF from what source? What other paths?


Of course, there is always more to a design than one such detail. This still requires the elimination of ground loops from other ground connections, such as off board.

Exactly, and in practice you often can\'t. Outside stuff has to connect
to your system. Mains power, protective earth, some sensors, maybe a
keyboard, a touch screen that by its very nature can be touched by a
conductive human finger, and so on.

I\'ve been on the beat for many decades. In all that time I never saw a
mixed-signal design with a split ground that worked reliably. Many times
I was called in as a consultant to \"make it work\", upon which I removed
all the ground splits. Often against vehement protests on the part of
client engineers. My own designs never had split grounds and they always
worked.

I can\'t speak to designs I know nothing of. When you talk about \"split planes\", you make it sound like they are not connected. My concept is exactly like the scheme that Larkin uses. We only differ by how much connection is made between them. Larkin is simply afraid to extend the scheme to its fullest, practical use.


There are very few exceptions. In sensitive audio setups an occasional
split can make sense but in my experience even there it\'s rare.

Ok, so then you agree with the concept. Thank you.


Then
there are safety rules. For example, in med-tech we must often maintain
full defibrillator-proof isolation when used in cardiac situations,
meaning it has to withstand 5kV. There the grounds aren\'t connected
anywhere.

And yet, you manage to not have excessive noise, yes?

You seem to actually be saying all methods work. Ok, I won\'t disagree. I simply find the use of borders around noisy, or sensitive circuits, is a good way to isolate noise. You seem to agree, but, like Larkin, get all wigged out by talking about this being a reasonable idea, even though you eventually admit that it works.

I think enough has been said about this. There\'s nothing new in your post. You are agreeing with Larkin, who also agrees with me. You both simply have trouble admitting that you agree.

Hilarious. I never join \"analog ground\" and \"digital ground\" under a
chip, much less many chips. In fact, I never have two grounds.

 

[Ricky]

On Monday, July 31, 2023 at 6:57:50 PM UTC-4, John Larkin wrote:

On Mon, 31 Jul 2023 15:10:02 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:
On Monday, July 31, 2023 at 3:14:46?PM UTC-4, Joerg wrote:
On 7/22/23 1:43 PM, Ricky wrote:
On Saturday, July 22, 2023 at 4:33:25?PM UTC-4, John Larkin wrote:
On Sat, 22 Jul 2023 13:17:35 -0700 (PDT), Ricky
gnuarm.del...@gmail.com> wrote:

I took a class many years ago, where they talked about creating separate power and ground planes for the analog and digital circuitry on a board. ...


For the vast majority of situations that is a bad idea. Often tought by
acedemians who never really designed anything meaningful for industry,
inclusing some at our university.

\"Acedemians\" such as the chip designers? I guess their chips are not assembled onto boards for qualification.


Of course, the ground planes would be joined at one location, typically under the chip that had both analog and digital signals, like an ADC or DAC.
And like John said, of course that chip is the only one in the universe
that needs access to two or more of the grounds

The minute there is one more device like that the whole concept goes
kablouie.

That simply shows you don\'t understand the concept. Larkin says he uses the same idea. He simply rationalizes it as being different by saying he only cuts the area on \"three sides\" rather than talking about how they are connected.
Pot of maybe a thousand board designs, I think I have done that twice,
both times for boards with thermocouple inputs and high power drivers
nearby. Just diverting some ground-plane currents around a sheltered
niche.

Yes, exactly. Thank you for agreeing with me, finally.

You are ignoring that each chip which needs such a scheme can have its own analog ground area. Or, if the two chips can be placed side by side, they can share the connection between the common analog and digital ground planes. If neither is possible, then, no, this won\'t work. But then there are exactly zero techniques that work for every situation. In particular, the single, board wide ground area is not the best approach for some designs.


The high speed digital signals would be routed anywhere other than over the analog ground planes, of course. Some people are telling me this is a bad idea, as if I have totally separate ground planes.

Any comments?
Almost always best is one solid ground plane for everything, bolted to
the metal case through every available spacer and bracket and
connector shell. We standardize on layer 2 for the ground plane, and
occasioanlly also layer 5 (of 6) mostly to keep the copper balanced
when we don\'t need a bunch of power planes..

Handle any microvolt ground loops properly of course.

There\'s no reason for any two grounds to be at different potentials..

The IC people think *their* single chip is the center of the universe,
and that the two system grounds should only meet under their single
chip.

Hmmm... Why would two ground planes be at different potentials if they are connected? Perhaps you missed where I said, \"joined at one location\"..

Think of two grounds as a dipole. Yeah, they are connected somewhere in
the center but in RF terms that hardly means anything. Case in point:
All the yagi antennas I ever built have a driven element that is one
contiguous aluminum tube, no separation in the middle. Yet they radiate
and receive as calculated. When you look at the gamma match concept I
use to feed those it might become more clear where disaster can strike
in a split ground system:

https://www.electronics-notes.com/articles/antennas-propagation/antenna-theory/antenna-gamma-impedance-matching.php

Another (noisy) IC, transistor stage or whatever somewhere off center
connecting to one of the ground planes will make the whole contraption
radiate. That can cause you to fail radiated and sometimes even
conducted EMC. It also \"receives\", which may cause you to fail the
susceptibility test which is nowadays part of the EMC test protocol.

I don\'t know why you are trying to make antennas on the ground plane. There should be very, very little current flowing through the connection between the analog and digital ground areas, so very insignificant radiation.

As for susceptibility, how does the connection make the design more susceptible? Even an intact ground plane is susceptible to received radiation. It produces very little voltage because of the low resistance of the plane. Two connected planes can be connected with as low a resistance as desired, again, minimizing the induced voltage.


The idea is that some circuitry, such as a switching power converter or a power hungry IC, puts large currents in the ground plane, which do not limit themselves to the immediate area under that circuit.

Connecting the two ground planes at one spot, limits the impact of these currents to the digital plane.

In practice it usually doesn\'t. RF always tries to find another path
around it, and finds it.

You aren\'t making sense. What RF from what source? What other paths?


Of course, there is always more to a design than one such detail. This still requires the elimination of ground loops from other ground connections, such as off board.

Exactly, and in practice you often can\'t. Outside stuff has to connect
to your system. Mains power, protective earth, some sensors, maybe a
keyboard, a touch screen that by its very nature can be touched by a
conductive human finger, and so on.

I\'ve been on the beat for many decades. In all that time I never saw a
mixed-signal design with a split ground that worked reliably. Many times
I was called in as a consultant to \"make it work\", upon which I removed
all the ground splits. Often against vehement protests on the part of
client engineers. My own designs never had split grounds and they always
worked.

I can\'t speak to designs I know nothing of. When you talk about \"split planes\", you make it sound like they are not connected. My concept is exactly like the scheme that Larkin uses. We only differ by how much connection is made between them. Larkin is simply afraid to extend the scheme to its fullest, practical use.


There are very few exceptions. In sensitive audio setups an occasional
split can make sense but in my experience even there it\'s rare.

Ok, so then you agree with the concept. Thank you.


Then
there are safety rules. For example, in med-tech we must often maintain
full defibrillator-proof isolation when used in cardiac situations,
meaning it has to withstand 5kV. There the grounds aren\'t connected
anywhere.

And yet, you manage to not have excessive noise, yes?

You seem to actually be saying all methods work. Ok, I won\'t disagree. I simply find the use of borders around noisy, or sensitive circuits, is a good way to isolate noise. You seem to agree, but, like Larkin, get all wigged out by talking about this being a reasonable idea, even though you eventually admit that it works.

I think enough has been said about this. There\'s nothing new in your post. You are agreeing with Larkin, who also agrees with me. You both simply have trouble admitting that you agree.
Hilarious. I never join \"analog ground\" and \"digital ground\" under a
chip, much less many chips. In fact, I never have two grounds.

Neither do I. When they are joined, they are only one ground, exactly as you have said you have done.

--

Rick C.

--+ Get 1,000 miles of free Supercharging
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[John Larkin]

On Mon, 31 Jul 2023 17:09:43 -0700 (PDT), Ricky
<gnuarm.deletethisbit@gmail.com> wrote:

I think enough has been said about this. There\'s nothing new in your post. You are agreeing with Larkin, who also agrees with me. You both simply have trouble admitting that you agree.
Hilarious. I never join \"analog ground\" and \"digital ground\" under a
chip, much less many chips. In fact, I never have two grounds.

Neither do I. When they are joined, they are only one ground, exactly as you have said you have done.

The cut in the ground plane here

https://www.dropbox.com/scl/fi/0xbq2zh5rer3smookdak5/Chimera_Ground_Cut.jpg?rlkey=enbp8fd2l451jkxmv9jqz8blr&raw=1

keeps the thermocouple circuit from seeing microvolt potentials caused
by voltage drops in the ground plane. But the amp circuits are still
solidly grounded to the only ground.

Show us your board.