Simulating mutiplication of 'X' with '0'

[Andy]

You are interpreting std_logic 'X' as "I don't care, but it is
stable." This is not the definition of 'X'. It means undefined, and
could be anything, including transitioning between states
continuously. Depending upon the implementation, multiple inputs
changing continuously at the same time can result in non-obvious
results. Thus propagating X * ? to X makes some sense.

You are also using an unofficial package placed in the ieee library by
synopsys, and other vendors followed suit to provide compatibility
with synopsys. Use ieee.numeric_std instead (or, if your tool supports
vhdl 2008, then use numeric_std_unsigned, which is the functional
equivalent of std_logic_unsigned). Both of these are ieee controlled,
reviewed and balloted packages which guarantee compatibility between
vendors that support them (not the case with std_logic_unsigned).

However, as stated earlier, numeric_std (and I presume
numeric_std_unsigned) both set the results to X if either input
contains one or more bits of 'X'.

If this is important to you, the vhdl200x standard is in early
development and is taking suggestions for improvements. This is an
excellent reason for using official IEEE sactioned packages instead of
synopsys ones: You have a mechanism for changing the IEEE packages.
Because synopsys does not control other vendors' versions of
std_logic_unsigned, the package cannot be changed as effectively as
can official IEEE standards.

You can wrap the operation with additional simulated logic that checks
either operand for all bits=0 and forces the output to 0.

Andy

 

[glen herrmannsfeldt]

Hal Murray <hal-usenet@ip-64-139-1-69.sjc.megapath.net> wrote:

(snip, someone wrote)

For instance, if you turn a computer on, the RAM memory will be
initialized to a random state, and it will still work correctly every
time it boots up.

In the case of RAM, it works because the system stores something
useful into RAM before it reads it.

It is not always so easy. For ECC, it is necessary to write using
appropriate sized words aligned properly. Otherwise, ECC requires
the memory subsystem to do a read-modify-write cycle that will fail
if the memory isn't in the right state.

It is, however, an interesting question as to the state of memory
on power-up. We assume it is random, but is that likely?

For SRAM, the power-up state might depend on imperfections in
the memory cell, such that one side is slightly stronger or faster
than the other. Many years ago I worked with a display device
using SRAM, and wondered if the power-up state was always the same.

Even more interesting, for DRAM it might depend on effects that could
be influenced by keeping the same data in for a long time.
That has some information security considerations.

-- glen