Signed, Unsigned syntax issues. Please help, I'm stumped

[Brian Drummond]

On Mon, 16 Jun 2008 12:45:30 +0100, Jonathan Bromley
<jonathan.bromley@MYCOMPANY.com> wrote:

On Mon, 16 Jun 2008 11:43:24 +0100, Brian Drummond wrote:

Overload the unary "+" operator. This is commonly done in Ada for
various purposes; I don't see why it won't work in VHDL.

function "+" (int:integer) return BitCntType is
variable BitCnt:BitCntType := to_unsigned(int, BitCntType'length);
begin
return BitCnt;
end function "+";

Offhand I don't see it working with unconstrained types like unsigned,
which makes it less attractive. Does anyone know better?

That's exactly the problem; the function signature for an operator
overload (or any other overloaded function) does NOT take subtype
into account, but only type. So your overloaded "+" could only
be made to target exactly one width of UNSIGNED. Bummer.

Aieee! of course! you can't even write different versions for different
subtypes of unsigned; they have to be different types which would bite
you, harder, in other places.

- Brian