remote sense supply...

[whit3rd]

On Saturday, April 2, 2022 at 7:53:47 AM UTC-7, jla...@highlandsniptechnology.com wrote:

Remote sense power supplies are common. People seem to use them OK. I
don\'t know if rs power supplies have any sorts of protections against
wiring errors. I think some just have 50 ohm resistors from outputs to
the sense pins. I posted to see what people know about that.

If a dim customer doesn\'t connect the sense pins, the feedback still happens, with
a 50 ohm in the supply side, from sense(+) to V+ etc. It also works if sense wire breaks.

And, if the 50 ohm is in series with sense(+) between the sense wire and the
feedback node, it keeps high power currents out of the skinny sense wire if
the power wire breaks.

The first scenario is implied in some application literature. The second, I saw
in my car some years back...

 

[legg]

On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
<bon@hertz.ikp.physik.tu-darmstadt.de> wrote:

John Larkin <jlarkin@highland_atwork_technology.com> wrote:
We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.


Why FPGA? Why not some uC?

In my experience, any microcontroller attached to or running
on externally accessible sense line juice will more likely
fail on standard single-fault abnormals. They don\'t like pins
being pulled above or below their own supply rails, or vice
versa.

ie will need replacing/reprogramming, vs just recycle the
source power, external or timed reset.

RL

 

[Neutronix Ltd]

On Friday, 1 April 2022 at 21:38:52 UTC+1, John Larkin wrote:

We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

Hi John,
it\'s not clear the setup to me, could you draw the configuration please? I\'ll be more than happy to have a look for you.

KR Francesco.
www.neutronix.co.uk

 

[Uwe Bonnes]

legg <legg@nospam.magma.ca> wrote:

In my experience, any microcontroller attached to or running
on externally accessible sense line juice will more likely
fail on standard single-fault abnormals. They don\'t like pins
being pulled above or below their own supply rails, or vice
versa.

And you think FPGA pins are more robust?
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 1623569 ------- Fax. 06151 1623305 ---------

 

[server]

On Sun, 3 Apr 2022 09:34:57 -0700 (PDT), Neutronix Ltd
<francescopoderico@googlemail.com> wrote:

On Friday, 1 April 2022 at 21:38:52 UTC+1, John Larkin wrote:
We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon
Hi John,
it\'s not clear the setup to me, could you draw the configuration please? I\'ll be more than happy to have a look for you.

KR Francesco.
www.neutronix.co.uk

Something like this:

https://www.dropbox.com/s/z7v8q4tjnef1ahs/P941_Rem_Sense_3.jpg?raw=1

There will be two isolated power supplies on a plugin board, maybe 40
volts 6 amps each, optionally parallelable.

This remote sense scheme should allow for miswiring without blowing up
the resistors, because we will shut down fast if a remote sense
voltage gets too far from the corresponding output. Even if the
resistor frying thing were fixed some other way, the shutdown is still
valuable.

The two ADCs are isolated delta-sigmas. They are expensive and need an
isolated power supply, so I only want two and want to have them share
power.

Paralleling supplies will get interesting.

I should move the discharge circuit to the left of the current shunt
so we don\'t measure it. Depletion fets or something.

Suggestions welcome.



--

I yam what I yam - Popeye

 

[server]

On 3 Apr 2022 17:42:40 GMT, Uwe Bonnes
<bon@hertz.ikp.physik.tu-darmstadt.de> wrote:

legg <legg@nospam.magma.ca> wrote:

In my experience, any microcontroller attached to or running
on externally accessible sense line juice will more likely
fail on standard single-fault abnormals. They don\'t like pins
being pulled above or below their own supply rails, or vice
versa.

And you think FPGA pins are more robust?

Our policy is to never have semiconductor pins exposed to the outside
world without protections.

Some ICs will clamp limited currents to their own rails with their ESD
diodes, some won\'t.



--

I yam what I yam - Popeye

 

[Joe Gwinn]

On Sun, 3 Apr 2022 01:06:24 +0300, Dimiter_Popoff <dp@tgi-sci.com>
wrote:

On 4/2/2022 23:50, Joe Gwinn wrote:
On Sat, 2 Apr 2022 22:15:00 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 21:51, Joe Gwinn wrote:
On Sat, 2 Apr 2022 21:38:30 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 20:47, John Larkin wrote:
On Sat, 2 Apr 2022 20:33:11 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 19:52, John Larkin wrote:
On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 1:37, John Larkin wrote:
On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
bon@hertz.ikp.physik.tu-darmstadt.de> wrote:

John Larkin <jlarkin@highland_atwork_technology.com> wrote:
We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.


Why FPGA? Why not some uC?

Every plugin board in this box has an FPGA. We need to do a lot of
signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
20 MHz bit rate, which need a heap of decimation processing. We\'ll do
some 100 Mbit communications with the motherboard too.

The little Trion FPGAs are about $10. We could even run a riscV
processor inside.


Thanks for mentioning these Trion FPGA-s, they look very interesting
to me.
Do you have any impression on their software licensing? I saw they
sell it at $35 but does it turn into yet another subscription
after some time?

I\'ll ask my FPGA guy. I get the impression that it\'s not bad.

They look cool. They are simple, with no ADC or high-end serdes or
things like that. They do have a dram controller (I think), lvds i/o,
schmitts, and a soft core riscV. 1Mbit of sram.

We\'re about to make a test board that includes the T20F256C4. We plan
to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
common-mode levels, delay-vs-Vcore and temperature, jitter, drive
strengths, things like that.

We asked their support people about some details of using the LVDS
receivers at other levels, and they said \"don\'t do that.\"

I might make an ADC using an LVDS receiver as a comparator. The
minimal ADC would use three fpga pins and one external RC. That could
be v-to-f, pwm, delta-sigma, or single-slope. Fun.

We\'ve designed a flash manager with bootstrap and field upgrade and
such.


I am only after standard functions, and if their lvds will do for
hdmi video out I\'ll be happy.
What I feel nervous about are their design tools, looks like they
are just $35 for now but how quickly can they become prohibitive
for someone who does not sell millions of units.

I never understood why FPGA vendors should charge for tools or use
insane licensing stuff. Makes more sense to just give it away, maybe
charge for support.


For many years - >20 - the electronica industry has been closing things
down so only \"politburo members\" can do real development. Probably this
is part of the same effort, FPGA vendors are interested in selling more
chips but their large customers likely give them contracts against
guarantees the tools will not be available to everybody.

I\'d bet it\'s an attempt to lock their customers in forever.

Could be if it is a one time fee. Not sure what is in at the moment.
But it started a long time ago so it is more likely to be the work
of some \'visionary\' to prevent the spread of knowledge which would
cost them zillions. Look at how they closed down all things wifi,
the first - prism or something - was documented etc. until it got
bought out and hidden from there on. Even T10 started selling their
documents many years ago... So far the rfc-s are not hidden, but for
how long. Some Sauron seems to be be lurking in the shadows .

A common problem.


A have MS Word 2016. Now MS Updater nags me to convert to Word365,
which is only by subscription. Strangely, Word 2016 is now developing
problems.


I wonder if the $35 tool one can buy now will work on a PC with
no internet connection. Guess I have only one way to know for sure.

Very good question. And companies who want to protect their critical
computers and networks from ransomware attacks et al may well have an
air-gapped system.

I am not concerned about our design critical stuff, it is all under
dps. They got a foot in when xilinx bought the coolrunner some 20 years
ago, we had a logic compiler I had written; the cpld-s we have now
use an old xilinx tool, old enough to work with no internet.

dps? Maybe Texas DPS?

No, it is the OS run here, written/built on over the years by me.

Just did a shot of what my screen can look like (usually not as
cluttered):
http://tgi-sci.com/misc/dps.gif

Ahh. That looks suspiciously like assembly code. The horror!

Guess I\'ll try some of these (too?) new fpga-s out, once I have a
working logic as I need it I typically don\'t need to change it for
many years. They seem new enough to be yet preoccupied with how
to change one time sales into subscription, guess we\'ll see.
Their fpga-s look really good on paper for what I am after.

I\'d say that my system of the future is air-gapped, as it\'s too hard
to keep up with the threat of the day, so all Internet-dependent tools
are excluded from consideration, and see what happens. You may need
to stop talking to the sales droids to convince them that you mean it.

I don\'t have the muscle to make them change policy so I try - have been
doing if for nearly 30 years now - to just be independent on software
written by anyone but me.

There are lots of customers with air-gapped systems. The point of the
query is to force the sales droid to tell you how to get that option,
or admit (through clenched teeth) that they do not support that
option.

The one thing in our products we cannot
reproduce without a wintel PC is a jedec file for a coolrunner CPLD,
xilinx would not disclose its insides (we had a tool for it while
it was Philips). Now I guess I\'ll settle for using someone else\'s
fpga tool... Once I have the binary and a supply of silicon - which
in our case it not large at all to be even a lifetime supply - I\'ll
still have things under control I guess.

Hmm. War story: Twenty years ago, I worked with a small company
whose chief designer had been a cryptographer at NSA.

The FPGA design program (don\'t recall which one) did not allow one to
fix the identity and location of the I/O pins, so every FPGA program
spin randomly scrambled the pins, which raised havoc with the PC board
layout, and so on. The FPGA design program had closed file formats,
so the designer could not manually force things.

So the designer\'s inner cryptographer came out - he cracked the file
format, if I recall using differential cryptanalysis methods, and then
he could manually edit the files to maintain pin locations from spin
to spin.

..<https://en.wikipedia.org/wiki/Differential_cryptanalysis>

War story: In the early 1980s the transition to UNIX operating
systems and computer platforms began. I was assailed with sales teams
trying to convince me that their proprietary computer platform was so
much better than those UNIX toys that no real man would consider UNIX.
My answer was to take them on a tour of a storage room that was piled
to the ceiling with the boxes that a few hundred UNIX computers had
come in (being saved for delivery to the ultimate customer), and
intoning that this was the future. None of those proprietary vendors
survive.

Well unix is a huge thing of course, most of the internet protocols
have been done under it etc., but I am no unix person. When I have to
use a unix command line I manage just the basics, if man works it is
better... I remember some 10 years back I was trying to make a laptop
dual-boot (xp and linux) and sector 0 was constantly polluted.
Luckily I had made a copy of it prior to that using a boot CD and
dd... . Was nicely surprised you could do such things
not only under dps (it is not called dd there, just copy to device
in non-file mode, does the same).

Yeah. In those days, each OS assumed that it owned the world, and
would stomp anything else. It was not by intent, at least not
initially, because nobody was trying to implement dual boot, in turn
because it would be pointless, as each OS was written to a specific
instruction set architecture. The emergence of UNIX undermined that
simpler world.


Joe Gwinn

 

[Dimiter_Popoff]

On 4/3/2022 23:12, Joe Gwinn wrote:

On Sun, 3 Apr 2022 01:06:24 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 23:50, Joe Gwinn wrote:
On Sat, 2 Apr 2022 22:15:00 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 21:51, Joe Gwinn wrote:
On Sat, 2 Apr 2022 21:38:30 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 20:47, John Larkin wrote:
On Sat, 2 Apr 2022 20:33:11 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 19:52, John Larkin wrote:
On Sat, 2 Apr 2022 18:54:50 +0300, Dimiter_Popoff <dp@tgi-sci.com
wrote:

On 4/2/2022 1:37, John Larkin wrote:
On 1 Apr 2022 22:28:41 GMT, Uwe Bonnes
bon@hertz.ikp.physik.tu-darmstadt.de> wrote:

John Larkin <jlarkin@highland_atwork_technology.com> wrote:
We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.


Why FPGA? Why not some uC?

Every plugin board in this box has an FPGA. We need to do a lot of
signal processing. The isolated ADCs are ADUM7703 delta-sigmas with a
20 MHz bit rate, which need a heap of decimation processing. We\'ll do
some 100 Mbit communications with the motherboard too.

The little Trion FPGAs are about $10. We could even run a riscV
processor inside.


Thanks for mentioning these Trion FPGA-s, they look very interesting
to me.
Do you have any impression on their software licensing? I saw they
sell it at $35 but does it turn into yet another subscription
after some time?

I\'ll ask my FPGA guy. I get the impression that it\'s not bad.

They look cool. They are simple, with no ADC or high-end serdes or
things like that. They do have a dram controller (I think), lvds i/o,
schmitts, and a soft core riscV. 1Mbit of sram.

We\'re about to make a test board that includes the T20F256C4. We plan
to measure a lot of stuff: pin-pin delays, Fmax on counters, LVDS
common-mode levels, delay-vs-Vcore and temperature, jitter, drive
strengths, things like that.

We asked their support people about some details of using the LVDS
receivers at other levels, and they said \"don\'t do that.\"

I might make an ADC using an LVDS receiver as a comparator. The
minimal ADC would use three fpga pins and one external RC. That could
be v-to-f, pwm, delta-sigma, or single-slope. Fun.

We\'ve designed a flash manager with bootstrap and field upgrade and
such.


I am only after standard functions, and if their lvds will do for
hdmi video out I\'ll be happy.
What I feel nervous about are their design tools, looks like they
are just $35 for now but how quickly can they become prohibitive
for someone who does not sell millions of units.

I never understood why FPGA vendors should charge for tools or use
insane licensing stuff. Makes more sense to just give it away, maybe
charge for support.


For many years - >20 - the electronica industry has been closing things
down so only \"politburo members\" can do real development. Probably this
is part of the same effort, FPGA vendors are interested in selling more
chips but their large customers likely give them contracts against
guarantees the tools will not be available to everybody.

I\'d bet it\'s an attempt to lock their customers in forever.

Could be if it is a one time fee. Not sure what is in at the moment.
But it started a long time ago so it is more likely to be the work
of some \'visionary\' to prevent the spread of knowledge which would
cost them zillions. Look at how they closed down all things wifi,
the first - prism or something - was documented etc. until it got
bought out and hidden from there on. Even T10 started selling their
documents many years ago... So far the rfc-s are not hidden, but for
how long. Some Sauron seems to be be lurking in the shadows .

A common problem.


A have MS Word 2016. Now MS Updater nags me to convert to Word365,
which is only by subscription. Strangely, Word 2016 is now developing
problems.


I wonder if the $35 tool one can buy now will work on a PC with
no internet connection. Guess I have only one way to know for sure.

Very good question. And companies who want to protect their critical
computers and networks from ransomware attacks et al may well have an
air-gapped system.

I am not concerned about our design critical stuff, it is all under
dps. They got a foot in when xilinx bought the coolrunner some 20 years
ago, we had a logic compiler I had written; the cpld-s we have now
use an old xilinx tool, old enough to work with no internet.

dps? Maybe Texas DPS?

No, it is the OS run here, written/built on over the years by me.

Just did a shot of what my screen can look like (usually not as
cluttered):
http://tgi-sci.com/misc/dps.gif

Ahh. That looks suspiciously like assembly code. The horror!

It sort of is - but is meant to not be tied to a specific architecture.
And it lets me do a lot of things I haven\'t seen done elsewhere (so I
implemented them into my tool when I needed them).
Has my life been/is it \"the horror\"? Probably.

Guess I\'ll try some of these (too?) new fpga-s out, once I have a
working logic as I need it I typically don\'t need to change it for
many years. They seem new enough to be yet preoccupied with how
to change one time sales into subscription, guess we\'ll see.
Their fpga-s look really good on paper for what I am after.

I\'d say that my system of the future is air-gapped, as it\'s too hard
to keep up with the threat of the day, so all Internet-dependent tools
are excluded from consideration, and see what happens. You may need
to stop talking to the sales droids to convince them that you mean it.

I don\'t have the muscle to make them change policy so I try - have been
doing if for nearly 30 years now - to just be independent on software
written by anyone but me.

There are lots of customers with air-gapped systems. The point of the
query is to force the sales droid to tell you how to get that option,
or admit (through clenched teeth) that they do not support that
option.


The one thing in our products we cannot
reproduce without a wintel PC is a jedec file for a coolrunner CPLD,
xilinx would not disclose its insides (we had a tool for it while
it was Philips). Now I guess I\'ll settle for using someone else\'s
fpga tool... Once I have the binary and a supply of silicon - which
in our case it not large at all to be even a lifetime supply - I\'ll
still have things under control I guess.

Hmm. War story: Twenty years ago, I worked with a small company
whose chief designer had been a cryptographer at NSA.

The FPGA design program (don\'t recall which one) did not allow one to
fix the identity and location of the I/O pins, so every FPGA program
spin randomly scrambled the pins, which raised havoc with the PC board
layout, and so on. The FPGA design program had closed file formats,
so the designer could not manually force things.

So the designer\'s inner cryptographer came out - he cracked the file
format, if I recall using differential cryptanalysis methods, and then
he could manually edit the files to maintain pin locations from spin
to spin.

.<https://en.wikipedia.org/wiki/Differential_cryptanalysis

I had a similar wartime story some 20+ years ago for the
Philips coolrunner.
I thught I had all the data to write the logic compiler for it so I
designed it in. Then discovered they had not given me the multiplexor
data... good luck doing it without that.
So I wrote a tool and multiple simple sources for their tool and
from the jedecs they generated gradually deciphered the multiplexor.
Took me about a month of work...
I think I still have that mux decode data online, let me see...
I do, http://tgi-sci.com/misc/ziarev.txt .
And one of the coolrunners I did with my logic compiler using it
back then: http://tgi-sci.com/misc/mb2ata.txt

 

[legg]

On 3 Apr 2022 17:42:40 GMT, Uwe Bonnes
<bon@hertz.ikp.physik.tu-darmstadt.de> wrote:

legg <legg@nospam.magma.ca> wrote:

In my experience, any microcontroller attached to or running
on externally accessible sense line juice will more likely
fail on standard single-fault abnormals. They don\'t like pins
being pulled above or below their own supply rails, or vice
versa.

And you think FPGA pins are more robust?

I meant any progammable part.

RL

 

[Cydrome Leader]

John Larkin <jlarkin@highland_atwork_technology.com> wrote:

We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.

remote sense is not paralelling. No idea where the FPGA logic is needed.

Got any old Condor or Power-One catalogs laying around?

 

[John Larkin]

On Mon, 4 Apr 2022 18:58:52 -0000 (UTC), Cydrome Leader
<presence@MUNGEpanix.com> wrote:

John Larkin <jlarkin@highland_atwork_technology.com> wrote:
We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.

remote sense is not paralelling.

I didn\'t think it was. But power supplies can be parelleled, in which
case we\'d only use one remote sense pair.

>No idea where the FPGA logic is needed.

The FPGA will input from the voltage and current sense delta-sigma
ADCs and generates the gate drives to the isolated forward converter.
It closes the feedback loops and reports the voltage and current to
the system. It will do safety shutdowns too.

We\'ll do cv, cc, programmed impedance, and programmed coordinated slew
rates. Things like that. It can manage paralleling two supplies too.

Got any old Condor or Power-One catalogs laying around?

No. I was hoping somebody would have some ps schematics with
approaches to remote sense.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

 

[Lasse Langwadt Christensen]

mandag den 4. april 2022 kl. 23.13.29 UTC+2 skrev John Larkin:

On Mon, 4 Apr 2022 18:58:52 -0000 (UTC), Cydrome Leader
pres...@MUNGEpanix.com> wrote:

John Larkin <jlarkin@highland_atwork_technology.com> wrote:
We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.

remote sense is not paralelling.
I didn\'t think it was. But power supplies can be parelleled, in which
case we\'d only use one remote sense pair.
No idea where the FPGA logic is needed.
The FPGA will input from the voltage and current sense delta-sigma
ADCs and generates the gate drives to the isolated forward converter.
It closes the feedback loops and reports the voltage and current to
the system. It will do safety shutdowns too.

We\'ll do cv, cc, programmed impedance, and programmed coordinated slew
rates. Things like that. It can manage paralleling two supplies too.

Got any old Condor or Power-One catalogs laying around?
No. I was hoping somebody would have some ps schematics with
approaches to remote sense.

http://ridl.cfd.rit.edu/products/manuals/Agilent/power%20supplies/CD1/Service/E3632ser.pdf

 

[John Larkin]

On Mon, 4 Apr 2022 14:51:51 -0700 (PDT), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

mandag den 4. april 2022 kl. 23.13.29 UTC+2 skrev John Larkin:
On Mon, 4 Apr 2022 18:58:52 -0000 (UTC), Cydrome Leader
pres...@MUNGEpanix.com> wrote:

John Larkin <jlarkin@highland_atwork_technology.com> wrote:
We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.

remote sense is not paralelling.
I didn\'t think it was. But power supplies can be parelleled, in which
case we\'d only use one remote sense pair.
No idea where the FPGA logic is needed.
The FPGA will input from the voltage and current sense delta-sigma
ADCs and generates the gate drives to the isolated forward converter.
It closes the feedback loops and reports the voltage and current to
the system. It will do safety shutdowns too.

We\'ll do cv, cc, programmed impedance, and programmed coordinated slew
rates. Things like that. It can manage paralleling two supplies too.

Got any old Condor or Power-One catalogs laying around?
No. I was hoping somebody would have some ps schematics with
approaches to remote sense.

http://ridl.cfd.rit.edu/products/manuals/Agilent/power%20supplies/CD1/Service/E3632ser.pdf

About all that the text says about remote sense is that it has it.

Do you understand the rs in the schematic, sheet 121? I don\'t. Seems
like the diffamp gain changes when the rs is connected. That would be
inelegant. Those giant diodes look ugly too.



--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

 

[Joe Gwinn]

On Mon, 04 Apr 2022 15:28:03 -0700, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

On Mon, 4 Apr 2022 14:51:51 -0700 (PDT), Lasse Langwadt Christensen
langwadt@fonz.dk> wrote:

mandag den 4. april 2022 kl. 23.13.29 UTC+2 skrev John Larkin:
On Mon, 4 Apr 2022 18:58:52 -0000 (UTC), Cydrome Leader
pres...@MUNGEpanix.com> wrote:

John Larkin <jlarkin@highland_atwork_technology.com> wrote:
We\'re designing a biggish dual power supply, and the customer wants
remote sense. We\'d add a small D9 connector or something for the four
sense inputs.

This seems non-trivial. The supply should work normally if the rs pins
are not connected. We could put 50 ohm or somesuch resistors from the
main outputs to the rs pins, and then drive a high-z feedback circuit.

If the two supplies are paralleled, the customer would use just two
sense wires.

If rs is connected wrong, the supply can go bonkers or we could fry
the 50 ohm resistors.

Sounds like we need current limiters and maybe diodes and maybe FPGA
logic.

remote sense is not paralelling.
I didn\'t think it was. But power supplies can be parelleled, in which
case we\'d only use one remote sense pair.
No idea where the FPGA logic is needed.
The FPGA will input from the voltage and current sense delta-sigma
ADCs and generates the gate drives to the isolated forward converter.
It closes the feedback loops and reports the voltage and current to
the system. It will do safety shutdowns too.

We\'ll do cv, cc, programmed impedance, and programmed coordinated slew
rates. Things like that. It can manage paralleling two supplies too.

Got any old Condor or Power-One catalogs laying around?
No. I was hoping somebody would have some ps schematics with
approaches to remote sense.

http://ridl.cfd.rit.edu/products/manuals/Agilent/power%20supplies/CD1/Service/E3632ser.pdf

About all that the text says about remote sense is that it has it.

Do you understand the rs in the schematic, sheet 121? I don\'t. Seems
like the diffamp gain changes when the rs is connected. That would be
inelegant. Those giant diodes look ugly too.

The usual place to look for such details was the HP Journal; these are
all online and freely available these days, at the Agilent or Keysight
web sites.

The other classic source was US Patents. Usually, the names of the HP
Journal article had much overlap with the list of patentees. So,
given a patent, one can search the HP Journal.

Joe Gwinn

 

[sea moss]

http://ridl.cfd.rit.edu/products/manuals/Agilent/power%20supplies/CD1/Service/E3632ser.pdf
About all that the text says about remote sense is that it has it.

Do you understand the rs in the schematic, sheet 121? I don\'t. Seems
like the diffamp gain changes when the rs is connected. That would be
inelegant. Those giant diodes look ugly too.

You could swap out the diff amp for an instrumentation amplifier, so you wouldn\'t lose any precision. Then the resistors between the outputs and the remote sense pins could be even bigger values and you wouldn\'t have to worry about them blowing up. There should be some instrumentation amplifiers with 42V common-mode range.

And what are those \"RV\" components at the output? MOVs?

 

[Jan Panteltje]

On a sunny day (Mon, 4 Apr 2022 14:51:51 -0700 (PDT)) it happened Lasse
Langwadt Christensen <langwadt@fonz.dk> wrote in
<3227d09d-48df-4f7c-bb2e-c4ac9d71c73cn@googlegroups.com>:

>http://ridl.cfd.rit.edu/products/manuals/Agilent/power%20supplies/CD1/Service/E3632ser.pdf

page 101:
Interesting big thyristor as over voltage protection across the output.
Maybe John L. also needs one?

 

[server]

On Tue, 05 Apr 2022 06:44:25 GMT, Jan Panteltje
<pNaonStpealmtje@yahoo.com> wrote:

On a sunny day (Mon, 4 Apr 2022 14:51:51 -0700 (PDT)) it happened Lasse
Langwadt Christensen <langwadt@fonz.dk> wrote in
3227d09d-48df-4f7c-bb2e-c4ac9d71c73cn@googlegroups.com>:

http://ridl.cfd.rit.edu/products/manuals/Agilent/power%20supplies/CD1/Service/E3632ser.pdf

page 101:
Interesting big thyristor as over voltage protection across the output.
Maybe John L. also needs one?

Probably not. An isolated switcher can be cut off several less
dramatic ways if the voltage goes too high. It doesn\'t have the
failure modes of a linear supply. For example, a shorted mosfet
doesn\'t make the output go up, it makes it zero.





--

I yam what I yam - Popeye

 

[Jan Panteltje]

On a sunny day (Tue, 05 Apr 2022 07:08:32 -0700) it happened
jlarkin@highlandsniptechnology.com wrote in
<m5jo4hpvv7s4bn1naroq2f3vvdv1fqc79k@4ax.com>:

On Tue, 05 Apr 2022 06:44:25 GMT, Jan Panteltje
pNaonStpealmtje@yahoo.com> wrote:

On a sunny day (Mon, 4 Apr 2022 14:51:51 -0700 (PDT)) it happened Lasse
Langwadt Christensen <langwadt@fonz.dk> wrote in
3227d09d-48df-4f7c-bb2e-c4ac9d71c73cn@googlegroups.com>:

http://ridl.cfd.rit.edu/products/manuals/Agilent/power%20supplies/CD1/Service/E3632ser.pdf

page 101:
Interesting big thyristor as over voltage protection across the output.
Maybe John L. also needs one?

Probably not. An isolated switcher can be cut off several less
dramatic ways if the voltage goes too high. It doesn\'t have the
failure modes of a linear supply. For example, a shorted mosfet
doesn\'t make the output go up, it makes it zero.

True, but I have seen other things go wrong
reference voltage for example.
And if you control it digitally with an FPGA or whatever programmable device
anything can happen.
It is a case of the value or danger of what is connected to it,
in case of a spacecraft if it blows up something essential for survival.

>I yam Popeye

I know

 

[server]

On Tue, 05 Apr 2022 14:20:26 GMT, Jan Panteltje
<pNaonStpealmtje@yahoo.com> wrote:

On a sunny day (Tue, 05 Apr 2022 07:08:32 -0700) it happened
jlarkin@highlandsniptechnology.com wrote in
m5jo4hpvv7s4bn1naroq2f3vvdv1fqc79k@4ax.com>:

On Tue, 05 Apr 2022 06:44:25 GMT, Jan Panteltje
pNaonStpealmtje@yahoo.com> wrote:

On a sunny day (Mon, 4 Apr 2022 14:51:51 -0700 (PDT)) it happened Lasse
Langwadt Christensen <langwadt@fonz.dk> wrote in
3227d09d-48df-4f7c-bb2e-c4ac9d71c73cn@googlegroups.com>:

http://ridl.cfd.rit.edu/products/manuals/Agilent/power%20supplies/CD1/Service/E3632ser.pdf

page 101:
Interesting big thyristor as over voltage protection across the output.
Maybe John L. also needs one?

Probably not. An isolated switcher can be cut off several less
dramatic ways if the voltage goes too high. It doesn\'t have the
failure modes of a linear supply. For example, a shorted mosfet
doesn\'t make the output go up, it makes it zero.

True, but I have seen other things go wrong
reference voltage for example.
And if you control it digitally with an FPGA or whatever programmable device
anything can happen.

But we can build in a lot of crosschecks that wouldn\'t be practical in
an analog supply. A crude redundant output voltage measurement
wouldn\'t hurt.

FPGAs don\'t seem to have random logic failures, like a board full of
discretes can. They seem to work or they don\'t.

It is a case of the value or danger of what is connected to it,
in case of a spacecraft if it blows up something essential for survival.

We\'ll mostly be testing aerospace stuff, which is the only reason we
want to make power supplies. I might design the supply so it can\'t
possibly make more than 36 volts, which is the danger limit for a lot
of this stuff.

I yam Popeye

I know

Popeys\'s statement is important and profound. Everybdy has to figure
out what they are and be content with it.



--

I yam what I yam - Popeye

 

[Tom Gardner]

On 05/04/22 15:51, jlarkin@highlandsniptechnology.com wrote:

Popeys\'s statement is important and profound. Everybdy has to figure
out what they are and be content with it.

Yes, provided that isn\'t used as a justification for
not bothering to improve oneself where improvement
could reasonably be made.

As with a many English laws, I leave it to the \"man
on the Clapham omnibus\" to define \"reasonable\".