Reading memory images into a VHDL testbench

  • Thread starter Jonathan Bromley
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Jonathan Bromley

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Back in August '08 there was an inconclusive thread here
asking whether you could find a VHDL lookalike for the
very convenient Verilog readmemb/readmemh system tasks.
It's something I have often wanted for myself, to
support testbenches written in a mixture of VHDL and
Verilog - or when translating from one to another.
I don't want to have to rewrite all my memory image
files into some VHDL-friendly format.

I've now done a reasonably complete implementation of
readmemb/readmemh in VHDL, and will make it available
after a bit more testing. However, it seems likely
that the ability to read .COE and .MIF would also be
handy (nice to use the same memory image files for
behavioural models and synthesis); and perhaps
Intel HEX or S-record as well. Which of these do
folk think is most important? I don't have time
to do a thorough job on all of them. It's easy
and quick to do something that's *almost* right
but, like most things in life, doing it properly
costs real work.

Alternatively, has anyone stumbled across any
existing implementations of file-readers for those
formats in VHDL? I couldn't find anything after
a brief Google session.

TIA
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
Jonathan Bromley wrote:

I've now done a reasonably complete implementation of
readmemb/readmemh in VHDL, and will make it available
after a bit more testing.
Good work.
Does that mean I can writememh from verilog
and readmemh from vhdl, but not vice-versa?

However, it seems likely
that the ability to read .COE and .MIF would also be
handy (nice to use the same memory image files for
behavioural models and synthesis);
That would be the top two, but I really shouldn't
vote, since I am partial to vhdl constant arrays
and letting synthesis make those files for me.

and perhaps
Intel HEX or S-record as well.
Less important, but probably the next two.

Which of these do
folk think is most important? I don't have time
to do a thorough job on all of them. It's easy
and quick to do something that's *almost* right
but, like most things in life, doing it properly
costs real work.
Just do one of them as an example.
I'm sure you will clarify and virtualise the
process with vhdl functions, so the others
should be an trivial exercise ;)

Alternatively, has anyone stumbled across any
existing implementations of file-readers for those
formats in VHDL? I couldn't find anything after
a brief Google session.
Nothing in vhdl.
Just a perl parser example for the verilog format:
http://search.cpan.org/~gsullivan/Verilog-Readmem-0.04/lib/Verilog/Readmem.pm

-- Mike Treseler
 
Jonathan Bromley wrote:

However, it seems likely
that the ability to read .COE and .MIF would also be
handy (nice to use the same memory image files for
behavioural models and synthesis); and perhaps
Intel HEX or S-record as well. Which of these do
folk think is most important?
In stark contrast to Mike, I'm going to vote for Intel HEX and S-record.
Not trying to be difficult, but they are the two formats I use myself. I
really dislike MIF in a big way, though concede it's perhaps better for
sparsely populated _big_ arrays - not that I've had much of a use for them
myself. I always use Intel Hex for on-chip memories - it allows me to use
the same image for simulation and synthesis.

My $0.02 worth...

Regards,

--
Mark McDougall, Engineer
Virtual Logic Pty Ltd, <http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
 
On Mon, 06 Apr 2009 23:49:50 +0100, Jonathan Bromley wrote:

I've now done a reasonably complete implementation of
readmemb/readmemh in VHDL, and will make it available
after a bit more testing.
Only a little bit. Testing and bug reports welcomed.
VHDL, a readme file and a silly demo example at

http://www.oxfordbromley.plus.com/files/readmem/readmem.zip

If the laughter isn't too loud, I'll do one of the other
formats some time soon.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
On Mon, 06 Apr 2009 17:33:19 -0700, Mike Treseler wrote:

Does that mean I can writememh from verilog
and readmemh from vhdl, but not vice-versa?
It's intended to be read-only for both. The
idea is that the text file is created by some
external tool, or by hand, and read into your
sim to initialise some values. I know you like
to do it with VHDL source, but sometimes you
don't get the choice...

Writing the files is considerably easier than
reading them, because you don't need to worry
about error conditions. There's no built-in writer
in Verilog, but it's trivial to do; I'll add the
VHDL equivalent too.

Just a perl parser example for the verilog format:
http://search.cpan.org/~gsullivan/Verilog-Readmem-0.04/lib/Verilog/Readmem.pm
Thanks, I'll look - but I don't know Perl well, so
probably won't learn much :-(
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
On Tue, 07 Apr 2009 02:10:51 +0100, Jonathan Bromley wrote:

Testing and bug reports welcomed.
Hmm, better fix those stupidities double-quick before
Alan Fitch gets to see it and spots all my silly errors!

http://www.oxfordbromley.plus.com/files/readmem/readmem_0.1.zip

fixes...
- forgot to close the input file when done;
- function "get_mem" does not need to be IMPURE.

The original idea was Alan's anyway...
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
I don't have time
to do a thorough job on all of them. It's easy
and quick to do something that's *almost* right
but, like most things in life, doing it properly
costs real work.
I wouldn't bother with Intel HEX or S-record but focus on one single
reader implementation. Do only one job but do it right :) There are
other tools that focus on format conversion, e.g. Srecord:
http://srecord.sf.net/

Reads/writes verilog VMEM, HEX, S-record, MIF, and many others (COE's
missing yet).

Arnim
 

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