Question on TI TMS2532 EPROM in read mode

[Commander Dave]

Greetings,

I was looking over the datasheet for the TI TMS2532 EPROM and was confused
about how to use one of the pins.

http://www.jrok.com/datasheet/TMS2532.pdf

Pin 21 is defined as Vpp, which is supposed to be +25V when programming the
chip. When using the EPROM in a normal READ mode, should this pin be tied to
+5V or tied to GND?

From the datasheet, it seems to me that it should be tied to +5V, but I have
a board running fine with it tied to GND. Any thoughts on this?

Thanks,
-Dave

 

[Norm Dresner]

"Commander Dave" <cmdr-dave@spamcop.net> wrote in message
news:yAfZc.1688$Np2.698@bignews4.bellsouth.net...

Greetings,

I was looking over the datasheet for the TI TMS2532 EPROM and was confused
about how to use one of the pins.

http://www.jrok.com/datasheet/TMS2532.pdf

Pin 21 is defined as Vpp, which is supposed to be +25V when programming
the
chip. When using the EPROM in a normal READ mode, should this pin be tied
to
+5V or tied to GND?

From the datasheet, it seems to me that it should be tied to +5V, but I
have
a board running fine with it tied to GND. Any thoughts on this?

The timing diagram for the Read Cycle explicitly shows that pin going to
V_(Input Low) which is ~Gnd.

Norm

 

[Commander Dave]

I don't see that part of the timing diagram in the read cycle. My guess is
that you are looking at pin 20... which is the Power Down/Program select. In
that case, pin 20 does go low to select the chip.

The pin I am talking about is pin 21, which is the Vpp. I know this pin
needs 25V when it is being programmed, but what is it supposed to be when
the chip is used in standard read mode?

Honestly, I think I already have the answer... both from empirical evidence
and re-reading the small footnotes on the datasheet:

1. On my board, I set the jumper to set pin 21 to +5V instead of GND. It
worked just fine.
2. In the table at the top of page 146 of the datasheet, it has that pin
listed as +5V in read mode
3. Note 3 on page 148 essentially says that Vpp can be tied to Vcc (~+5V)
unless in programming mode.

I think it is supposed to be at +5V, but my GUESS is that it will work with
anything less than the programming voltage (+25V). It just really threw my
thought process out of whack when I saw it tied to GND in a working board.
Unless I hear some convincing evidence otherwise, I will leave it tied to
+5V.

Cheers!
-Commander Dave

"Norm Dresner" <ndrez@att.net> wrote:

The timing diagram for the Read Cycle explicitly shows that pin going to
V_(Input Low) which is ~Gnd.

Norm

 

[Commander Dave]

My guess too. Just to be complete, the place where it was used is on an
coin-op version of Gorf from ~1981.

Just a wild shot in the dark, but do you think it didn't matter to the chips
and they stuck it at GND just to keep a little heat off the chips? I don't
know if it would even matter about the heat... but if it works either way, I
might could see a designer saying "Why pump 5V more into the chip(s)?".

I just got in several more boards... so I'll check them all out and see what
comes up. Perhaps that board was just a fluke... Thanks for the answer!

-Commander Dave


"Tony K" <tk@encoreelectronics.com> wrote in message
news:7pSdnUUhX4SjK6vcRVn-rA@comcast.com...

I see you already made note of that table.
I guess the board where it was working tied to ground was just dumb luck
on
their part. It certainly doesn't conform to the spec.

Good luck,
Tony

snip